U.S. patent application number 10/434076 was filed with the patent office on 2003-10-30 for laminated chip component and manufacturing method.
This patent application is currently assigned to TOKO KABUSHIKI KAISHA. Invention is credited to Muramatsu, Nobuaki, Ogawa, Takahiro.
Application Number | 20030201533 10/434076 |
Document ID | / |
Family ID | 17478162 |
Filed Date | 2003-10-30 |
United States Patent
Application |
20030201533 |
Kind Code |
A1 |
Muramatsu, Nobuaki ; et
al. |
October 30, 2003 |
Laminated chip component and manufacturing method
Abstract
A laminated chip component including: alternately laminated
conductive patterns (13,43,63) and insulating sheets (11,41,61);
through-holes (12,42,62) which are provided in the insulating
sheets and connect top layer conductive patterns to bottom layer
conductive patterns; auxiliary conductive patterns (15,45,65) which
are provided on the top faces of the conductive patterns at
positions facing the through-holes provided in adjacent insulating
sheets; and conductors (14,64) which are provided in the
through-holes. The auxiliary conductive patterns can be substituted
by conductor sections (16,66) which are provided in the insulating
sheets at the positions facing the through-holes provided in
adjacent insulating sheets. And, a method for manufacturing a
laminated chip component is also disclosed.
Inventors: |
Muramatsu, Nobuaki;
(Saitama-Ken, JP) ; Ogawa, Takahiro; (Saitama-Ken,
JP) |
Correspondence
Address: |
PILLSBURY WINTHROP, LLP
P.O. BOX 10500
MCLEAN
VA
22102
US
|
Assignee: |
TOKO KABUSHIKI KAISHA
|
Family ID: |
17478162 |
Appl. No.: |
10/434076 |
Filed: |
May 9, 2003 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10434076 |
May 9, 2003 |
|
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09668740 |
Sep 25, 2000 |
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6597056 |
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Current U.S.
Class: |
257/734 ;
257/758; 257/774; 438/622; 438/667 |
Current CPC
Class: |
H01F 2017/0026 20130101;
H03H 1/00 20130101; H05K 1/16 20130101; H01G 4/30 20130101; H01G
4/232 20130101; H05K 3/4617 20130101; H03H 2001/0085 20130101; H03H
7/0115 20130101 |
Class at
Publication: |
257/734 ;
438/622; 438/667; 257/758; 257/774 |
International
Class: |
H01L 021/44; H01L
023/48; H01L 021/4763; H01L 023/52 |
Foreign Application Data
Date |
Code |
Application Number |
Sep 24, 1999 |
JP |
1999 -269856 |
Claims
What is claimed is:
1. A laminated chip component comprising: alternately laminated
conductive patterns and insulating sheets; through-holes which are
provided in said insulating sheets; auxiliary conductive patterns
which are provided on the top faces of positions which facing said
through-holes provided in adjacent insulating sheets of said
conductive patterns; and conductors which are provided in said
through-holes, and connect upper layer conductive patterns to said
auxiliary conductive pattern on lower layer conductive
patterns.
2. A laminated chip component comprising: alternately laminated
conductive patterns and insulating sheets; through-holes which are
provided in said insulating sheets; conductor sections which are
provided in said insulating sheets at positions facing said
through-holes provided in adjacent insulating sheets; and
conductors which are provided in said conductor sections and said
through-holes, and connect upper layer conductive patterns to lower
layer conductive patterns.
3. The laminated chip component as described in claim 2, wherein
said conductor section is a cavity.
4. The laminated chip component as described in claim 2, wherein
said conductor section is a through-hole.
5. The laminated chip component as described in claim 2, further
comprising an auxiliary conductive pattern which is provided on a
top face of said bottom layer conductive pattern at the connection
with said top layer conductive pattern.
6. A laminated chip component comprising: alternately laminated
conductive patterns and insulating sheets; through-holes which are
provided in said insulating sheets; said conductive pattern
comprising a first conductive pattern and a second conductive
pattern of different materials; an auxiliary conductive pattern of
the same material as said second conductive pattern, provided on
the top face of a connection section which connects to said second
conductive pattern of said first conductive pattern; and a
conductor of the same material as said second conductive pattern
provided in a through-hole which runs between said first conductive
pattern and said second conductive pattern.
7. A laminated chip component comprising: alternately laminated
conductive patterns and insulating sheets; through-holes which are
provided in said insulating sheets; said conductive patterns
comprising a first conductive pattern and a second conductive
pattern of different materials; the insulating sheet on which said
first conductive pattern is provided comprising a conductor section
for providing a conductor of the same material as said second
conductive pattern, the conductor section being provided at the
position which corresponding to the connection between said first
and second conductive patterns in said insulating sheet; and
conductors comprising the same material as said second conductive
pattern, the conductors being provided in a through-hole which runs
between said first conductive pattern and said second conductive
pattern and in said conductor section.
8. The laminated chip component as described in claim 7, wherein
said conductor section is a cavity.
9. The laminated chip component as described in claim 7, wherein
said conductor section is a through-hole.
10. The laminated chip component as described in claim 7, further
comprising an auxiliary conductive pattern which is provided on the
top face of said bottom layer conductive pattern at the connection
with said top layer conductive pattern.
11. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: printing conductive patterns on
said insulating sheets; printing auxiliary conductive patterns on
the top faces of said conductive patterns at the positions facing
said through-holes of adjacent insulating sheets; and connecting
upper layer conductive pattern to said auxiliary conductive pattern
on lower layer conductive pattern by means of conductors which are
provided in the through-holes in said insulating sheets.
12. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: providing conductor sections in
the insulating sheets at positions facing the through-hole in
adjacent insulating sheets; printing conductive patterns on said
insulating sheets and providing conductors in said conductor
sections; and connecting said upper layer conductive pattern to
said auxiliary conductive pattern on said lower layer conductive
pattern by means of conductors which are provided in the
through-holes of said insulating sheets.
13. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: providing conductor sections in
the insulating sheets at the positions facing the through-hole in
adjacent insulating sheets; printing conductive patterns on said
insulating sheets and providing conductors in said conductor
sections; printing auxiliary conductive patterns on top faces of
said conductive patterns at the positions facing said through-holes
of adjacent insulating sheets; and connecting upper layer
conductive pattern to said auxiliary conductive pattern on lower
layer conductive pattern by means of conductors which are provided
in the through-holes of said insulating sheets.
14. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: printing a first conductive
pattern on an insulating sheet; printing an auxiliary conductive
pattern comprising the same material as the second conductive
pattern on the top face of the connection section which connects to
said second conductive pattern of said first conductive pattern;
and connecting the auxiliary conductive pattern on the first
conductive pattern to the second conductive pattern by means of a
conductor comprising the same material as the second conductive
pattern, the conductor being provided in a through-hole in the
laminated insulating sheets.
15. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: providing conductor sections
for providing conductors comprising the same material as the second
conductive pattern at the position corresponding to the connection
between the first conductive pattern and the second conductive
pattern in said insulating sheets; printing a first conductive
pattern on said insulating sheets, and providing conductors
comprising the same material as said second conductive pattern in
said conductor sections; and connecting first conductive pattern to
the second conductive pattern by means of conductors comprising the
same material as the second conductive pattern, the conductors
being provided in through-holes in the laminated insulating
sheets.
16. A method for manufacturing a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, through-holes which are provided in said insulating sheets,
the method comprising the steps of: providing conductor sections
for providing conductors comprising the same material as the second
conductive pattern at the position corresponding to the connections
between a first conductive pattern and a second conductive pattern
in said insulating sheets; printing a first conductive pattern on
said insulating sheets; providing conductors comprising the same
material as said second conductive pattern in said conductor
sections, and printing an auxiliary conductive pattern comprising
the same material as said second conductive pattern on the top face
of said first conductive pattern at the connection with said second
conductive pattern; and connecting first conductive pattern to the
second conductive pattern by means of conductors comprising the
same material as the second conductive pattern, the conductors
being provided in through-holes in the laminated insulating sheets.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a laminated chip component
comprising alternately laminated conductive patterns and insulating
sheets, the conductive patterns between the insulating sheets being
connected by conductors in through-holes, and a method for
manufacturing the laminated chip component.
[0003] 2. Description of the Related Art
[0004] An inductance element such as that shown in FIG. 7 is a
conventional laminated chip component of this type. The inductance
element of FIG. 7 comprises conductive patterns 73a, 73b, 73c and
73d which are printed on the top faces of insulating sheets 71a,
71b, 71c and 71d. The insulating sheets 71a, 71b, 71c and 71d are
laminated sequentially and covered with protective insulating sheet
71e. As shown in FIG. 8, the upper layer and lower layer conductive
patterns 73a, 73b, 73c and 73d are connected together by conductors
74 which are provided in through-holes 72. These conductive
patterns form a spiral coil pattern. The conductive patterns 73a
and 73d are extracted at the end faces of the laminated body, and
connect to terminals which are provided at the end faces of the
laminated body.
[0005] Another conventional laminated chip component comprises a
circuit formed by laminating together passive elements such as
coils, capacitors, and the like. FIGS. 9 and 10 show a filter which
is formed by laminating two coils and capacitors. An insulating
sheet 91a having a conductive pattern for capacitor 95a printed
thereon is laminated with an insulating sheet 91b having conductive
patterns for capacitor 95b and 95c printed thereon, thereby forming
two capacitors. Insulating sheets 91c, 91d and 91e having two
conductive patterns for half-turn coil printed thereon and a
protective insulating sheet 91f are laminated sequentially on the
laminated body which contains the capacitors. The conductive
patterns for coil 93a, 93b and 93c are connected by a conductor 94
provided in a through-hole 92. The conductive patterns for coil
93d, 93e and 93f are connected by a conductor 94 provided in a
through-hole 92. The conductive patterns for coil form two coils
inside the laminated body.
[0006] The conductive pattern for coil 93a and the conductive
pattern for capacitor 95b are connected by a conductor 94 provided
in a through-hole 92. The conductive pattern for coil 93d and the
conductive pattern for capacitor 95c are connected by a conductor
provided in a through-hole 92.
[0007] The conductive pattern for coil 93c and the conductive
pattern for coil 93f are extracted at two sides of the laminated
body, and connect to terminals. The conductive pattern for
capacitor 95a is extracted at the sides where the conductive
patterns for coil are not extracted, and connects to terminals.
[0008] In conventional laminated chip components such as that shown
in FIGS. 7 and 8, the firing shrinkage rate of the conductive
patterns is greater than the firing shrinkage rate of the
insulating sheets. Consequently, the connection in the
through-holes is sometimes broken, as shown by numeral 80 in FIG.
8.
[0009] In conventional laminated chip components such as that shown
in FIGS. 9 and 10, different materials are generally used for the
conductive patterns for coil and the conductive patterns for
capacitor. As a result, the two types of conductive patterns have
different firing shrinkage rates and different reactivity.
Consequently, in conventional laminated chip components such as
that shown in FIGS. 9 and 10, not only is the firing shrinkage rate
of the conductive patterns greater than the firing shrinkage rate
of the insulating sheets, but in addition, the two types of
conductive patterns have different firing shrinkage rates and
different reactivity. As a consequence, the connection in the
through-holes is liable to break, especially between a coil and a
capacitor as shown by numeral 100 in FIG. 10.
SUMMARY OF THE INVENTION
[0010] It is an object of the present invention to provide a
laminated chip component in which broken connections in
through-holes of insulating sheets can be prevented.
[0011] In order to achieve the abovementioned object, this
invention is featured by a laminated chip component including:
alternately laminated conductive patterns and insulating sheets;
through-holes which are provided in the insulating sheets;
auxiliary conductive patterns which are provided on the top faces
of positions which facing the through-holes provided in adjacent
insulating sheets of the conductive patterns; and conductors which
are provided in the through-holes, and connect upper layer
conductive patterns to the auxiliary conductive pattern on lower
layer conductive patterns.
[0012] This invention is also featured by a laminated chip
component including: alternately laminated conductive patterns and
insulating sheets; through-holes which are provided in the
insulating sheets; conductor sections which are provided in the
insulating sheets at positions facing the through-holes provided in
adjacent insulating sheets; and conductors which are provided in
the conductor sections and the through-holes and connect upper
layer conductive patterns to lower layer conduction patterns.
[0013] This invention is further featured by a laminated chip
component including: alternately laminated conductive patterns and
insulating sheets; through-holes which are provided in the
insulating sheets; said conductive pattern comprising a first
conductive pattern and a second conductive pattern of different
materials; auxiliary conductive pattern of the same material as
said second conductive pattern, provided on the top faces at the
connection section which connect to said second conductive pattern
of said first conductive pattern; and a conductor of the same
material as said second conductive pattern, provided in a
through-hole which runs between said first conductive pattern and
said second conductive pattern.
[0014] This invention is still further featured by a laminated chip
component including; alternately laminated conductive patterns and
insulating sheets; through-holes which are provided in the
insulating sheets; said conductive pattern comprising a first
conductive pattern and a second conductive pattern of different
materials; the insulating sheet on which said first conductive
pattern is provided comprising a conductor section for providing a
conductor of the same material as said second a conductive pattern,
the conductor section being provided at position which
corresponding to the connection between said first and second
conductive patterns in said insulating sheet; and conductors
comprising the same material as said second conductive pattern, the
conductors being provided in a through-hole which runs between said
first conductive pattern and said second conductive pattern.
[0015] This invention is still further featured by a method for
manufacturing a laminated chip component comprising alternately
laminated conductive patterns and insulating sheets, through-holes
which are provided in said insulating sheets, the method comprising
the steps of: printing conductive patterns on said insulating
sheets; printing auxiliary conductive patterns on the top faces of
said conductive patterns at positions facing said through-holes of
adjacent insulating sheets; and connecting an upper layer
conductive pattern to said auxiliary conductive pattern on a lower
layer conductive pattern by means of conductors which are provided
in the through-holes in said insulating sheets.
[0016] This invention is still further featured by a method for
manufacturing a laminated chip component comprising alternately
laminated conductive patterns and insulating sheets, through-holes
which are provided in said insulating sheets, the method comprising
the steps of: printing a first conductive pattern on an insulating
sheet; printing an auxiliary conductive pattern comprising the same
material as the second conductive pattern on the top face at the
connection section which connects to said second conductive pattern
of said first conductive pattern; and connecting the auxiliary
conductive pattern on the first conductive pattern to the second
conductive pattern by means of a conductor comprising the same
material as the second conductive pattern, the conductor being
provided in a through-hole in the laminated insulating sheets.
[0017] This invention is still further featured by a method for
manufacturing a laminated chip component comprising alternately
laminated conductive patterns and insulating sheets, through-holes
which are provided in said insulating sheets, the method comprising
the steps of: providing conductor sections in the insulating sheets
at positions facing the through-hole in adjacent insulating sheets;
printing conductive patterns on said insulating sheets and
providing conductors in said conductor sections; and connecting
said upper layer conductive pattern to said auxiliary conductive
pattern on said bottom layer conductive pattern by means of
conductors which are provided in the through-holes of said
insulating sheets.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] FIG. 1 is an exploded perspective view of a first embodiment
of the laminated chip component of this invention;
[0019] FIG. 2 is a cross-sectional view of FIG. 1;
[0020] FIGS. 3A and 3B are diagrams showing a manufacturing
sequence in the first embodiment of the laminated chip component of
this invention;
[0021] FIG. 4 is a cross-sectional view of a second embodiment of
the laminated chip component of this invention;
[0022] FIGS. 5A, 5B and 5C are diagrams showing a manufacturing
sequence in the second embodiment of the laminated chip component
of this invention;
[0023] FIG. 6 is a cross-sectional view of a third embodiment of
the laminated chip component of this invention;
[0024] FIG. 7 is an exploded perspective view of a conventional
laminated chip component;
[0025] FIG. 8 is a cross-sectional view of FIG. 7;
[0026] FIG. 9 is an exploded perspective view of another
conventional laminated chip component; and
[0027] FIG. 10 is a cross-sectional view of FIG. 9.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0028] The laminated chip component of the present invention
comprises first and second conductive patterns of different
materials. The first conductive pattern is formed on multiple first
insulating sheets. The multiple first insulating sheets are
laminated to obtain a laminated body containing a first element.
The second conductive pattern is formed on multiple second
insulating sheets. The multiple second insulating sheets are
laminated to obtain a laminated body containing a second element.
The laminated body containing the second element is provided on top
of the laminated body containing the first element.
[0029] An auxiliary conductive pattern comprises the same material
as the second conductive pattern, and is formed on the top face of
the connection between the first conductive pattern and the second
conductive pattern in the laminated body containing the first
element. Conductors comprising the same material as the second
conductive patterns are provided in through-holes in the insulating
sheets and connect the first and second conductive patterns. The
conductors comprising the same material as the second conductive
pattern are clasped on either side by the second conductive pattern
and the auxiliary conductive pattern comprising the same material
as second conductive pattern.
[0030] Preferred embodiments of the laminated chip component of
this invention will be explained with reference to FIGS. 1 to
6.
[0031] FIG. 1 is an exploded perspective view of a first embodiment
of the laminated chip component of this invention, and FIG. 2 is a
cross-sectional view of the same.
[0032] In FIGS. 1 and 2, reference numerals 11a, 11b, 11c, 11d, 11e
and 11f represent insulating sheets, reference numeral 12
represents a through-hole, reference numerals 13a, 13b, 13c, 13d,
13e and 13f represent conductive patterns for coil, and reference
numerals 15a, 15b and 15c represent conductive patterns for
capacitor.
[0033] The insulating sheets 11a, 11b, 11c, 11d, 11e and 11f
comprise a ceramic material such as a dielectric or a magnetic
substance.
[0034] A conductive pattern for capacitor 15a is formed on the top
face of the insulating sheet 11a. Conductive patterns for capacitor
15b and 15c are formed on the top face of the insulating sheet 11b.
A conductive pattern for capacitors 15a, 15b and 15c each comprises
an electrically conductive material, such as an alloy of silver and
palladium, copper, nickel and the like. Auxiliary conductive
patterns 16 are formed on the top face of the connection section
which connects to the coil of the conductive patterns/for
capacitors 15b and 15c. The auxiliary conductive patterns 16 are
approximately the some side or larger than the through-holes 12 in
the insulating sheet 11c. The electrically conductive material used
to form the auxiliary conductive patterns 16 is the same as that
used for the conductive patterns for coil explained later. A
capacitor is formed between the conductive patterns for capacitor
15a and 15b which are provided on opposite sides of the insulating
sheet 11b. A capacitor is also formed between the conductive
patterns for capacitor 15a and 15c which are provided on opposite
sides of the insulating sheet 11b.
[0035] Two conductive patterns for half-turn coil are formed on the
top faces of each of the insulating sheets 11c, 11d and 11e. The
conductive patterns for half-turn coil 13a, 13b, 13c, 13d, 13e and
13f each comprise an electrically conductive material such as
silver or copper. The electrically conductive material comprising
the conductive patterns for coil 13a, 13b, 13c, 13d, 13e and 13f is
different from the electrically conductive material comprising the
conductive patterns for capacitor. The conductive patterns for coil
13a, 13b and 13c are connected by conductors 14 which are provided
in the through-holes 12, thereby forming a coil. Similarly, the
conductive patterns for coil 13d, 13e and 13f are connected by
conductors 14 which are provided in the through-holes 12, thereby
forming a coil.
[0036] The conductive pattern for coil 13a which comprises this
coil is connected to the auxiliary conductive pattern 16 on the
conductive pattern for capacitor 15b by the conductor 14 provided
in the through-hole 12 in the insulating sheet 11c. The conductive
pattern for coil 13d which comprises this coil is connected to the
auxiliary conductive pattern 16 on the conductive pattern for
capacitor 15c by the conductor 14 provided in the through-hole 12
in the insulating sheet 10c. The material of the conductors 14
which connect the conductive patterns is the same as that used for
the conductive patterns for coil.
[0037] The conductive pattern for coil 13c and the conductive
pattern for coil 13f are extracted at both ends of the laminated
body and connected to terminals. The conductive pattern for
capacitor 15a is extracted at the sides of the laminated body where
the conductive patterns for coil are not extracted, and is
connected to terminals. The insulating sheet 11f protects the
conductive patterns for coil 13c and 13f which are formed on the
insulating sheet 11e.
[0038] The above laminated chip component is manufactured in the
following way. Firstly, the conductive patterns for capacitor 15b
and 15c are printed on the top face of the insulating sheet 11b.
The auxiliary conductive patterns 16 are printed on the top face of
the connection section which connect to the coil of the conductive
patterns for capacitor 15b and 15c. As shown in FIG. 3A, the
insulating sheet 11b is laminated on the top of the insulating
sheet 11a which the conductive pattern for capacitor is printed on.
Alternatively, this process may be performed in the following
sequence. After the insulating sheet 11b has been laminated on the
top of the insulating sheet 11a which the conductive pattern for
capacitor is printed on, the conductive patterns for capacitor 15b
and 15c are printed on the top face of the insulating sheet 11b.
Subsequently, the auxiliary conductive patterns 16 are printed on
the top face of the connection section which connects to the coil
of the conductive patterns for capacitor 15b and 15c.
[0039] As shown in FIG. 3B, the insulating sheet 11c is laminated
on the top of the insulating sheet 11b. The conductive patterns for
coil 13a and 13d are connected to the auxiliary conductive patterns
16 on the conductive patterns for capacitor 15b and 15c by
conductors which comprise the same material as the conductive
patterns for coil provided in the through-holes 12 of the
insulating sheet 11c. The conductive patterns for coil 13a and 13d
may be printed beforehand on the top face of the insulating sheet
11c prior to laminating the insulating sheet 11c onto the
insulating sheet 11b. Alternatively, they may be printed on the top
face of the insulating sheet 11c after the insulating sheet 11c has
been laminated onto the insulating sheet 11b.
[0040] The insulating sheets lid and 11e are sequentially laminated
on the insulating sheet 11c, thereby forming the coil.
[0041] FIG. 4 is a cross-sectional view of a second embodiment of
the laminated chip component of this invention.
[0042] A conductive pattern for capacitor 45a is formed on the top
face of an insulating sheet 41a. Conductive patterns for capacitor
45b and 45c are formed on the top face of an insulating sheet 41b.
A conductive pattern for capacitor 45a, 45b and 45c comprises an
electrically conductive material, such as an alloy of silver and
palladium, copper, nickel and the like. Conductor sections are
formed by providing cavities at a position which corresponding to
the connection between the conductive pattern for capacitor 45b,
45c and the conductive patterns for coil (explained later) in
insulating sheet 41b. The conductor sections are formed
approximately the same size or larger than through-holes 42 in the
insulating sheet 41c, and are provided conductors which comprise
the same material as the conductive pattern for coil (explained
later), at the positions which will connect with the conductive
pattern for coil.
[0043] A capacitor is formed between the conductive patterns for
capacitor 45a and 45b which are provided on the opposite sides of
the insulating sheet 41b. A capacitor is also formed between the
conductive patterns for capacitor 45a and 45c which are provided on
the opposite sides of the insulating sheet 41b.
[0044] Two conductive patterns for half-turn coil 43 are formed on
the top faces of each of the insulating sheets 41c, 41d and 41e.
Each of the conductive patterns for half-turn coil 43 comprises an
electrically conductive material such as silver or copper. The
upper layer conductive pattern for coil and the lower layer
conductive pattern for coil are connected by conductors 44 provided
in through-holes, thereby forming two coils within the laminated
body. The electrically conductive material comprising the
conductive patterns for coil 43 is different from the electrically
conductive material comprising the conductive patterns for
capacitor.
[0045] The conductive patterns for coil which comprise this coil
are connected to the conductive pattern for capacitor which
comprises this capacitor by the conductor 44 provided in the
through-hole of the insulating sheet 41c and the conductor 46
provided in the conductor section of the insulating sheet 41b. The
material of the conductors 44 and 46 is the same as that used for
the conductive patterns for coil. An insulating sheet 41f protects
the conductive pattern coil formed on the insulating sheet 41e.
[0046] In the laminated chip component configured in the manner
described above, conductor sections comprise cavities provided in
the conductive patterns for capacitor on the insulating sheet 41b
at the connections with the conductive patterns for coil, and
conductors comprising the same material as the conductive patterns
for coil are provided in the conductor sections. Therefore, more
stocks of electrically conductive material can be used to connect
the conductive patterns for coil and the conductive patterns for
capacitor than in the first embodiment.
[0047] The above laminated chip component is manufactured in the
following way. As shown in FIG. 5A, conductor sections 47 for
providing conductors comprising the same material as the conductive
pattern for coil are formed by providing cavities at positions
corresponding to the connection between the conductive pattern for
capacitor and the conductive pattern for coil in the insulating
sheet 41b.
[0048] As shown in FIG. 5B, the conductive patterns for capacitor
45b and 45c are printed on the top face of the insulating sheet
41b. Conductors 46 comprise the same material as the conductive
pattern for coil, and are provided in the conductor sections 47.
The insulating sheet 41b is laminated on top of the insulating
sheet 41a which the conductive pattern for capacitor is printed on.
Alternatively, these processes may be performed in the following
sequence. After the insulating sheet 41b has been laminated on top
of the insulating sheet 41a, the conductive patterns for capacitor
45b and 45c are printed on the top face of the insulating sheet
41b, and the conductor 46 comprising the same material as the
conductive pattern for coil is provided in the conductor
section.
[0049] Moreover, as shown in FIG. 5C, the insulating sheet 41c is
laminated on the insulating sheet 41b, and the conductive pattern
for coil 43 is connected to the conductive patterns for capacitor
45b and 45c by the conductor which comprises the same material as
the conductive pattern for coil and is provided in the through-hole
in the insulating sheet 41c. The coil is formed by sequentially
laminating the insulating sheets 41d and 41e on the insulating
sheet 41c FIG. 6 is a cross-sectional view of a third embodiment of
the laminated chip component of this invention.
[0050] Conductive patterns for capacitor 65 comprise an
electrically conductive material, such as an alloy of silver and
palladium, copper, nickel and the like, and are provided on the top
faces of insulating sheet 61a and 61b. A conductor section is
formed by providing a through-hole at the position which
corresponding to the connection between the conductive pattern for
capacitor and the conductive pattern for coil in the insulating
sheet 61b. The conductor section is formed approximately the same
size or larger than a through-hole 62 in the insulating sheet 61c,
and is provided with a conductor comprising the same material as
the conductive pattern for coil (explained later).
[0051] Conductive patterns 63 for half-turn coil comprise a
conductive material such as silver or copper. Two conductive
patterns 63 for half-turn coil are provided on the top face of each
of insulating sheets 61c, 61d and 61e. Conductors 64 are provided
in through-holes, and connect the upper layer conductive pattern
for coil to the lower layer conductive pattern for coil. These
conductive patterns for coil form two coils in the laminated body.
The conductive material of the conductive patterns for coil is a
different material to that of the conductive pattern for
capacitor.
[0052] The conductive patterns for coil which form this coil are
connected to the conductive pattern for capacitor which forms this
capacitor by the conductor 64 provided in the through-hole of the
insulating sheet 61c and the conductor 66 provided in the conductor
section of the insulating sheet 61b. The conductors 64 and 66
comprise the same material as the conductive patterns for coil.
[0053] The laminated chip component of this invention configured as
above, a conductor section comprising a through-hole is provided at
the connection of the conductive pattern for capacitor of the
insulating sheet 61b to the conductive pattern for coil, and a
conductor comprising the same material as the conductive pattern
for coil is provided in the through-hole. Therefore, the conductive
material for connecting the conductive pattern for coil to the
conductive pattern for capacitor can be stocked more fully than in
any of the preceding embodiments.
[0054] The present invention is not limited to the embodiments
described above. For example, the auxiliary conductive pattern may
be provided on the top face facing the through-holes of the
conductive pattern for coil. The auxiliary conductive pattern which
faces the through-hole of the conductive pattern can be one of many
types of shape such as circular, square, many-sided, etc. Moreover,
a laminated body containing a capacitor may be laminated on a
laminated body containing a coil. Alternatively, laminated bodies
containing capacitors may be laminated on both sides of a laminated
body containing a coil.
[0055] In the second and third embodiments, an additional auxiliary
conductor pattern comprising the same material as the conductive
pattern for coil may be formed on the top faces of the conductors
which are provided in the conductor sections and the conductive
patterns for capacitor.
[0056] The above description of the embodiments referred to a
circuit comprising coils and capacitors laminated together, but the
laminated chip component of this invention may be applied in an
inductance element.
[0057] As described above, according to the laminated chip
component of this invention, auxiliary conductive patterns which
are provided on the top faces of the conductive patterns at
positions facing the through-holes of adjacent insulating sheets.
Therefore, an electrically conductive material can be supplied from
the auxiliary conductive patterns provided on the top faces of the
conductive patterns to the conductors in the through-holes, even
when the conductive pattern and the conductors provided in the
through-holes shrink more than the insulating sheets. As a
consequence, breaks in the connections in the through-holes of the
insulating sheets can be prevented in the laminated chip component
of this invention even when the firing shrinkage rate of the
conductive patterns is greater than that of the insulating
sheets.
[0058] Further, according to the laminated chip component of this
invention, an auxiliary conductive pattern comprises the same
material as the second conductive pattern, and is provided on the
top face of the connection section which connect to the second
conductive pattern of the first conductive pattern. Therefore, an
electrically conductive material can be supplied from the auxiliary
conductive pattern, which comprises the same material as the second
conductive pattern and is provided on the top face of the first
conductive pattern, to the conductors comprising the same material
as the second conductive pattern which are provided in the
through-holes. As a consequence, breaks in the connections in the
through-holes of the insulating sheets can be prevented in the
laminated chip component of this invention even in the case where
the firing shrinkage rate of the conductive patterns is greater
than that of the insulating sheets, and the case where the firing
shrinkage rates and reactivity of the two types of conductive
pattern are different.
* * * * *