U.S. patent application number 10/185741 was filed with the patent office on 2003-08-14 for methods and apparatuses for use in switching between streaming video bitstreams.
Invention is credited to Li, Shipeng, Shen, Goubin, Sun, Xiaoyan, Wu, Feng.
Application Number | 20030151753 10/185741 |
Document ID | / |
Family ID | 27668244 |
Filed Date | 2003-08-14 |
United States Patent
Application |
20030151753 |
Kind Code |
A1 |
Li, Shipeng ; et
al. |
August 14, 2003 |
Methods and apparatuses for use in switching between streaming
video bitstreams
Abstract
Improved methods and apparatuses are provided for switching of
streaming data bitstreams, such as, for example, used in video
streaming and other related applications. Some desired
functionalities provided herein include random access, fast forward
and fast backward, error-resilience and bandwidth adaptation. The
improved methods and apparatuses can be configured to increase
coding efficiency of and/or reduce the amount of data needed to
encode a switching bitstream.
Inventors: |
Li, Shipeng; (Irvine,
CA) ; Wu, Feng; (Beijing, CN) ; Sun,
Xiaoyan; (Beijing, CN) ; Shen, Goubin;
(Beijing, CN) |
Correspondence
Address: |
LEE & HAYES PLLC
421 W RIVERSIDE AVENUE SUITE 500
SPOKANE
WA
99201
|
Family ID: |
27668244 |
Appl. No.: |
10/185741 |
Filed: |
June 27, 2002 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
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60355071 |
Feb 8, 2002 |
|
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Current U.S.
Class: |
358/1.9 ;
358/539; 375/E7.023; 375/E7.14; 375/E7.211; 375/E7.25 |
Current CPC
Class: |
H04N 19/577 20141101;
H04N 21/2662 20130101; H04N 21/23424 20130101; H04N 19/625
20141101; H04N 19/61 20141101; H04N 21/23439 20130101; H04N 19/126
20141101 |
Class at
Publication: |
358/1.9 ;
358/539 |
International
Class: |
G06F 015/00; B41J
001/00; H04N 001/46 |
Claims
What is claimed is:
1. An encoding method comprising: encoding data into a first
bitstream using a first quantization parameter; encoding said data
into a second bitstream using a second quantization parameter that
is different from said first quantization parameter; and generating
an encoded switching bitstream associated with said first and
second bitstreams using said first quantization parameter to
support up-switching between said first and second bitstreams and
using said second quantization parameter to support down-switching
between said first and second bitstreams.
2. The method as recited in claim 1, wherein said first
quantization parameter and said second quantization parameter are
decoupled.
3. The method as recited in claim 1, wherein encoded switching
bitstream is configured to support a plurality of up-switching
periods and a plurality of down-switching periods.
4. The method as recited in claim 3, wherein over a period of time
a number of said down-switching periods is greater than a number of
said up-switching periods.
5. The method as recited in claim 1, wherein said first bitstream
and said second bitstream have different data bit rates.
6. A computer-readable medium comprising computer-implementable
instructions for causing at least one processing unit to perform
acts comprising: encoding data into a first bitstream using a first
quantization parameter; encoding said data into a second bitstream
using a second quantization parameter that is different from said
first quantization parameter; and generating an encoded switching
bitstream associated with said first and second bitstreams using
said first quantization parameter to support up-switching between
said first and second bitstreams and using said second quantization
parameter to support down-switching between said first and second
bitstreams.
7. The computer-readable medium as recited in claim 6, wherein said
first quantization parameter and said second quantization parameter
are decoupled.
8. The method as recited in claim 6, wherein encoded switching
bitstream is configured to support a plurality of up-switching
periods and a plurality of down-switching periods.
9. The computer-readable medium as recited in claim 8, wherein over
a period of time a number of said down-switching periods is greater
than a number of said up-switching periods.
10. The computer-readable medium as recited in claim 6, wherein
said first bitstream and said second bitstream have different data
bit rates.
11. An apparatus comprising: a first bitstream encoder configured
to encode data into an encoded first bitstream using a first
quantization parameter; a second bitstream encoder configured to
encode said data into an encoded second bitstream using a second
quantization parameter that is different from said first
quantization parameter; and a switching bitstream encoder
operatively coupled to said first bitstream encoder and said second
bitstream encoder and configured to output an encoded switching
bitstream that supports up-switching and down-switching between
said first encoded bitstream and said second encoded bitstream
based on information processed using said first and second
quantization parameters.
12. The apparatus as recited in claim 11, wherein said first
quantization parameter and said second quantization parameter are
decoupled.
13. The apparatus as recited in claim 11, wherein said encoded
switching bitstream is configured to support a plurality of
up-switching periods and a plurality of down-switching periods.
14. The apparatus as recited in claim 13, wherein over a period of
time a number of said down-switching periods is greater than a
number of said up-switching periods.
15. The apparatus as recited in claim 11, wherein said first
bitstream and said second bitstream have different data bit
rates.
16. A decoding method comprising: receiving at least one encoded
bitstream selected from a group comprising a first bitstream that
was generated using a first quantization parameter and a second
bitstream that was generated using a second quantization parameter
that is different from said first quantization parameter; decoding
said received encoded bitstream; receiving an encoded switching
bitstream associated with said first and second bitstreams that was
generated using said first quantization parameter to support
up-switching between said first and second bitstreams and using
said second quantization parameter to support down-switching
between said first and second bitstreams; and decoding said
received encoded switching bitstream using said first and second
quantization parameters.
17. The method as recited in claim 16, wherein said first
quantization parameter and said second quantization parameter are
decoupled.
18. The method as recited in claim 16, wherein decoding said
received encoded switching bitstream occurs during at least one
period selected from a group comprising at least one of a plurality
of up-switching periods and at least one of a plurality of
down-switching periods.
19. The method as recited in claim 18, wherein over a period of
time a number of said down-switching periods is greater than a
number of said up-switching periods.
20. The method as recited in claim 16, wherein said first bitstream
and said second bitstream have different data bit rates.
21. A computer-readable medium comprising computer-implementable
instructions for causing at least one processing unit to perform
acts comprising: receiving at least one encoded bitstream selected
from a group comprising a first bitstream that was generated using
a first quantization parameter and a second bitstream that was
generated using a second quantization parameter that is different
from said first quantization parameter; decoding said received
encoded bitstream; receiving an encoded switching bitstream
associated with said first and second bitstreams that was generated
using said first quantization parameter to support up-switching
between said first and second bitstreams and using said second
quantization parameter to support down-switching between said first
and second bitstreams; and decoding said received encoded switching
bitstream using said first and second quantization parameters.
22. The computer-readable medium as recited in claim 21, wherein
said first quantization parameter and said second quantization
parameter are decoupled.
23. The computer-readable medium as recited in claim 21, wherein
decoding said received encoded switching bitstream occurs during at
least one period selected from a group comprising at least one of a
plurality of up-switching periods and at least one of a plurality
of down-switching periods.
24. The computer-readable medium as recited in claim 23, wherein
over a period of time a number of said down-switching periods is
greater than a number of said up-switching periods.
25. The computer-readable medium as recited in claim 21, wherein
said first bitstream and said second bitstream have different data
bit rates.
26. An apparatus comprising: a first decoder configured to decode a
first encoded bitstream into a decoded first bitstream using a
first quantization parameter; a second decoder configured to decode
a second bitstream into a decoded second bitstream using a second
quantization parameter that is different from said first
quantization parameter; and a switching bitstream decoder
operatively coupled to said first decoder and said second decoder
and configured to output a decoded switching bitstream that
supports up-switching and down-switching between said first decoded
bitstream and said second decoded bitstream based on information
processed using said first and second quantization parameters.
27. The apparatus as recited in claim 26, wherein said first
quantization parameter and said second quantization parameter are
decoupled.
28. The apparatus as recited in claim 26, wherein decoding said
received encoded switching bitstream occurs during at least one
period selected from a group comprising at least one of a plurality
of up-switching periods and at least one of a plurality of
down-switching periods.
29. The apparatus as recited in claim 28, wherein over a period of
time a number of said down-switching periods is greater than a
number of said up-switching periods.
30. The apparatus as recited in claim 26, wherein said first
bitstream and said second bitstream have different data bit
rates.
31. A decoding method comprising: reconstructing DCT reference
data; and quantizing said reconstructed DCT reference data using a
quantization step (Qs) on the reconstructed DCT reference and not
on decoded DCT residue and the DCT prediction data.
32. The decoding method as recited in claim 31, wherein quantizing
said reconstructed DCT reference data is represented by:
Y=[X*A(Qs)+2.sup.19]/2.sup.20, wherein X includes a reconstructed
DCT coefficient and Y includes a quantized DCT coefficient, and
A(.) is associated with a quantization table
33. The decoding method as recited in claim 31, further comprising:
merging a dequantization QP and quantization QS in to one operation
represented by: 2 L rec = [ K pred ( i , j ) + L err ( i , j ) * (
2 20 + A ( Qp ) / 2 ) A ( Qp ) ] * A ( Qs ) + 2 19 2 20 ,where
L.sub.err are levels of the prediction error coefficients,
K.sub.pred are prediction coefficients.
34. The decoding method as recited in claim 33, further comprising
generating data for a high quality display based at least in part
on 3 K pred ( i , j ) + L err ( i , j ) * ( 2 20 + A ( Qp ) / 2 ) A
( Qp ) .
35. The decoding method as recited in claim 31 further comprising:
selectively reconstructing different qualities of display
images.
36. The decoding method as recited in claim 31 further comprising
receiving decoder notification data associated with at least one
switching event.
37. The decoding method as recited in claim 36, wherein said
decoder notification includes at least a one-bit syntax having a
switching bitstream flag.
38. The decoding method as recited in claim 37, wherein said
decoder notification data includes at least one quantization
parameter.
39. A computer-readable medium having computer-implementable
instructions for causing at least one processing unit to perform
acts comprising: decoding bitstream data by: reconstructing DCT
reference data; and quantizing said reconstructed DCT reference
data using a quantization step (Qs) on the reconstructed DCT
reference and not on decoded DCT residue and the DCT prediction
data.
40. The computer-readable medium as recited in claim 39, wherein
quantizing said reconstructed DCT reference data is represented by:
Y=[X*A(Qs)+2.sup.19]/2.sup.20, wherein X includes a reconstructed
DCT coefficient and Y includes a quantized DCT coefficient, and
A(.) is associated with a quantization table
41. The computer-readable medium as recited in claim 39, having
computer-implementable instructions for causing the at least one
processing unit to perform further acts comprising: merging a
dequantization QP and quantization QS in to one operation
represented by: 4 L rec = [ K pred ( i , j ) + L err ( i , j ) * (
2 20 + A ( Qp ) / 2 ) A ( Qp ) ] * A ( Qs ) + 2 19 2 20 ,where
L.sub.err are levels of the prediction error coefficients,
K.sub.pred are prediction coefficients.
42. The computer-readable medium as recited in claim 41, having
computer-implementable instructions for causing the at least one
processing unit to perform further acts comprising: comprising
generating data for a high quality display based at least in part
on 5 K pred ( i , j ) + L err ( i , j ) * ( 2 20 + A ( Qp ) / 2 ) A
( Qp ) .
43. The computer-readable medium as recited in claim 39 having
computer-implementable instructions for causing the at least one
processing unit to perform further acts comprising: selectively
reconstructing different qualities of display images.
44. The computer-readable medium as recited in claim 39 having
computer-implementable instructions for causing the at least one
processing unit to perform further acts comprising: receiving
decoder notification data associated with at least one switching
event.
45. The computer-readable medium as recited in claim 44, wherein
said decoder notification includes at least a one-bit syntax having
a switching bitstream flag.
46. The computer-readable medium as recited in claim 45, wherein
said decoder notification data includes at least one quantization
parameter.
47. A decoder comprising: logic operatively configured to
reconstruct DCT reference data and quantize said reconstructed DCT
reference data using a quantization step (Qs) on the reconstructed
DCT reference and not on decoded DCT residue and the DCT prediction
data.
48. The decoder as recited in claim 47, wherein said logic
quantizes said reconstructed DCT reference data as:
Y=[X*A(Qs)+2.sup.19]/2.sup.20, wherein X includes a reconstructed
DCT coefficient and Y includes a quantized DCT coefficient, and
A(.) is associated with a quantization table
49. The decoder as recited in claim 47, wherein said logic merges a
dequantization QP and quantization QS into one operation
represented by: 6 L rec = [ K pred ( i , j ) + L err ( i , j ) * (
2 20 + A ( Qp ) / 2 ) A ( Qp ) ] * A ( Qs ) + 2 19 2 20 ,where
L.sub.err are levels of the prediction error coefficients,
K.sub.pred are prediction coefficients.
50. The decoder as recited in claim 49, wherein said logic is
further configured to generate data for a high quality display
based at least in part on 7 K pred ( i , j ) + L err ( i , j ) * (
2 20 + A ( Qp ) / 2 ) A ( Qp ) .
51. The decoder as recited in claim 47, wherein said logic si
fitehr configured to selectively reconstruct different qualities of
display images.
52. The decoder as recited in claim 47 wherein said logic is
further configured to receive decoder notification data associated
with at least one switching event.
53. The decoder as recited in claim 52, wherein said decoder
notification includes at least a one-bit syntax having a switching
bitstream flag.
54. The decoder as recited in claim 53, wherein said decoder
notification data includes at least one quantization parameter.
Description
RELATED PATENT APPLICATIONS
[0001] This U.S. Non-provisional Application for Letters Patent
further claims the benefit of priority from, and hereby
incorporates by reference the entire disclosure of, co-pending U.S.
Provisional Application for Letters Patent Serial No. 60/355,071,
filed Feb. 8, 2002.
[0002] Furthermore, this U.S. Non-provisional Application for
Letters Patent is related to a co-pending application Ser. No.
______ (Attorney's Docket Number MS1-1218US), filed Jun. 27, 2002,
and titled "Seamless Switching Of Scalable Video Bitstreams".
TECHNICAL FIELD
[0003] This invention relates to data bitstreams, and more
particularly to methods and apparatuses for switching between
different streaming bitstreams.
BACKGROUND
[0004] With steady growth of access bandwidth, more and more
Internet applications start to use streaming audio and video
contents. Since the current Internet is inherently a heterogeneous
and dynamical best-effort network, channel bandwidth usually
fluctuates in a wide range from bit rate below 64 kbps to well
above 1 Mbps. This brings great challenges to video coding and
streaming technologies in providing a smooth playback experience
and best available video quality to the users. To deal with the
network bandwidth variations, two main approaches, namely,
switching among multiple non-scalable bitstreams and streaming with
a single scalable bitstream, have been extensively investigated in
recent years.
[0005] In the first approach, a video sequence is compressed into
several non-scalable bitstreams at different bit rates. Some
special frames, known as key frames, are either compressed without
prediction or coded with an extra switching bitstream. Key frames
provide access points to switch among these bitstreams to fit in
the available bandwidth. One advantage of this method is the high
coding efficiency with non-scalable bitstreams. However, due to
limitation in both the number of bitstreams and switching points,
this method only provides coarse and sluggish capability in
adapting to channel bandwidth variations.
[0006] In the second approach, a video sequence is compressed into
a single scalable bitstream, which can be truncated flexibly to
adapt to bandwidth variations. Among numerous scalable coding
techniques, MPEG-4 Fine Granularity Scalable (FGS) coding has
become prominent due to its fine-grain scalability. Since the
enhancement bitstream can be truncated arbitrarily in any frame,
FGS provides a remarkable capability in readily and precisely
adapting to channel bandwidth variations. However, low coding
efficiency is the vital disadvantage that prevents FGS from being
widely deployed in video streaming applications. Progressive Fine
Granularity Scalable (PFGS) coding scheme is a significant
improvement over FGS by introducing two prediction loops with
different quality references. On the other hand, since only one
high quality reference is used in enhancement layer coding, most
coding efficiency gain appears within a certain bit rate range
around the high quality reference. Generally, with today's
technologies, there is still a coding efficiency loss compared with
the non-scalable case at fixed bit rates.
[0007] Nevertheless, bandwidth fluctuations remain a problem for
streaming video in the current Internet. Conventional streaming
video systems typically try to address this problem by switching
between different video bitstreams with different bit-rates, for
example, as described above. However, in these and other existing
video coding schemes, the switching points are restricted only to
key frames (e.g., typically I-frames) to avoid drifting problems.
Such key frames are usually encoded far apart from each other to
preserve high coding efficiency, so bitstream switching can only
take place periodically. This greatly reduces the adaptation
capability of existing streaming systems. Consequently, a viewer
may experience frequent pausing and re-buffering when watching a
streaming video.
[0008] Hence, there is a need for improved method and apparatuses
for use in switching streaming bitstreams.
SUMMARY
[0009] Improved methods and apparatuses are provided for switching
of streaming data bitstreams, such as, for example, used in video
streaming and other related applications. Some desired
functionalities provided herein include random access, fast forward
and fast backward, error-resilience and bandwidth adaptation. The
improved methods and apparatuses can be configured to increase
coding efficiency of and/or reduce the amount of data needed to
encode a switching bitstream.
[0010] In accordance with certain exemplary implementations of the
present invention, an encoding method is provided. The method
includes encoding data into a first bitstream using a first
quantization parameter and encoding the data into a second
bitstream using a second quantization parameter that is different
from the first quantization parameter. The method also includes
generating an encoded switching bitstream associated with the first
and second bitstreams using the first quantization parameter to
support up-switching between the first and second bitstreams and
using the second quantization parameter to support down-switching
between the first and second bitstreams.
[0011] An exemplary apparatus includes a first bitstream encoder
configured to encode data into an encoded first bitstream using a
first quantization parameter and a second bitstream encoder
configured to encode the data into an encoded second bitstream
using a second quantization parameter that is different from the
first quantization parameter. The apparatus also includes a
switching bitstream encoder operatively coupled to the first
bitstream encoder and the second bitstream encoder and configured
to output an encoded switching bitstream that supports up-switching
and down-switching between the first encoded bitstream and the
second encoded bitstream based on information processed using the
first and second quantization parameters.
[0012] An exemplary decoding method includes receiving at least one
encoded bitstream, such as, a first bitstream that was generated
using a first quantization parameter and/or a second bitstream that
was generated using a second quantization parameter that is
different from the first quantization parameter. The received
encoded bitstream is decoded. The decoding method further includes
receiving an encoded switching bitstream associated with the first
and second bitstreams that was generated using the first
quantization parameter to support up-switching between the first
and second bitstreams and using the second quantization parameter
to support down-switching between the first and second bitstreams.
The method also includes decoding the received encoded switching
bitstream using the first and second quantization parameters.
[0013] Another exemplary apparatus includes a first decoder
configured to decode a first encoded bitstream into a decoded first
bitstream using a first quantization parameter and a second decoder
configured to decode a second bitstream into a decoded second
bitstream using a second quantization parameter that is different
from the first quantization parameter. The apparatus also includes
a switching bitstream decoder that is operatively coupled to the
first decoder and the second decoder and configured to output a
decoded switching bitstream that supports up-switching and
down-switching between the first decoded bitstream and the second
decoded bitstream based on information processed using the first
and second quantization parameters.
BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The present invention is illustrated by way of example and
not limitation in the figures of the accompanying drawings. The
same numbers are used throughout the figures to reference like
components and/or features.
[0015] FIG. 1 is a block diagram depicting an exemplary computing
environment that is suitable for use with certain implementations
of the present invention.
[0016] FIG. 2 is a diagram illustratively depicting switching
between bitstreams, in accordance with certain exemplary
implementations of the present invention.
[0017] FIG. 3 is a block diagram depicting a conventional
decoder.
[0018] FIG. 4 is a block diagram depicting a conventional
encoder.
[0019] FIG. 5 is block diagram depicting an improved decoder, in
accordance with certain exemplary implementations of the present
invention.
[0020] FIG. 6 is block diagram depicting an improved encoder, in
accordance with certain exemplary implementations of the present
invention.
[0021] FIG. 7 is block diagram depicting an improved decoder, in
accordance with certain further exemplary implementations of the
present invention.
[0022] FIG. 8 is block diagram depicting an improved encoder, in
accordance with certain further exemplary implementations of the
present invention.
[0023] FIG. 9 is block diagram depicting an improved decoder, in
accordance with still other exemplary implementations of the
present invention.
[0024] FIG. 10 is block diagram depicting an improved decoder, in
accordance with still other exemplary implementations of the
present invention.
[0025] FIG. 11 is block diagram depicting an improved encoder, in
accordance with still other exemplary implementations of the
present invention.
DETAILED DESCRIPTION
[0026] Ragip Kurceren and Marta Karczewicz, in a document titled
"Improved SP-frame Encoding", VCEG-M-73, ITU-T Video Coding Experts
Group Meeting, Austin, Tex., 02-04 April 2001 (hereinafter simply
referred to as Kurceren et al.), proposed a switching scheme that
allows seamless switching between bitstreams with different
bit-rate. It introduced a special frame called an SP picture that
serves as a switching point in a video sequence.
[0027] A similar representative switching process 200 is depicted
in the illustrative diagram in FIG. 2. Here, switching is shown as
occurring from bitstream 1 to bitstream 2 using SP pictures.
[0028] The streaming system usually either transmits bitstream 1 or
bitstream 2, for example, depending on the current channel
bandwidth. However, when the channel bandwidth changes, the
transmitted bitstream can be switched to a bit-rate that matches
the current channel condition, for example, to improve the video
quality if bandwidth increases and to maintain smooth playback if
bandwidth drops.
[0029] When switching from bitstream 1 to bitstream 2, the
streaming system does not need to wait for a key frame to start the
switching process. Instead, it can switch at the SP frames. At SP
frames, the streaming system sends a switching bitstream S12, and
the decoder decodes the switching bitstream using the same
techniques without knowing whether it is S1, S2 or S12. Thus, the
bitstream switching is transparent to the decoder. The decoded
frame will be exactly the same as the reference frame for the next
frame prediction in bitstream 2. As such, there should not be any
drifting problems.
[0030] An exemplary conventional decoder 300 and encoder 400 are
depicted in FIG. 3 and FIG. 4, respectively. A more detailed
description of the scheme can be found in Kurceren et al. There are
some potential issues with the scheme in Kurceren et al.
[0031] For example, in real streaming applications, it is usually
desirable to be able to switch down from a high bit-rate bitstream
to a low bit-rate one very quickly. This is a desirable feature,
for example, for TCP-friendly protocols currently used in many
existing streaming systems. On the other hand, switching up from a
low bit-rate video bitstream to a high bit-rate does not usually
have to be done as quickly as switching down. This is again a
feature of the TCP-friendly protocols, for example.
[0032] Therefore, it would be useful to support more rapid and
frequent down-switching. Indeed, as mentioned, the very reason for
down-switching is often related to reduced/reducing channel
bandwidth capabilities. The size of the down-switching bitstream
may often be much smaller than that of the up-switching one. Since
the high bit-rate bitstream typically contains most of the
information of a low bit-rate one, in theory, one should be able to
configure the scheme to make the size of switching bitstream
sufficiently small.
[0033] However, the scheme in Kurceren et al. only allows the same
Qs for both the down-switching bitstream and up-switching bitstream
(see, e.g., FIG. 4), and the Qs is included in the prediction and
reconstruction loop. The introduction of quantization Qs in the
prediction and reconstruction loop will inevitably degrade the
coding efficiency of the original bitstreams without SP frames. If
one sets Qs too small, high coding efficiency for both bitstreams 1
and 2 can be achieved. However, the difference for down-switching
is also fine-grain quantized and it would result a very large
down-switching bitstream. Conversely, if one sets Qs too large,
although obtaining a very compact switching bitstream, the coding
efficiency of bitstreams 1 and 2 will be severely degraded, which
is not desired either. It appears that this demonstrative
contradiction can not be solved by the techniques proposed in
Kurceren et al., which make a compromise between coding efficiency
and the size of the switching bitstream.
[0034] Furthermore, there are many quantization and dequantization
processes in the signal flow in the encoder proposed in Kurceren et
al. (see, e.g., FIG. 4). This tends to further degrade the coding
efficiency of bitstreams 1 and 2. There is also a mismatch between
the prediction reference and reconstruction reference in Kurceren
et al. that may contribute to the coding efficiency degradation of
bitstreams 1 and 2.
[0035] In order to address these and other issues/problems improved
methods and apparatuses are provided herein that allow different Qs
for switching up and switching down. The block diagrams depicted in
FIG. 5 and FIG. 6 illustrate an improved decoder and encoder,
respectively, in accordance with certain implementations of the
present invention.
[0036] In accordance with certain aspects of the present invention,
the proposed techniques solve the contradiction existing in the
scheme proposed in Kurceren et al. so that the down-switching
bitstream can be encoded to have significantly reduced, if not
minimal, size while the coding efficiency of bitstreams 1 and 2 is
also well preserved.
[0037] In accordance with certain other aspects of the present
invention, the switching points for up-switching and down-switching
can be decoupled. This means that one can encode more switching
down points than switching-up points, for example, to suit the
TCP-friendly protocols, etc. Moreover, such decoupling allows for
further improved coding efficiency of the bitstream that the system
is switched from, for example, by individually setting the Qs in
the reconstruction loop to an appropriately small value.
[0038] In accordance with certain other aspects of the present
invention, the improved methods and apparatuses can be further
simplified and additional quantization and dequantization processes
can be readily removed. For example, FIG. 7 and FIG. 8 illustrate
an exemplary decoder and encoder, respectively, that support both
high coding efficiency for the normal bitstreams and a compact size
for the switching bitstream.
[0039] Exemplary Operational Environments:
[0040] Turning to the drawings, wherein like reference numerals
refer to like elements, the invention is illustrated as being
implemented in a suitable computing environment. Although not
required, the invention will be described in the general context of
computer-executable instructions, such as program modules, being
executed by a personal computer.
[0041] Generally, program modules include routines, programs,
objects, components, data structures, etc. that perform particular
tasks or implement particular abstract data types. Those skilled in
the art will appreciate that the invention may be practiced with
other computer system configurations, including hand-held devices,
multi-processor systems, microprocessor based or X programmable
consumer electronics, network PCs, minicomputers, mainframe
computers, portable communication devices, and the like.
[0042] The invention may also be practiced in distributed computing
environments where tasks are performed by remote processing devices
that are linked through a communications network. In a distributed
computing environment, program modules may be located in both local
and remote memory storage devices.
[0043] FIG. 1 illustrates an example of a suitable computing
environment 120 on which the subsequently described systems,
apparatuses and methods may be implemented. Exemplary computing
environment 120 is only one example of a suitable computing
environment and is not intended to suggest any limitation as to the
scope of use or functionality of the improved methods and systems
described herein. Neither should computing environment 120 be
interpreted as having any dependency or requirement relating to any
one or combination of components illustrated in computing
environment 120.
[0044] The improved methods and systems herein are operational with
numerous other general purpose or special purpose computing system
environments or configurations. Examples of well known computing
systems, environments, and/or configurations that may be suitable
include, but are not limited to, personal computers, server
computers, thin clients, thick clients, hand-held or laptop
devices, multiprocessor systems, microprocessor-based systems, set
top boxes, programmable consumer electronics, network PCs,
minicomputers, mainframe computers, distributed computing
environments that include any of the above systems or devices, and
the like.
[0045] As shown in FIG. 1, computing environment 120 includes a
general-purpose computing device in the form of a computer 130. The
components of computer 130 may include one or more processors or
processing units 132, a system memory 134, and a bus 136 that
couples various system components including system memory 134 to
processor 132.
[0046] Bus 136 represents one or more of any of several types of
bus structures, including a memory bus or memory controller, a
peripheral bus, an accelerated graphics port, and a processor or
local bus using any of a variety of bus architectures. By way of
example, and not limitation, such architectures include Industry
Standard Architecture (ISA) bus, Micro Channel Architecture (MCA)
bus, Enhanced ISA (EISA) bus, Video Electronics Standards
Association (VESA) local bus, and Peripheral Component
Interconnects (PCI) bus also known as Mezzanine bus.
[0047] Computer 130 typically includes a variety of computer
readable media. Such media may be any available media that is
accessible by computer 130, and it includes both volatile and
non-volatile media, removable and non-removable media.
[0048] In FIG. 1, system memory 134 includes computer readable
media in the form of volatile memory, such as random access memory
(RAM) 140, and/or non-volatile memory, such as read only memory
(ROM) 138. A basic input/output system (BIOS) 142, containing the
basic routines that help to transfer information between elements
within computer 130, such as during start-up, is stored in ROM 138.
RAM 140 typically contains data and/or program modules that are
immediately accessible to and/or presently being operated on by
processor 132.
[0049] Computer 130 may further include other
removable/non-removable, volatile/non-volatile computer storage
media. For example, FIG. 1 illustrates a hard disk drive 144 for
reading from and writing to a non-removable, non-volatile magnetic
media (not shown and typically called a "hard drive"), a magnetic
disk drive 146 for reading from and writing to a removable,
non-volatile magnetic disk 148 (e.g., a "floppy disk"), and an
optical disk drive 150 for reading from or writing to a removable,
non-volatile optical disk 152 such as a CD-ROM/R/RW,
DVD-ROM/R/RW/+R/RAM or other optical media. Hard disk drive 144,
magnetic disk drive 146 and optical disk drive 150 are each
connected to bus 136 by one or more interfaces 154.
[0050] The drives and associated computer-readable media provide
nonvolatile storage of computer readable instructions, data
structures, program modules, and other data for computer 130.
Although the exemplary environment described herein employs a hard
disk, a removable magnetic disk 148 and a removable optical disk
152, it should be appreciated by those skilled in the art that
other types of computer readable media which can store data that is
accessible by a computer, such as magnetic cassettes, flash memory
cards, digital video disks, random access memories (RAMs), read
only memories (ROM), and the like, may also be used in the
exemplary operating environment.
[0051] A number of program modules may be stored on the hard disk,
magnetic disk 148, optical disk 152, ROM 138, or RAM 140,
including, e.g., an operating system 158, one or more application
programs 160, other program modules 162, and program data 164.
[0052] The improved methods and systems described herein may be
implemented within operating system 158, one or more application
programs 160, other program modules 162, and/or program data
164.
[0053] A user may provide commands and information into computer
130 through input devices such as keyboard 166 and pointing device
168 (such as a "mouse"). Other input devices (not shown) may
include a microphone, joystick, game pad, satellite dish, serial
port, scanner, camera, etc. These and other input devices are
connected to the processing unit 132 through a user input interface
170 that is coupled to bus 136, but may be connected by other
interface and bus structures, such as a parallel port, game port,
or a universal serial bus (USB).
[0054] A monitor 172 or other type of display device is also
connected to bus 136 via an interface, such as a video adapter 174.
In addition to monitor 172, personal computers typically include
other peripheral output devices (not shown), such as speakers and
printers, which may be connected through output peripheral
interface 175.
[0055] Computer 130 may operate in a networked environment using
logical connections to one or more remote computers, such as a
remote computer 182. Remote computer 182 may include many or all of
the elements and features described herein relative to computer
130.
[0056] Logical connections shown in FIG. 1 are a local area network
(LAN) 177 and a general wide area network (WAN) 179. Such
networking environments are commonplace in offices, enterprise-wide
computer networks, intranets, and the Internet.
[0057] When used in a LAN networking environment, computer 130 is
connected to LAN 177 via network interface or adapter 186. When
used in a WAN networking environment, the computer typically
includes a modem 178 or other means for establishing communications
over WAN 179. Modem 178, which may be internal or external, may be
connected to system bus 136 via the user input interface 170 or
other appropriate mechanism.
[0058] Depicted in FIG. 1, is a specific implementation of a WAN
via the Internet. Here, computer 130 employs modem 178 to establish
communications with at least one remote computer 182 via the
Internet 180.
[0059] In a networked environment, program modules depicted
relative to computer 130, or portions thereof, may be stored in a
remote memory storage device. Thus, e.g., as depicted in FIG. 1,
remote application programs 189 may reside on a memory device of
remote computer 182. It will be appreciated that the network
connections shown and described are exemplary and other means of
establishing a communications link between the computers may be
used.
[0060] Exemplary Switching Schemes:
[0061] In this section, exemplary encoder and the decoder methods
and apparatuses are described in more detail with reference to
FIGS. 5-8. For comparison, additional description of the
architecture proposed by Kurceren et al is also provided.
[0062] The modules and notations used in FIGS. 3-8 are defined as
follows:
[0063] DCT: Discrete cosine transform.
[0064] IDCT: Inverse discrete cosine transform.
[0065] Entropy Encoding: Entropy encoding of quantized
coefficients. It could be arithmetic coding or variable length
coding.
[0066] Entropy Decoding: Entropy decoding of quantized
coefficients. It could be arithmetic decoding or variable length
decoding that matches the corresponding modules in the encoder.
[0067] Q: Quantization.
[0068] Q.sup.-1: Inverse Quantization or dequantization.
[0069] MC: Motion compensation module, where a predicted frame is
formed according to the motion vectors and the reference in the
frame buffer.
[0070] ME: Motion estimation module, where the motion vectors are
searched to best predict the current frame.
[0071] Loop Filter: A smoothing filter in the motion compensation
loop to reduce the blocking artifacts.
[0072] FrameBuffer0: A frame buffer that holds the reference frame
for next frame encoding/decoding.
[0073] P Picture: A frame encoded using traditional motion
compensated predictive coding.
[0074] SP Picture: A frame encoded as a switching frame using the
proposed motion compensated predictive coding.
[0075] Switching Bitstream: The bitstream transmitted to make
seamless transition from one bitstream to another.
[0076] There are some basic assumptions on the quantization and
dequantization:
[0077] If L.sub.1=Q(K.sub.1), Q(Q.sup.-1(K.sub.1))=L.sub.1;
[0078] If L.sub.1=Q(K.sub.1) and L.sub.2=Q(K.sub.2),
Q(Q.sup.-1(L.sub.1)+Q.sup.-1(L.sub.2))=L.sub.1+L.sub.2;
[0079] If L.sub.1=Q(K.sub.1),
Q(Q.sup.-1(L.sub.1)+K.sub.2))=L.sub.1+Q(K.su- b.2);
[0080] The following descriptions work for the inter-macroblocks in
a frame. For intra-macroblocks, a simple "copy" operation can be
used.
[0081] Reference is now made to the conventional decoding process
illustrated, for example, in FIG. 3. Here, the decoding of SP frame
S1 or S2 in a normal bitstream is shown. Using S1 as an example,
after entropy decoding of the bitstream S1, the levels of the
prediction error coefficients, L.sub.err1, and motion vectors, are
generated for the macroblock. Levels L.sub.err1 are dequantized
using dequantizer QP.sub.1.sup.-1:
[0082] K.sub.serr1=QP.sub.1.sup.-1(L.sub.err1).
[0083] After motion compensation, perform forward DCT transform for
the predicted macroblock and obtain K.sub.pred1, the reconstructed
coefficients K.sub.rec1 are obtained by:
[0084] K.sub.rec1=K.sub.pred1+K.sub.serr1.
[0085] The reconstructed coefficients K.sub.rec1 are quantized by
Qs to obtain reconstructed levels L.sub.rec1,
[0086] L.sub.rec1=Qs(K.sub.rec1).
[0087] The levels L.sub.rec1 are dequantized using Qs.sup.-1 and
the inverse DCT transform is performed to obtain the reconstructed
image. The reconstructed image will go through a loop filter to
smooth certain blocky artifacts and output to the display and to
the frame buffer for the next frame decoding.
[0088] When decoding of switching bitstream S12, e.g., when
switching from bitstream 1 to bitstream 2, the decoding process is
the same as the decoding of S1, except that the input is bitstream
S12, QP.sub.1.sup.-1 is replaced by Qs.sup.-1, K.sub.serr1 is
replaced by K.sub.serr12, L.sub.rec1 is replaced by L.sub.rec2,
K.sub.rec1 is replaced by K.sub.rec12, and L.sub.err1 is replaced
by L.sub.err12.
[0089] The resultant picture is the same as that decoded from S2.
Thus a drifting-free switching from bitstream 1 to bitstream 2 is
achieved. Qs is encoded in the S12 bitstream.
[0090] Reference is now made to FIG. 4 and the exemplary
conventional encoding process that is illustrated for encoding of
SP frame S1 or S2 in a normal bitstream. Here, S1 is used as an
example.
[0091] DCT transform to the macroblock of the original video is
performed, and the obtained coefficients as K.sub.ong1 denoted.
After motion compensation, a DCT transform is performed to the
predicted macroblock, and the obtained coefficients as K.sub.pred1
denoted. The next step is to quantize K.sub.pred1 using Qs and
obtain levels L.sub.pred1.
[0092] L.sub.pred1=Qs(K.sub.pred1).
[0093] Then dequantize L.sub.pred1 using dequantizer Qs.sup.-1,
K.sub.spred1=Qs.sup.-1(L.sub.pred1) and subtract K.sub.spred1 from
K.sub.orig1 to obtain error coefficients K.sub.err1,
[0094] K.sub.err1=K.sub.orig1-K.sub.pred1.
[0095] Then quantize K.sub.err1 using QP.sub.1 and obtain error
levels L.sub.err1,
[0096] L.sub.err1=QP.sub.1(K.sub.err1).
[0097] Next, perform entropy encoding on L.sub.err1 and obtain
bitstream S1. Using the S1 decoder described above, for example,
reconstruct levels L.sub.rec1 and the reference for the next frame
encoding. Note that in this example there is a quantizer Qs and a
dequantizer Qs.sup.-1 in the reconstruction loop.
[0098] Notice that there is a mismatch between prediction reference
and reconstruction reference in this scheme. The encoding of
switching bitstream S12 (switching from bitstream 1 to bitstream
2). The encoding of S12 is based on the encoding of S1 and S2.
L.sub.pred1 is subtracted by the S1 encoder from the reconstructed
level L.sub.rec2 in S2 encoder.
[0099] L.sub.err12=L.sub.rec2-L.sub.pred1.
[0100] Entropy encoding is performed with L.sub.err12 and bitstream
S12.
[0101] An improved decoding process 500 of FIG. 5, in accordance
with certain exemplary implementations of the present invention
will now be descried in greater detail.
[0102] To describe the decoding of SP frame S1 or S2 in a normal
bitstream, S1 is used as an example. After entropy decoding of the
bitstream S1, the levels of the prediction error coefficients,
L.sub.err1, and motion vectors, are generated for the macroblock.
Levels L.sub.err1 are dequantized using quantizer
QP.sub.1.sup.-1,
[0103] K.sub.serr1=QP.sub.1.sup.-1(L.sub.err1).
[0104] The error coefficients K.sub.serr1 are quantized using
quantizer Qs=Qs.sub.1 and obtain levels,
[0105] L.sub.serr1=Qs(K.sub.serr1).
[0106] After motion compensation, forward DCT transform is
performed for the predicted macroblock and obtain K.sub.pred1.
K.sub.pred1 is then quantized by Qs.sub.1,
[0107] L.sub.pred1=Qs.sub.1(K.sub.pred1).
[0108] L.sub.pred1 is then dequantized by Qs.sub.1.sup.-1,
[0109] K.sub.spred1=Qs.sub.1.sup.-1(L.sub.pred1).
[0110] The dequantized coefficients K.sub.spred1 are further
quantized by quantizer Qs=Qs.sub.1 and obtain levels,
[0111] L.sub.spred1=Qs(K.sub.spred1).
[0112] The reconstructed levels L.sub.rec1 are obtained by,
[0113] L.sub.rec1=L.sub.spred1+L.sub.serr1.
[0114] The levels L.sub.rec1 are dequantized using
Qs.sup.-1=Qs.sub.1.sup.- -1 and the inverse DCT transform is
performed to obtain the reconstructed image. The reconstructed
image will go through a loop filter to smooth certain blocky
artifacts and output to the display and to the frame buffer for
next frame decoding.
[0115] The decoding of switching bitstream S12, for example, when
switching from bitstream 1 to bitstream 2, follows a similar
decoding process similar except that the input is bitstream S12,
QP.sub.1.sup.-1 is replaced by Qs.sub.2.sup.-1, Qs is replaced by
Qs.sub.2, Qs.sup.-1 is replaced by Qs.sub.2.sup.-1, L.sub.rec1 is
replaced by L.sub.rec2, L.sub.err1 is replaced by L.sub.err12,
K.sub.serr1 is replaced by K.sub.serr12, and L.sub.spred1 is
replaced by L.sub.spred12.
[0116] Note that the information on Qs.sub.1 and Qs.sub.2 is
encoded in bitstream S12.
[0117] The resultant picture is the same as that decoded from S2.
Thus a drifting-free switching from bitstream 1 to bitstream 2 is
achieved.
[0118] An improved encoding process 600 of FIG. 6, in accordance
with certain exemplary implementations of the present invention
will now be descried in greater detail.
[0119] To describe the encoding of SP frame S1 or S2 in a normal
bitstream, S1 is used as an example. Here, for example, DCT
transform is performed to the macroblock of the original video, and
the obtained coefficients as K.sub.orig1 denoted.
[0120] After motion compensation, DCT transform is performed to the
predicted macroblock, and the obtained coefficients denoted as
K.sub.pred1. Then K.sub.pred1 is quantized using Qs.sub.1 and
levels L.sub.pred1 obtained,
[0121] L.sub.pred1=Qs.sub.1(K.sub.pred1).
[0122] Then, the next step is to dequantize L.sub.pred1 using
dequantizer Qs.sub.1.sup.-1,
[0123] K.sub.spred1=Qs.sub.1.sup.-1(L.sub.pred1).
[0124] Then subtract K.sub.spred1 from K.sub.orig1 and obtain error
coefficients K.sub.err1,
[0125] K.sub.err1=K.sub.orig1-K.sub.pred1.
[0126] Next, quantize K.sub.err1 using QP.sub.1 and obtain error
levels L.sub.err1,
[0127] L.sub.err1=QP.sub.1(K.sub.err1).
[0128] Then, perform entropy encoding on L.sub.err1 and obtain
bitstream S1.
[0129] Using the S1 decoder described above, for example,
reconstruct levels L.sub.rec1 and the reference for the next frame
encoding.
[0130] Note that here there is a quantizer Qs.sub.1 and a
dequantizer Qs.sub.1.sup.-1 in the reconstruction loop.
[0131] The encoding of switching bitstream S12, for example, when
switching from bitstream 1 to bitstream 2, is based on the encoding
of S1 and S2.
[0132] Here, the process involves quantizing prediction
coefficients K.sub.spred1 in the S1 encoder using quantizer
Qs.sub.2.
[0133] L.sub.spred12=Qs.sub.2(K.sub.spred1).
[0134] Then subtract L.sub.spred12 from the reconstructed level
L.sub.rec2 in S2 encoder.
[0135] L.sub.err12=L.sub.rec2-L.sub.spred12.
[0136] Next, perform entropy encoding of L.sub.err12 and generate
bitstream S12.
[0137] An improved decoding process 700 of FIG. 7, in accordance
with certain further exemplary implementations of the present
invention will now be descried in greater detail.
[0138] To describe the decoding of SP frame S1 or S2 in a normal
bitstream, S1 is used as an example.
[0139] Here, after entropy decoding of the bitstream S1, the levels
of the prediction error coefficients, L.sub.err1, and motion
vectors, are generated for the macroblock. Levels L.sub.err1 are
dequantized using quantizer QP.sub.1.sup.-1:
[0140] K.sub.serr1=QP.sub.1.sup.-1(L.sub.err1).
[0141] After motion compensation, perform forward DCT transform for
the X predicted macroblock and obtain K.sub.pred1, the
reconstructed coefficients K.sub.rec1 are obtained by:
[0142] K.sub.rec1=K.sub.pred1+K.sub.serr1.
[0143] The reconstructed coefficients K.sub.rec1 are quantized by
Qs.sub.1 to obtain reconstructed levels L.sub.rec1,
[0144] L.sub.rec1=Qs.sub.1(K.sub.rec1).
[0145] The levels L.sub.rec1 are dequantized using Qs.sub.1.sup.-1
and the inverse DCT transform is performed to obtain the
reconstructed image. The reconstructed image will go through a loop
filter to smooth certain blocky artifacts and output to the display
and to the frame buffer for next frame decoding.
[0146] The decoding of switching bitstream S12, for example, when
switching from bitstream 1 to bitstream 2, follows a similar
decoding process similar except that the input is bitstream S12,
QP.sub.1.sup.-1 is replaced by Qs.sub.2.sup.-1, Qs.sub.1 is
replaced by Qs.sub.2, Qs.sub.1.sup.-1 is replaced by
Qs.sub.2.sup.-1, K.sub.serr1 is replaced by K.sub.serr12,
K.sub.rec1 is replaced by K.sub.rec12, L.sub.rec1 is replaced by
L.sub.rec2, and L.sub.err1 is replaced by L.sub.err12.
[0147] The resultant picture is the same as that decoded from S2.
Thus, a drifting-free switching from bitstream 1 to bitstream 2 is
achieved.
[0148] An improved encoding process 800 of FIG. 8, in accordance
with certain further exemplary implementations of the present
invention will now be descried in greater detail.
[0149] To describe the encoding of SP frame S1 or S2 in a normal
bitstream, S1 is used as an example.
[0150] Here, DCT transform is performed to the macroblock of the
original video, and the obtained coefficients as K.sub.orig1
denoted
[0151] Next, after motion compensation, DCT transform is performed
to the predicted macroblock, and the obtained coefficients as
K.sub.pred1 denoted.
[0152] Then the process includes subtracting K.sub.pred1 from
K.sub.orig1 and obtaining error coefficients K.sub.err1.
[0153] K.sub.err1=K.sub.orig1-K.sub.pred1.
[0154] Next, K.sub.err1 is quantized using QP.sub.1 and error
levels L.sub.err1 obtained,
[0155] L.sub.err1=QP.sub.1 (K.sub.err1).
[0156] Then entropy encoding is performed on L.sub.err1 and
bitstream S1 obtained.
[0157] Using the S1 decoder described above, for example, the
process includes reconstructing levels L.sub.rec1 and the reference
for the next frame encoding. Note that here there is a quantizer
Qs.sub.1 and a dequantizer Qs.sub.1.sup.-1 in the reconstruction
loop.
[0158] The encoding of switching bitstream S12, for example, when
switching from bitstream 1 to bitstream 2, is based on the encoding
of S1 and S2.
[0159] For example, prediction coefficients K.sub.pred1 are
quantized in the S1 encoder using quantizer Qs.sub.2,
[0160] L.sub.pred12=Qs.sub.2(K.sub.pred1).
[0161] Then the process includes subtracting L.sub.pred12 from the
reconstructed level L.sub.rec2 in S2 encoder.
[0162] L.sub.err12=L.sub.rec2-L.sub.pred12.
[0163] Next entropy encoding of L.sub.err12 is performed and
bitstream S12 generated.
[0164] Reference is now made to FIG. 9, which is a block diagram
depicting a decoder 900 for S1 and S2, in accordance with certain
other implementations of the present invention. Here, it is noted
that the quantization Qs is operated on the reconstructed DCT
reference rather than on the decoded DCT residue and the DCT
prediction. The quantization in this example can be described
as:
Y=[X*A(Qs)+2.sup.19]/2.sup.20,
[0165] where X is the reconstructed DCT coefficient, and Y is the
quantized DCT coefficient. A(.) is the quantization table. Qs is
the quantization step.
[0166] If merging the dequantization QP and quantization QS in one
step, the operation can, for example, be formularized as 1 L rec =
[ K pred ( i , j ) + L err ( i , j ) * ( 2 20 + A ( Qp ) / 2 ) A (
Qp ) ] * A ( Qs ) + 2 19 2 20 ,
[0167] where L.sub.err are the levels of the prediction error
coefficients, K.sub.pred are prediction coefficients. This is quite
different from that used in conventional SP coding. One advantage
is that a high quality display can be reconstructed from the part
in [. . . ] of the above formula.
[0168] Therefore, decoder 900 provides two ways for reconstructing
the display image. In the first case, the reconstructed reference
is directly used for the purpose of display. There is little if any
complexity increase in this case. In the second case, if the
decoder is powerful enough, another high quality image can be
reconstructed for display. This process includes the modules within
box 902. These modules are, for example, non-normative parts for
the current JVT standard.
[0169] FIG. 10 illustrates a decoder 1000 for the switching
bitstream S12, in accordance with certain further implementations
of the present invention. In this example, decoder 1000 for the
switching bitstream S12 is slightly different from that for S1 and
S2, presented in previous sections. Here, for example, the
quantization Qs is only needed on the DCT prediction. Again, the
quantization in this example can be described as:
Y=[X*A(Qs)+2.sup.19]/2.sup.20.
[0170] Decoder 1000 is configured to know which SP bitstream is
received. Therefore, for example, a 1-bit syntax can be employed to
notify decoder 1000. An exemplary modification in the SP syntax and
semantic include a Switching Bitstream Flag (e.g., 1 bit) and
Quantization parameter (e.g., 5 bits).
[0171] Thus, for example, when Ptype indicates an SP frame, the
1-bit syntax element "Switching Bitstream Flag" is inserted before
the syntax element "Slice Qp". Here, when the Switching Bitstream
Flag is 1, the current bitstream is decoded as Bitstream S12, and
the syntax element "Slice QP" is skipped; otherwise it is decoded
as Bitstream S1 or S2, and the syntax element "Slice QP" is the
quantization parameter Qp.
[0172] When Ptype indicates a SP frame, the syntax element "SP
Slice QP" is inserted after the syntax element "Slice QP" to encode
the quantization parameter Qs.
[0173] An encoder 1100 is illustrated in the block diagram of FIG.
11, in accordance with certain further exemplary implementations of
the present invention.
[0174] Here, for example, encoder 1100 includes a switch 1102.
Thus, the DCT prediction can be directly subtracted from the
original DCT image without quantization and dequantization, or the
DCT prediction can be subtracted from the original DCT image after
quantization and dequantization. Whether the DCT prediction is
quantized or not can be decided, for example, one by one
coefficient with rate-distortion criterion.
[0175] Thus, several exemplary improved SP picture coding methods
and apparatuses have been presented. Separate Qs can be provided
for up-switching and down-switching bitstreams. The Qs for
switching bitstream coding can be decoupled from the prediction and
reconstruction loop. This eliminates the contradiction of reducing
switching bitstream size and improving coding efficiency of the
normal bitstreams, for example. There can also be significant
reduction in the switching bitstream size while maintaining the
high coding efficiency of the normal bitstreams by optimizing
different Qs independently. Some Quantization/Dequantization
processes can be removed in accordance with certain implementations
to improve coding efficiency. Coding efficiently can also be
improved by using the same reference for prediction and
reconstruction. The methods and apparatuses may also be configured
to allow for more down-switching points than up-switching
points.
[0176] Conclusion:
[0177] Although the description above uses language that is
specific to structural features and/or methodological acts, it is
to be understood that the invention defined in the appended claims
is not limited to the specific features or acts described. Rather,
the specific features and acts are disclosed as exemplary forms of
implementing the invention.
* * * * *