U.S. patent application number 10/234440 was filed with the patent office on 2003-04-17 for silicon-germanium hetero bipolar transistor witht-shaped implantation layer between emitter and emitter contact area.
Invention is credited to Heinemann, Bernd, Lippert, Gunther, Osten, Hans-Jorg.
Application Number | 20030071281 10/234440 |
Document ID | / |
Family ID | 27216939 |
Filed Date | 2003-04-17 |
United States Patent
Application |
20030071281 |
Kind Code |
A1 |
Lippert, Gunther ; et
al. |
April 17, 2003 |
Silicon-germanium hetero bipolar transistor withT-shaped
implantation layer between emitter and emitter contact area
Abstract
The invention relates to a silicon germanium hetero bipolar
transistor and a method of fabricating the epitaxial individual
layers of a silicon germanium hetero bipolar transistor. Silicon
germanium hetero bipolar transistors thus fabricated have an
increased transit frequency, an increase maximum oscillation
frequency and/or a reduced noise level depending upon requirements
and intended application. A monocrystalline deposition is performed
on a surface of pure silicon in accordance with the desired
transistor profile. The silicon germanium hetero bipolar transistor
contains an additional electrically inert material. The
semiconductor arrangement of silicon germanium hetero bipolar
transistors is fabricated by an epitaxy process. A electrically
inert material incorporated into the epitaxial layer links
fabrication defects and reduces the diffusion of the dopant. Thus,
transistors for high frequency applications may be fabricated in
two ways: The dopant dose of the base region is increased and/or
the width of the base is reduced.
Inventors: |
Lippert, Gunther;
(Frankfurt/Oder, DE) ; Osten, Hans-Jorg;
(Muellrose, DE) ; Heinemann, Bernd;
(Frankfurt/Oder, DE) |
Correspondence
Address: |
Ware, Fressola, Van Der Sluys & Adolphson LLP
P.O. Box 224
Monroe
CT
06468
US
|
Family ID: |
27216939 |
Appl. No.: |
10/234440 |
Filed: |
August 30, 2002 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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10234440 |
Aug 30, 2002 |
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09319699 |
Jul 19, 1999 |
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09319699 |
Jul 19, 1999 |
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PCT/DE97/02908 |
Dec 8, 1997 |
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Current U.S.
Class: |
257/200 ;
257/E21.125; 257/E21.129; 257/E21.371; 257/E29.084; 257/E29.085;
257/E29.193 |
Current CPC
Class: |
H01L 21/02381 20130101;
H01L 21/02532 20130101; H01L 29/7378 20130101; H01L 21/0245
20130101; H01L 29/161 20130101; H01L 29/66242 20130101; H01L 29/165
20130101; H01L 21/02505 20130101 |
Class at
Publication: |
257/200 |
International
Class: |
H01L 031/0328 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 9, 1996 |
DE |
196 52 423.7 |
Dec 6, 1997 |
DE |
197 55 979.4 |
Claims
1. Silicon germanium hetero bipolar transistor suitable for high
frequency applications, with a silicon collector layer, a doped
silicon germanium base layer and a silicon emitter layer,
characterized by the fact that carbon is incorporated in at least
one of the three individual layers, i.e. the emitter layer and/or
the base layer and/or the collector layer, in a concentration
between 10.sup.18 cm.sup.-3 and 10.sup.21 cm.sup.-3 and that the
relative change in the lattice constant thus introduced is less
than 5-10.sup.-3 so that a point defect supported diffusion
acceleration is prevented.
2. Silicon germanium hetero bipolar transistor suitable for high
frequency applications according to claim 1, characterized by the
fact that the base layer is doped with boron and with a
concentration of the dopant in the base region between 5-10.sup.19
cm.sup.-3 and 10.sup.-3 cm.sup.-3 the concentration of carbon in
the epitaxy layer is between 10.sup.18 cm.sup.-3 and 10.sup.21
cm.sup.-3 and the defect density of the transistor is less than
10.sup.4 cm.sup.-2.
3. Silicon germanium hetero bipolar transistor suitable for high
frequency applications according to claim 1 or 2, characterized by
the fact that the width of the base from the collector to the
emitter is between 5 nm and 40 nm
4. Silicon germanium hetero bipolar transistor suitable for high
frequency applications according to one or more of the preceding
claims, characterized by the fact that the concentration of
germanium in the base layer is between 8% and 30% and preferably
between 20% and 28%.
5. Silicon germanium hetero bipolar transistor suitable for high
frequency applications according to one or more of the preceding
claims, characterized by the fact that the shape of the germanium
concentration curve corresponds to a rectangle, a triangle or a
trapezoid.
6. Method of fabricating the epitaxial individual layers of a
silicon germanium hetero bipolar transistor suitable for high
frequency applications characterized in claim 1 with a silicon
collector layer, a doped silicon germanium base layer and a silicon
emitter layer, characterized by the fact that during fabrication of
individual layers, i.e. the emitter layer (4), base layer (3) and
collector layer (2) carbon is added to at least one of these layers
in a concentration between 10.sup.18 cm.sup.-3 and 10.sup.21
cm.sup.-3 so that a point defect supported diffusion acceleration
is prevented, and that the base layer is simultaneously doped with
doping atoms with the relative change in the lattice constant thus
introduced being less than 5-10.sup.-3.
7. Method of claim 6, characterized by the fact that during one
process step (A), namely vapor deposition of silicon for
fabricating the collector layer, carbon is incorporated in a
concentration between 10.sup.18 cm.sup.-3 and 10.sup.21
cm.sup.-3
8. Method of claim 6, characterized by the fact that during one
process step (B), namely vapor deposition of silicon and additional
incorporation of germanium and dopant for fabricating the base
layer, carbon is incorporated in a concentration between 10.sup.18
cm.sup.-3 and 10.sup.21 cm.sup.-3.
9. Method of claim 6, characterized by the fact that during one
process step (C), namely discontinuing germanium and dopant and
vapor deposition of silicon for fabricating the emitter layer,
carbon is incorporated in a concentration between 10.sup.18
cm.sup.-3 and 10.sup.21 cm.sup.-3, the relative change in the
lattice constant thus introduced being less than 5-10.sup.-3.
10. Method according to one of claims 7 to 9, characterized by the
fact that during process steps (A) and (B) or process steps (A) and
.COPYRGT. or process steps (B) and .COPYRGT. carbon is incorporated
in a concentration between 10.sup.18 cm.sup.-3 and 10.sup.21
cm.sup.-3
11. Method according to one or more of the claims 7 to 10,
characterized by the fact that during fabrication of the base layer
(3) boron is used as the dopant in a concentration between
5-10.sup.18 cm.sup.-3 and 10.sup.21 cm.sup.-3.
12. Method according to one or more of the claims 7 to 11,
characterized by the fact that fabrication of the epitaxial layer
is performed by a CVD process.
13. Method according to one or more of the claims 7 to 11,
characterized by the fact that fabrication of the epitaxial layer
is performed by a MBE process.
Description
[0001] The invention relates to a silicon germanium hetero bipolar
transistor for high frequency applications and to a method of
fabricating the epitaxial individual layers of a silicon germanium
hetero bipolar transistor for high frequency applications.
[0002] Aside from using gallium arsenide for fabricating super high
frequency transistors, silicon germanium hetero bipolar
transistors, because of their lower fabrication costs, have found
increased use in high frequency areas. The sequence of layers in
such transistors generally consists of a silicon collector layer, a
base layer of p-doped silicon germanium, and an emitter layer.
[0003] German laid-open patent specification 43 01 333 A1 describes
a method of fabricating integrated silicon germanium hetero bipolar
transistors in which a collector layer, a base layer, an emitter
layer and an emitter connection layer are precipitated and doped at
the same time in a single uninterrupted process. This method of
fabricating transistors for high frequency applications suffers
from the drawback that a further increase in the doping of the base
with doping atoms would lead to an outdiffusion, i.e. a broadening
of the base region, at a corresponding temperature. Outdiffusion of
dopants, on the one hand, results in a non-uniform fabrication of
transistors and, on the other hand, in a reduction of collector and
emitter currents. Accordingly, it is not possible by this method to
improve the high frequency properties of transistors. Also,
broadening of the doped regions limits a further reduction of the
structure.
[0004] Japanese patent application JP 5,102,177 discloses a silicon
germanium hetero bipolar transistor the base of which has been
dislocated by % of carbon to compensate for mechanical strain
introduced by the germanium. However, such high carbon
concentrations result in a strong local lattice deformation which
limits the suitability of such transistors for high frequency
applications.
[0005] Also, in IEEE Electron Device Letters, Vol. 17, No. 7, July
1996, pp. 334-337 as well Appl. Phys. Lett., vol. 60, No. 24, pp.
3033-3035,1992 and Meter. Lett., Vol. 18, pp. 57-60, 1993, carbon
is incorporated into the base for the purpose of attaining current
compensation of germanium in silicon by carbon as well as a
variation in the band gap. Optimum results were found at a carbon
concentration of 5-102.degree. cm.sup.-3. Drawback similar to those
of the above-mentioned JP 5,102,177 may be expected. In IEEE
Electron Device Letters, Vol. 17, No. 7, July 1996, pp. 334-337,
large surface MESA transistors with emitter surfaces of .gtoreq.400
pm.sup.2 (line width .gtoreq.20 .mu.m) were used to define static
component properties. Such transistors with large emitter surfaces
do not satisfy high frequency applications.
[0006] To fabricate SiGe transistors suitable for high frequency
applications line widths less than 2 .mu.m are necessary as
disclosed, for instance, in T. F. Meister: SiGe Base Bipolar
Technology with 74 Ghz f.sub.max and 11 ps Gate Delay;
IEDM95-739.
[0007] U.S. Pat. No. 5,378,901 discloses a silicon carbide
transistor in which silicon carbide is used as the material for the
base, collector and emitter. The high fabrication temperatures
prevent their integration into circuits suitable for high frequency
applications.
[0008] It is a task of the invention to provide a silicon germanium
hetero bipolar transistor suitable for high frequency applications
in which the outdiffusion of dopant from the base region is reduced
by more than 50% compared to conventional silicon germanium hetero
bipolar transistors. It is a further task of the invention to
structure known methods of fabricating the epitaxial individual
layers of such silicon germanium hetero bipolar transistor suitable
for high frequency applications with a silicon collector layer, a
doped silicon germanium base layer and a silicon emitter layer so
as to reduce the usual limitations and complex requirements of
subsequent processes. This refers especially to the implantation
dose and the temperature time stress of the epitaxial layer.
Silicon germanium hetero bipolar transistors made by this method
have a higher transitory frequency, an increased maximum
oscillation frequency and/or a reduced noise level depending upon
requirements and intended application.
[0009] Furthermore, it is a task of the invention by a point defect
supported diffusion acceleration to prevent boron outdiffision from
the silicon germanium layer, in order to attain HF properties
without losses in a scaling range of a line width of 0.4 .mu.m or
less. In this manner, similar transitory and maximum oscillation
frequencies are to be attained compared to larger emitter
surfaces.
[0010] In accordance with the invention these tasks are
accomplished by the invention described hereinafter.
[0011] A monocrystalline structure according to a desired
transistor profile is precipitated on a surface of pure silicon. In
at least one of its three individual layers, i.e. its emitter layer
or its base layer or its collector layer, the silicon germanium
hetero bipolar transistor in accordance with the invention contains
an additional material which is electrically inert, preferably an
element from group IV, in a concentration between 10.sup.18
cm.sup.-3 and 10.sup.21 cm.sup.-3. The semiconductor arrangement of
the silicon germanium hetero bipolar transistor is fabricated by an
epitaxy process, e.g. by vapor phase epitaxy or molecular-beam
epitaxy. The technological process steps following the epitaxy lead
to defects, e.g. interstitial atoms in the semiconductor crystal,
which enhance the diffusion of atoms foreign to the lattice, such
as dopants. An electrically inactive material of the kind referred
to and incorporated into the epitaxial layer links these defects
and reduces the diffusion of the dopant. The relative alteration of
the lattice constant caused by the incorporation of an electrically
inert material, preferably carbon, is less than 5-10.sup.-3. The
outdiffusion of the dopant is reduced which limits broadening of
the base region. This allows fabrication of transistors suitable
for high frequency applications in two ways: The dopant dose of the
base region is increased and/or the width of the base is reduced.
Either way leads to an increase in the concentration of dopant in
the base region of the transistor by between 5-10.sup.18 cm.sup.-3
and 10.sup.21 cm.sup.-3 if the dopant used is boron. This leads to
a reduced resistance of the inner base. The invention proceeds on
the basis of the conventional fabrication of a preprocessed silicon
substrate. The method is characterized by the following process
steps: Initially silicon is deposited by vapor deposition for
fabricating the collector layer. Germanium is additionally
incorporated during the following further silicon vapor deposition
and is doped with lattice doping atoms. The preferred dopant used
is boron. The base is fabricated by this process step. After
discontinuing the addition of boron and the doping medium the
emitter layer is fabricated by further vapor deposition of
silicon.
[0012] During at least one of the mentioned process steps an
electrically inert material, preferably carbon, is added in a
concentration of between 10.sup.18 cm.sup.-3 and 10.sup.21
cm.sup.-3, the relative change in the lattice constant thus
introduced being less than 5-10.sup.-3 owing to the low
concentration of the electrically inert material. A low additional
lattice distortion does not imply an additional source of possible
lattice defects. CVD (chemical vapor deposition) and MBE
(molecular-beam epitaxy) processes are used to fabricate the
epitaxial layers. Conventional further processing is carried out
terminating in the silicon germanium hetero bipolar transistor in
accordance with the invention. In silicon germanium hetero bipolar
transistors in accordance with the invention the product of the
germanium concentration in the base layer and the width of the base
layer from the collector to the emitter is between 50 atomic
percent nm and 2,000 atomic percent-nm. The width of the base layer
from the collector to the emitter is between about 5 nm and 60 nm
and, preferably, between 35 nm and 40 nm. The concentration of
germanium in the base layer is between about 8% and 30% and,
preferably, between 20% and 28%.
[0013] The elements of the invention have not only been set forth
in the claims but also in the description and in the drawings,
whereby individual elements constitute patentable inventions not
only by themselves but also when combines as subcombinations, the
protection of which is here being applied for. Embodiments of the
invention have been depicted in the drawings and will be described
in greater detail hereinafter. In the drawings:
[0014] FIG. 1 is a schematic rendition of the layer structure of a
silicon germanium hetero bipolar transistor;
[0015] FIG. 2 depicts steps of the method of fabricating the
epitaxial individual layers of a silicon germanium hetero bipolar
transistor;
[0016] FIG. 3 is a schematic section through a silicon germanium
hetero bipolar transistor;
[0017] FIGS. 4, 5, 6 depict concentration curves of germanium in
silicon germanium hetero bipolar transistors.
[0018] In FIG. 1, there is shown the layer structure of a silicon
germanium hetero bipolar transistor in accordance with the
invention, consisting of a doped silicon substrate 1, a non-doped
silicon carbon collector layer 2, a doped silicon germanium carbon
layer 3 and a non-doped silicon carbon emitter layer 4. The entire
layer structure including doping of the base region with boron is
fabricated by molecular beam epitaxy.
[0019] In this embodiment, carbon in a concentration between
10.sup.18 cm.sup.-3 and 10.sup.21 cm.sup.3 is added simultaneously
with the epitaxy of all three individual layers, the collector
layer, the base layer and the emitter layer. This corresponds to a
carbon concentration of between 0.0015% and 1.5%. In this manner an
otherwise possible diffusion of boron is significantly reduced so
that the regions of dopant outdiffusion 5 may be reduced compared
to conventional transistors of this kind. By the addition of carbon
in accordance with the invention the diffusion length of boron is
reduced by more than 50% compared to a diffusion length occurring
where no carbon has been added. The result is a very stable boron
profile. The thus reduced base width results in a reduced base
transit time. This, in the context of the transistor in accordance
with the invention, is the same as an increased transit frequency
and an increased maximum oscillation frequency or a reduced noise
level.
[0020] By increasing the boron concentration to between 5-10.sup.18
cm.sup.3 and 10.sup.21 cm.sup.-3 in the base layer the suitability
of the silicon germanium hetero bipolar transistor may be further
improved.
[0021] For fabricating such a silicon germanium hetero bipolar
transistor the following process steps shown in FIG. 2 are
performed: Prior to the part of the method in accordance with the
invention a pretreated silicon substrate is conventionally made in
a process step A.sub.0. This is followed by the steps of:
[0022] A vapor deposition of silicon to fabricate the collector
layer;
[0023] B Vapor deposition of silicon and additional incorporation
of germanium and dopant for fabricating the base layer; and
[0024] C discontinuing germanium and dopant and vapor deposition
for fabricating the emitter layer
[0025] whereby carbon in a concentration of between 10.sup.18
cm.sup.3 and 10.sup.21 cm.sup.-3 is incorporated during at least
one of the process steps with the relative change of the lattice
constant thus introduced being less than 5-10.sup.-3.
[0026] The epitaxy is followed by convention further processing D
terminating in a final silicon germanium hetero bipolar transistor
in accordance with the invention.
[0027] FIG. 3 depicts a schematic section through a silicon
germanium hetero bipolar transistor thus fabricated. The non-doped
silicon carbon collector 32, the non-doped silicon carbon emitter
33 and the base 34 of silicon, germanium and carbon doped with
boron in a concentration between 5-10.sup.18 cm.sup.3 and 10.sup.21
cm.sup.3 have been grown by epitaxy on the highly doped silicon
substrate 31. Furthermore, the figure depicts the corresponding
contact areas 35 as well as an implantation region 36. The carbon
concentration in the epitaxial layer is between 10.sup.18 cm.sup.-3
and 10.sup.21 cm.sup.-3.
[0028] FIGS. 4 to 6 represent concentration curves of germanium in
the silicon of silicon germanium hetero bipolar transistors in
accordance with the invention. The curves are rectangular,
triangular or trapezoidal. In all diagrams, the base region is
limited on the abscissa by value x1 and x2. The ordinate represents
the curve as a percentage of the germanium concentration.
[0029] In the transistor having the rectangular germanium
concentration curve of FIG. 4 the width of the base layer is 30 nm.
The concentration of germanium in the base layer is about 22%
constant. Preferred high current amplifications and good dynamic
properties may be obtained with this transistor profile.
[0030] In the transistor with the triangular germanium
concentration curve of FIG. 5 the width of the base layer is 40 nm.
The concentration of germanium in the center of the base layer
where it reaches its maximum is about 26%. This transistor profile
makes it possible to set very high early currents. Moreover, this
transistor profile permits impressing a drift field for reducing
the base transit time of the minority carrier.
[0031] In the transistor with the trapezoidal germanium
concentration curve of FIG. 6 the width of the base layer is 35 nm.
The concentration of germanium in the base layer increases linearly
from the side of the collector or emitter of the transistor from
about 10% to 22%. In this embodiment, high current amplification as
well as high early current and a drift field are attained for
reducing the transit time of the base.
[0032] At increased scaling broadening of the contact regions is
avoided by the prevention of boron outdiffusion by carbon so that
HF properties are preserved without losses in the scaling range of
a line width of 0.4 .mu.m or less. Compared to larger structures
the same transit and maximum frequencies are attained here at lower
currents.
[0033] In the context of the present invention a silicon germanium
hetero bipolar transistor suitable for high frequency applications
and a method of fabricating the epitaxial individual layers of such
a transistor have been described with reference to concrete
embodiments. It is, however, to be noted that the present invention
is not restricted to the details of the description of the
embodiments as changes and alterations are claimed within the metes
and bounds of the patent claims.
* * * * *