U.S. patent application number 10/187414 was filed with the patent office on 2003-02-13 for semiconductor device and method of manufacturing the same.
This patent application is currently assigned to Semiconductor Energy Laboratory Co., Ltd.. Invention is credited to Kasahara, Kenji, Yamazaki, Shunpei.
Application Number | 20030032221 10/187414 |
Document ID | / |
Family ID | 19037459 |
Filed Date | 2003-02-13 |
United States Patent
Application |
20030032221 |
Kind Code |
A1 |
Kasahara, Kenji ; et
al. |
February 13, 2003 |
Semiconductor device and method of manufacturing the same
Abstract
To provide a semiconductor device in which a semiconductor film
having a leveled main surface is used as an active layer. A
semiconductor film (5) having the leveled main surface with an rms
of less than 10 nm and a P-V value of less than 70 nm which each
indicate a surface roughness is formed by crystallizing a silicon
film (3) containing germanium in a concentration of several %,
preferably 0.1 to 10 atoms % and irradiating the film with a laser
light. In a case of performing a crystallization by use of a metal
element for accelerating the crystallization, the semiconductor
film high in an orientation rate of the crystal as well as in
levelness is obtained.
Inventors: |
Kasahara, Kenji; (Ibaragi,
JP) ; Yamazaki, Shunpei; (Tokyo, JP) |
Correspondence
Address: |
ERIC ROBINSON
PMB 955
21010 SOUTHBANK ST.
POTOMAC FALLS
VA
20165
US
|
Assignee: |
Semiconductor Energy Laboratory
Co., Ltd.
Atsugi-shi
JP
|
Family ID: |
19037459 |
Appl. No.: |
10/187414 |
Filed: |
July 2, 2002 |
Current U.S.
Class: |
438/149 ;
257/347; 257/E21.411; 257/E21.413; 257/E27.111; 257/E29.137;
257/E29.278; 257/E29.293; 257/E29.297; 438/166 |
Current CPC
Class: |
H01L 29/78675 20130101;
H01L 27/1277 20130101; H01L 29/78621 20130101; G02F 1/13454
20130101; H01L 29/66757 20130101; H01L 29/78684 20130101; H01L
29/42384 20130101; H01L 29/66742 20130101; H01L 27/1296
20130101 |
Class at
Publication: |
438/149 ;
438/166; 257/347 |
International
Class: |
H01L 021/00; H01L
021/84; H01L 031/0392; H01L 027/01; H01L 027/12 |
Foreign Application Data
Date |
Code |
Application Number |
Jul 2, 2001 |
JP |
2001-200319 |
Claims
What is claimed is
1. A semiconductor device comprising: a thin film transistor
comprising a semiconductor layer formed on an insulating film,
wherein the semiconductor layer comprising silicon as a main
component and containing germanium, is used as an active layer, and
wherein the active layer has a P-V value of less than 70 nm which
indicates a surface roughness of a main surface thereof.
2. A device according to claim 1, wherein the semiconductor film
contains the germanium in a concentration of 0.1 to 10 atoms % and
serves as a silicon film having a crystalline structure.
3. A device according to claim 1, wherein the semiconductor film
contains a metal element in a concentration of
1.times.10.sup.16/cm.sup.3 to 5.times.10.sup.18/cm.sup.3 and serves
as a silicon film having a crystalline structure.
4. A device according to claim 3, wherein the metal element is a
metal element for accelerating a crystallization of silicon and is
at least one element selected from the group consisting of Fe, Ni,
Co, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
5. A semiconductor device, wherein the semiconductor device
according to claim 1 is one selected from the group consisting of a
video camera, a digital camera, a car navigation system, a personal
computer, a personal digital assistant, and an electronic game
equipment.
6. A semiconductor device comprising: a thin film transistor
comprising a semiconductor layer formed on an insulating film,
wherein the semiconductor layer comprising silicon as a main
component and containing germanium, is used as an active layer, and
wherein the active layer has a root mean square roughness of less
than 10 nm which indicates a surface roughness of a main surface
thereof.
7. A device according to claim 6, wherein the semiconductor film
contains the germanium in a concentration of 0.1 to 10 atoms % and
serves as a silicon film having a crystalline structure.
8. A device according to claim 6, wherein the semiconductor film
contains a metal element in a concentration of
1.times.10.sup.16/cm.sup.3 to 5.times.10.sup.18/cm.sup.3 and serves
as a silicon film having a crystalline structure.
9. A semiconductor device according to claim 8, wherein the metal
element is a metal element for accelerating a crystallization of
silicon and is at least one element selected from the group
consisting of Fe, Ni, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
10. A semiconductor device, wherein the semiconductor device
according to claim 6 is one selected from the group consisting of a
video camera, a digital camera, a car navigation system, a personal
computer, a personal digital assistant, and an electronic game
equipment.
11. A semiconductor device comprising: a thin film transistor
comprising a semiconductor layer formed on an insulating film,
wherein the semiconductor layer comprising silicon as a main
component and containing germanium, is used as an active layer, and
wherein the active layer has a root mean square roughness of less
than 10 nm and a P-V value of less than 70 nm which each indicate a
surface roughness of a main surface thereof.
12. A device according to claim 11, wherein the semiconductor film
contains the germanium in a concentration of 0.1 to 10 atoms % and
serves as a silicon film having a crystalline structure.
13. A device according to claim 11, wherein the semiconductor film
contains a metal element in a concentration of
1.times.10.sup.16/cm.sup.3 to 5.times.10.sup.18/cm.sup.3 and serves
as a silicon film having a crystalline structure.
14. A semiconductor device according to claim 13, wherein the metal
element is a metal element for accelerating a crystallization of
silicon and is at least one element selected from the group
consisting of Fe, Ni, Co, Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
15. A semiconductor device, wherein the semiconductor device
according to claim 11 is one selected from the group consisting of
a video camera, a digital camera, a car navigation system, a
personal computer, a personal digital assistant, and an electronic
game equipment.
16. A method of manufacturing a semiconductor device, comprising:
forming on an insulating surface a semiconductor film that contains
germanium in a concentration of 0.1 to 10 atoms % and has an
amorphous structure; performing heat treatment to the semiconductor
film having the amorphous structure and then irradiating it with a
first laser light for crystallization to form a first semiconductor
film having a crystalline structure and an oxide film thereon;
removing the oxide film; and irradiating a second laser light in an
inert gas atmosphere or in a vacuum to level a surface of the
semiconductor film.
17. A method according to claim 16, wherein an energy density of
the second laser light is higher than that of the first laser
light.
18. A method according to claim 16, wherein a metal element for
accelerating a crystallization is added before performing the heat
treatment.
19. A method according to claim 16, wherein said semiconductor
device is one selected from the group consisting of a video camera,
a digital camera, a car navigation system, a personal computer, a
personal digital assistant, and an electronic game equipment.
20. A method of manufacturing a semiconductor device, comprising:
forming on an insulating surface a first semiconductor film that
contains germanium in a concentration of 0.1 to 10 atoms % and has
an amorphous structure; adding a metal element for accelerating a
crystallization to the first semiconductor film having the
amorphous structure; performing heat treatment to the first
semiconductor film and then irradiating it with a first laser light
to form a first semiconductor film having a crystalline structure
and an oxide film thereon; removing the oxide film; irradiating a
second laser light in an inert gas atmosphere or in a vacuum to
level a surface of the first semiconductor film; oxidizing the
surface of the semiconductor film having the crystalline structure
with a solution containing ozone; forming a second semiconductor
film including a rare gas element on the oxide film; allowing the
second semiconductor film to getter the metal element to remove or
reduce the metal element in the first semiconductor film having the
crystalline structure; and removing the second semiconductor
film
21. A method according to claim 20, wherein an energy density of
the laser light in the oxidizing is higher than that of the laser
light in the first irradiating.
22. A method according to claim 20, wherein said semiconductor
device is one selected from the group consisting of a video camera,
a digital camera, a car navigation system, a personal computer, a
personal digital assistant, and an electronic game equipment.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a semiconductor device
including a circuit composed of a thin film transistor (hereinafter
referred to as TFT) and a method of manufacturing the same. For
example, the present invention relates to an electro-optical device
represented by a liquid crystal display panel and to an electronic
equipment incorporating the above-mentioned electro-optical device
as a part thereof.
[0003] 2. Description of the Related Art
[0004] Note that, the term semiconductor device defined in this
specification refers to all the devices which can operate by
utilizing a semiconductor characteristic, and the electro-optical
device, a semiconductor circuit and the electronic equipment are
all included in a category of the semiconductor device.
[0005] In recent years, development of a semiconductor device has
been in progress, in which the thin film transistor (TFT) is formed
by using a semiconductor thin film (film thickness: approximately
several to several hundreds of nm) formed on a substrate having an
insulating surface and the TFT is adapted to constitute a
large-area integrated circuit.
[0006] An active matrix type liquid crystal module, an EL module,
and a contact image sensor are known as a typical example thereof.
In particular, the TFT using a silicon film having a crystalline
structure (typically, a polysilicon film) as an active layer
(hereinafter, referred to as polysilicon TFT) is high in a field
effect mobility and thus can be used to form a circuit having
various functions.
[0007] For example, the liquid crystal module mounted onto a liquid
crystal display device includes on one substrate a pixel portion
and a driver circuit such as a shift register circuit, level
shifter circuit, buffer circuit, or sampling circuit which is based
on a CMOS circuit. The pixel portion performs an image display for
each functional block and the driver circuit controls the pixel
portion.
[0008] Further, in a pixel portion of the active matrix type liquid
crystal module, a TFT (pixel TFT) is arranged in each of several
tens to several millions of pixels and each pixel TFT is provided
with a pixel electrode. An opposing electrode is provided on an
opposite substrate side with a liquid crystal interposed between
the two electrodes, to thereby form a kind of capacitor with the
liquid crystal used as a dielectric. A voltage applied to each
pixel is then controlled by a switching function of the TFT to
control the application of charge to the capacitor to drive the
liquid crystal, thereby displaying an image through the control of
an amount of transmitted light.
[0009] The pixel TFT is composed of an n-channel TFT and adapted to
drive the liquid crystal by applying a voltage as a switching
element. The liquid crystal is driven with an alternating current
and a method called a frame inversion driving is employed in many
cases. In this method, as a required characteristic of the pixel
TFT, it is important to sufficiently lower an OFF current value (a
drain current caused to flow at the time of TFT being in OFF state)
in order to reduce the power consumption.
[0010] Conventionally, when irradiated with a laser light for
crystallization or for improvement in crystallinity, the
semiconductor film is instantly melted from the surface thereof and
then the melted semiconductor film due to heat conduction to the
substrate is cooled to solidify from the substrate side. Through
the solidifying process, recrystalization is performed to form a
semiconductor film having a crystalline structure with a large
grain size. However, the semiconductor film once melted causes a
volume expansion to form unevennesses called ridges on the
semiconductor surface. In particular, in a case of a top gate type
TFT, the surface having the ridge serves as an interface with a
gate insulating film so that element characteristics are largely
influenced.
[0011] In general, an excimer laser or Ar laser is used for laser
annealing in many cases. A method of performing the laser annealing
described below has been preferably used because it is suited for
mass production with high productivity. That is, a pulse
oscillation type laser beam having a high output is processed by an
optical system so as to be a square spot whose side is of several
centimeters or be linear With a length of, for example, 10 cm or
more on a surface to be irradiated and the laser beam is scanned on
the surface to be irradiated with the irradiation point relatively
changed with respect to there. In particular, in a case where a
linear laser beam (hereinafter, referred to as linear beam) is used
in the surface to be irradiated, unlike in a case of using a
spot-shaped laser beam that requires scanning vertically and
laterally, it is sufficient to perform the scanning only in a
direction perpendicular to a line direction of the linear beam in
order to apply the laser beam to the entire surface to be
irradiated, thereby achieving a high productivity. The reason the
scanning, is performed in the direction perpendicular to the line
direction is that the direction enables the most efficient
scanning. Because of the high productivity, the linear beam
obtained by processing laser having a high output by an appropriate
optical system has been mainly used for the laser annealing. Also,
the linear beam is applied while being overlapped by gradually
shifting it in a transverse direction thereof so that an entire
surface of an amorphous silicon film is subjected to the laser
annealing, thereby making it possible to crystallize or improve the
crystallinity.
[0012] Thus, the technique of the laser annealing is indispensable
in order to form a semiconductor film having higher electric
characteristics in a lower cost.
[0013] However, there remain problems in the conventional
crystallization by the laser light such that energy is not
uniformly applied to the entire film and wavelike traces of
irradiation with the laser light are remained in addition to the
ridge.
[0014] Further, if the unevennesses on the film surface formed
after the crystallization are leveled by using an etch back method
a CMP method or the like, the number of steps increases and at the
same time the semiconductor film becomes thinner, so that it is
difficult to level the surface of the semiconductor thin film
having a thickness of 100 nm or less with a good
controllability.
SUMMARY OF THE INVENTION
[0015] The present invention has been made in view of the
above-mentioned problems and provides a technique for solving such
problems. An object of the present invention is accordingly to
provide a semiconductor device such as an electro-optical device
represented by an active matrix type liquid crystal display device
which is formed by using a TFT and in which an improvement in
operational characteristic and a low power consumption are
realized.
[0016] In particular, an object of the present invention is to
obtain a TFT which has a low OFF current value with a reduced
variation.
[0017] In order to solve the various problems described above, many
experiments and studies have been made in various fields so that
the inventors of the present invention found that the levelness (a
root mean square roughness (rms) and a peak to valley value (P-V
value)) is high in a main surface of the semiconductor film which
contains germanium in a concentration of several %, preferably, 0.1
to 10 atoms % and which is subjected to a laser light irradiation
as compared with a case of performing the laser light irradiation
to the semiconductor film containing no germanium. Thus, the
above-mentioned various problems can be solved to thereby
accomplish the present invention.
[0018] The structure of the present invention is described
below.
[0019] The invention disclosed in this specification relates to a
semiconductor device comprising a thin film transistor having a
semiconductor layer formed on an insulating film, characterized in
that:
[0020] the semiconductor layer formed of a semiconductor film
containing silicon as a main component and containing germanium, is
used as an active layer; and
[0021] the active layer has a P-V value of less than 70 nm which
indicates a surface roughness of a main surface thereof.
[0022] Further, according to another structure of the invention,
there is provided a semiconductor device comprising a thin film
transistor having a semiconductor layer formed on an insulating
film, characterized in that:
[0023] the semiconductor layer formed of a semiconductor film
containing silicon as a main component and containing germanium, is
used as an active layer; and
[0024] the active layer has an rms of less than 10 nm which
indicates a surface roughness of a main surface thereof.
[0025] Also, according to still another structure of the invention,
there is provided a semiconductor device comprising a thin film
transistor having a semiconductor layer formed on an insulating
film, characterized in that:
[0026] the semiconductor layer formed of a semiconductor film
containing silicon as a main component and containing germanium, is
used as an active layer and
[0027] the active layer has an rms of less than 10 nm and a P-V
value of less than 70 nm which each indicate a surface roughness of
a main surface thereof.
[0028] Also, in the above-mentioned structures, the semiconductor
device is characterized in that the semiconductor film contains the
germanium in a concentration of 0.1 to 10 atoms % and serves as a
silicon film having a crystalline structure.
[0029] Also, in the above-mentioned structures, the semiconductor
device is characterized in that the semiconductor film contains a
metal element in a concentration of 1.times.10.sup.16/cm.sup.3 to
5.times.10.sup.18/cm.sup.3 and serves as a silicon film having a
crystalline structure. Further, the metal element is a metal
element for accelerating a crystallization of silicon and is at
least one element selected from the group consisting of Fe, Ni, Co,
Ru, Rh, Pd, Os, Ir, Pt, Cu and Au.
[0030] Also, it is possible to irradiate the semiconductor film
containing germanium in a concentration of 0.1 to 10 atoms % with a
laser light in an atmosphere or in an oxygen atmosphere to remove
an oxide film formed on a surface of the semiconductor film and
subsequently to irradiate with the laser light in an inert
atmosphere or in a vacuum, thereby forming a semiconductor film
having a considerably leveled main surface.
[0031] Further, the structure in a manufacturing method of the
present invention is described below.
[0032] The invention relates to a method of manufacturing a
semiconductor device, characterized by comprising:
[0033] a first step of forming on an insulating surface a
semiconductor film that contains germanium in a concentration of
0.1 to 10 atoms % and has an amorphous structure;
[0034] a second step of performing heat treatment to the
semiconductor film having the amorphous structure and then
irradiating it with a laser light for crystallization to form a
first semiconductor film having a crystalline structure and an
oxide film thereon;
[0035] a third step of removing the oxide film; and
[0036] a fourth step of irradiating a laser light in an inert gas
atmosphere or in a vacuum to level a surface of the semiconductor
film.
[0037] In the above-mentioned structure, the method of
manufacturing a semiconductor device is characterized in that an
energy density of the laser light in the fourth step is higher than
that of the laser light of the second step.
[0038] Also, in the above-mentioned structure, a step of adding a
metal element for accelerating a crystallization may be provided
before the second step.
[0039] Further, according to another structure of the invention,
there is provided a method of manufacturing a semiconductor device,
characterized by comprising:
[0040] a first step of forming on an insulating surface a first
semiconductor film that contains germanium in a concentration of
0.1 to 10 atoms % and has an amorphous structure;
[0041] a second step of adding a metal element for accelerating a
crystallization to the first semiconductor film having the
amorphous structure;
[0042] a third step of performing heat treatment to the first
semiconductor film and then irradiating it with a laser light to
form a first semiconductor film having a crystalline structure and
an oxide film thereon;
[0043] a fourth step of removing the oxide film;
[0044] a fifth step of irradiating a laser light in an inert gas
atmosphere or in a vacuum to level a surface of the first
semiconductor film;
[0045] a sixth step of oxidizing the surface of the semiconductor
film having the crystalline structure with a solution containing
ozone;
[0046] a seventh step of forming a second semiconductor film
including a rare gas element on the oxide film;
[0047] an eighth step of allowing the second semiconductor film to
getter the metal element to remove or reduce the metal element in
the first semiconductor film having the crystalline structure;
and
[0048] a ninth step of removing the second semiconductor film.
[0049] Also, in the above-mentioned structure, the method of
manufacturing a semiconductor device is characterized in that an
energy density of the laser light in the fifth step is higher than
that of the laser light in the third step.
BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In the accompanying drawings:
[0051] FIGS. 1A to 1E are views showing the present invention:
[0052] FIG. 2 is a graph showing a root mean square roughness (rms)
obtained by an AFM;
[0053] FIG. 3 is a graph showing a P-V value obtained by the
AFM;
[0054] FIGS. 4A to 4F are views showing manufacturing steps of the
present invention (Embodiment 1);
[0055] FIGS. 5A to 5D are views showing manufacturing steps of the
present invention (Embodiment 1);
[0056] FIGS. 6A to 6D are views showing manufacturing steps of an
active matrix substrate (Embodiment 2);
[0057] FIGS. 7A to 7C are views showing manufacturing steps of the
active matrix substrate (Embodiment 2);
[0058] FIG. 8 is a view showing the active matrix substrate
(Embodiment 2);
[0059] FIG. 9 is an external view of an AM-LCD (Embodiment 3):
[0060] FIG. 10 shows an example of a liquid crystal display device
in section (Embodiment 4);
[0061] FIGS. 11A and 11B are respectively a top view of an EL
module and a sectional view thereof (Embodiment 5);
[0062] FIGS. 12A to 12F each show an example of electronic
equipment (Embodiment 6);
[0063] FIGS. 13A to 13D each show an example of the electronic
equipment (Embodiment 6);
[0064] FIGS. 14A to 14C each show an example of the electronic
equipment (Embodiment 6); and
[0065] FIGS. 15A to 15C are microphotographs showing surfaces of a
silicon germanium film and a silicon film.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0066] [Embodiment Mode]
[0067] Embodiment Mode of the present invention will be described
below with reference to FIGS. 1A to 1E.
[0068] First, an amorphous semiconductor film 3 containing
germanium is formed on an insulating surface. For example, a base
insulating film is formed on a quartz substrate or glass substrate.
Herein, the insulating film mainly containing silicon, for example,
an oxide silicon film, a nitride silicon film or an oxynitride
film, or a laminate thereof is formed on a glass substrate 1 as a
base insulating film 2 (FIG. 1A). Note that, the base insulating
film 2 is provided for the purpose of preventing diffusion of
impurities from the substrate and in some cases it is not
particularly necessary to provide the film depending on the
substrate to be used.
[0069] The amorphous semiconductor film 3 containing germanium is
formed by a plasma CVD method, a low pressure CVD method, or other
methods as appropriate. When using the plasma CVD method, reaction
gas made of SiH.sub.1 and GeH.sub.1, and optionally a reaction gas
made of GeH.sub.4 that is diluted with SiH.sub.4 and H.sub.2 are
introduced into a reaction chamber to perform a high frequency
discharge with a frequency of 1 to 200 MHZ for decomposition,
thereby depositing the amorphous semiconductor film on the
substrate. As for the reaction gas, Si.sub.2H.sub.6 or SiF.sub.4,
and GeF.sub.4 may be used instead of SiH.sub.4 and GeH.sub.4,
respectively. Also, in a case of using the low pressure CVD method,
it is possible to employ such reaction gases. Preferably, the
reaction gas is diluted with He and the amorphous semiconductor
film is deposited on the substrate at a temperature of 400 to
500.degree. C. In any case, the above-mentioned gases used in the
present invention are those purified up to a high purity in order
to reduce a concentration of an impurity element such as oxygen,
nitrogen or carbon which is taken in the deposited amorphous
semiconductor film. Note that, the thickness of the deposited
amorphous semiconductor film is set to 20 to 100 nm.
[0070] Next, the amorphous semiconductor film containing germanium
is crystallized by heat treatment (FIG. 1B). In order to
crystallize the amorphous semiconductor film containing germanium,
it is necessary to perform the heat treatment at 600.degree. C. or
more for 10 hours or more.
[0071] Irradiation with laser light is then performed to improve a
crystallization rate and to repair defects remaining in a crystal
grain (FIG. 1C). When applying the laser light to an amorphous
semiconductor film containing no germanium, large unevennesses are
formed in the surface thereof. On the other hand, when applying the
laser light to the amorphous semiconductor film containing
germanium although the unevennesses are similarly formed, it is
small enough to maintain the levelness of the surface.
[0072] For the irradiation with laser light, excimer laser having a
wavelength of 400 nm or less, or a second harmonic (wavelength: 532
nm) to a fourth harmonic (wavelength: 266 nm) of YAG laser or
YVO.sub.4 laser are used as a light source. The laser light above
is condensed into a linear or spot shape by the optical system to
be irradiated with its energy density set to 100 to 700 mJ/cm.sup.2
and the processing is performed by scanning the laser beam thus
condensed over a predetermined region of the substrate.
[0073] Note that, a case of using pulse laser is described here by
way of example, but continuous oscillation type laser may be also
used. It is preferred that in order to obtain the crystal having a
large grain size upon the crystallization of the amorphous
semiconductor film, solid laser capable of the continuous
oscillation is used in combination with the application of a second
harmonic to a fourth harmonic of a fundamental wave. Typically, the
second harmonic (wavelength: 532 nm) or third harmonic (wavelength:
355 nm) of Nd: YVO.sub.4 laser (fundamental wave: 1064 nm) may be
applied. When using the continuous oscillation type laser, the
laser light emitted from the continuous oscillation type YVO.sub.4
laser with an output of 10 W is transformed into a harmonic by a
nonlinear optical element. Also, there is a method in which
YVO.sub.4 crystal and nonlinear optical element are put into a
resonator to emit the harmonic. Then, preferably, it is formed into
a laser light of a rectangular or elliptic shape on the irradiation
surface by the optical system to be applied to a member to be
processed. The required energy density at that time is
approximately 0.01 to 100 MW/cm.sup.2 (preferably, 0.1 to 10
MW/cm.sup.2). The irradiation may be performed in such a manner
that the semiconductor film is moved relative to the laser light at
a speed of approximately 10 to 2,000 cm/s.
[0074] In addition, instead of the laser, a halogen lamp, xenon
lamp, mercury lamp, metal halide lamp, or the like can be used as
the light source.
[0075] Considering the productivity of the TFT, the above-mentioned
heat treatment is not always suitable, so that the crystallization
of the amorphous silicon film may be performed only through the
irradiation with the laser light (the pulse oscillation type
excimer laser or the continuous oscillation type laser (second
harmonic of YVO.sub.4 laser)). Also, a technique disclosed in JP
07-130652 A or JP 08-78329 A may be used in which a metal element
for accelerating the crystallization of the silicon is introduced
and a crystalline silicon film is formed by heat treatment at a
temperature lower than that in the conventional case.
[0076] In addition, in order to further enhance the levelness, it
is also possible that after the above laser irradiation an oxide
film (not shown) formed by the laser irradiation is removed by
diluted hydrofluoric acid or the like to apply the laser light
(with the energy density higher than the previously applied laser
light) in an inert atmosphere or in a vacuum again.
[0077] Then, the leveled semiconductor film is patterned to form a
semiconductor layer 6 having a desired shape by a known patterning
method (FIG. 1D). It is desirable that before the formation of a
mask made of resist a thin oxide film is formed on the surface
thereof with ozone water.
[0078] The surface of the semiconductor layer is then washed with
an etchant containing hydrofluoric acid to form an insulating film
mainly containing silicon and serving as a gate insulating film 7.
The surface washing and formation of the gate insulating film are
desirably conducted continuously without an exposure to the outside
air.
[0079] Next, the surface of the gate insulating film 7 is washed
and thereafter a gate electrode 8 is formed. An impurity element
(such as P or As) imparting an n-type conductivity to the
semiconductor (in this case, phosphorous) is then added
appropriately to form a source region 9 and a drain region 10.
Alter the addition thereof, the heat treatment, strong light
irradiation or laser light irradiation is performed for activating
the impurity element. Also, at the same time as the activation,
plasma damage applied to the gate insulating film or that applied
to an interface between the gate insulating film and the
semiconductor layer can be recovered. In particular, it is highly
effective that the second harmonic of the YAG laser is applied from
the front or rear side in an atmosphere of a room temperature to
300.degree. C. to activate the impurity element. YAG laser is
preferable as the activation means in terms of less
maintenance.
[0080] Subsequent steps are as follows: forming an interlayer
insulating film 12, performing a hydrogenation, forming contact
holes reaching the source region and the drain region, and forming
a source electrode 13 and a drain electrode 14 to complete TFT
(n-channel TFT) (FIG. 1E).
[0081] The surface of a channel forming region 11 of the TFT thus
obtained may have a root mean square roughness (rms) of less than
10 nm and a P-V value of less than 70 nm.
[0082] The present invention is not limited to the TFT structure
shown in FIG. 1E but may employ an LDD structure (a lightly doped
drain structure) in which an LDD region is interposed between the
channel forming region and the drain region (or the source region)
as necessary. This structure is a structure in which a region added
with an impurity element in a low concentration is provided between
the channel forming region and the source or drain region formed by
adding the impurity element in a high concentration. The region is
called the LDD region. Further, it is also possible to employ a
so-called GOLD (gate-drain overlapped LDD) structure in which the
LDD region is arranged so as to overlap the gate electrode through
the gate insulating film.
[0083] The n-channel TFT is employed here for the description, but
it goes without saying that a p-channel TFT can be formed by using
a p-type impurity element instead of the n-type impurity
element.
[0084] Also, the top gate type TFT is described herein as an
example, but the present invention can be applied irrespective of
the TFT structure and the present invention can be applied, for
example, to a bottom gate type (reverse stagger type) TFT or a
forward stagger type TFT.
[0085] (Experiment)
[0086] Experiments are performed as follows.
[0087] A base film is formed on a glass substrate. The base
insulating film is composed of a two-layer structure including a
first oxynitride silicon film with a thickness of 50 to 100 nm
which is formed by using SiH.sub.4, NH.sub.3, and N.sub.2O as
reaction gases and a second oxynitride silicon film with a
thickness of 100 to 150 nm which is formed by using SiH.sub.4 and
N.sub.2O as the reaction gases, the two films being laminated.
[0088] Next, after the formation of the base insulating film an
amorphous semiconductor film is formed. As the amorphous
semiconductor film, an amorphous silicon film, an amorphous silicon
film containing 1.7% germanium to silicon, and an amorphous silicon
film containing 3.5% germanium to silicon are formed by a plasma
CVD method, respectively.
[0089] Subsequently, a nickel containing layer is formed by
applying a nickel acetate solution containing nickel in a
concentration of 10 ppm in terms of weight by a spinner. A
dehydrogenation process is then performed at 500.degree. C. for 1
hour to reduce a hydrogen concentration in the film, followed by
heat treatment at 550.degree. C. for 4 hours to form the
semiconductor films each having a crystalline structure.
[0090] At this point, as a comparative example, a surface condition
of each semiconductor film is measured by an atomic force
microscopy (AFM). The measurement results are shown in FIGS. 2 and
3. FIG. 2 shows the root mean square (rms) of the unevenness on the
surface, and FIG. 3 shows a peak to valley (P-V) value of the
unevenness (a difference in height between the maximum value and
the minimum value). Here, the values of FIGS. 2 and 3 both are
measured in a region of 3 .mu.m.times.3 .mu.m.
[0091] In order to improve the crystallization rate and repair the
defects remaining in the crystal grains, a laser light (XeCl:
wavelength of 308 nm) is then irradiated in an atmosphere or in an
oxygen atmosphere. As the laser light, an excimer laser light
(wavelength: 400 nm or less) and a second harmonic or a third
harmonic of YAG laser are used. In any case, a pulse laser light
with a repetition frequency of approximately 10 to 1,000 Hz is used
and the laser light is condensed into 100 to 500 mJ/cm.sup.2 by an
optical system to be applied with an overlap ratio of 90 to 95% for
scanning of the silicon film surface.
[0092] While changing the energy density condition, the laser light
is irradiated and the measurement is performed by using the AFM for
each condition. The measurement results are shown in FIGS. 2 and
3.
[0093] As will be apparent from FIGS. 2 and 3, as the amount of
contained germanium increases, the unevenness of the surface
becomes smaller. Specifically, the root mean square roughness (rms)
and P-V value of the surface are lowered to increase the levelness
of the surface.
[0094] As for the root mean square roughness (rms), after the
irradiation with the laser light the silicon film containing no
germanium has approximately 10 to 30 nm, whereas in the film
allowed to contain the germanium the root mean square (rms) of the
unevenness on the surface is suppressed to less than 10 nm.
[0095] As for the P-V value, after the irradiation with the laser
light the silicon film containing no germanium has approximately 70
to 100 nm. whereas in the film allowed to contain the germanium the
P-V value of the unevenness of the surface is suppressed to less
than 70 nm.
[0096] Here, FIGS. 15A to 15C are microphotographs in cases of
irradiating films with a laser light in an atmosphere with the
number of shots set to 13, the repetition frequency set to 30 Hz,
and the energy density set to 521 mJ/cm.sup.2. FIG. 15A shows a
case of a silicon germanium (Si.sub.1-XGe.sub.X(X=0.017)) film,
FIG. 15B shows a case of a silicon germanium
(Si.sub.1-XGe.sub.X(X=0.035)) film, and FIG. 15C shows a case of a
silicon film. As can be also seen from the microphotographs, the
semiconductor films containing the germanium (FIGS. 15A and 15B)
are high in levelness with less unevenness in comparison with the
semiconductor film containing no germanium (FIG. 15C).
[0097] Further, the semiconductor film obtained according to the
above-mentioned method has a high orientation ratio with respect to
{101} lattice plane. As to the orientation ratio of the crystal,
the crystal grains are oriented largely to {101 } lattice plane and
it can be also observed that the crystal grains tend to orient
toward {311} plane that is placed in an intermediate position
between {001} plane and {111} plane. Specifically, the ratios of
the crystal grains whose angles to the surface of the semiconductor
layer are 10.degree. or less are 20% or more in {101} lattice
plane, 3% or less in {001} plane, and 5% or less in {111} plane,
respectively. The detection is performed by using an electron
backscatter diffraction pattern method.
[0098] The distribution of crystal orientation is obtained by the
electron backscatter diffraction pattern (EBSP), which is a method
of performing an analysis of the crystal orientation from the
backscatter of primary electrons with a dedicated detector provided
in the scanning electron microscopy (SEM). By repeating the
orientation analysis while shifting a position of a sample to which
an electron beam is applied (mapping), the information on the
crystal orientation or orientation in the plane-shaped sample can
be obtained. The width of an incident electron beam varies
depending on the type of electron gun of the scanning electron
microscopy, but in a case of a Schottky field emission type, a
considerably thin electron beam of 10 to 20 nm is applied. In the
mapping, with an increase in the number of measurement points or in
an area of measurement region, the further averaged information on
the crystal orientation can be obtained. Actually, the measurement
is performed in a region of 100 .mu.m.times.100 .mu.m at
approximately 10,000 points (interval: 1 .mu.m) to 40,000 points
(interval: 0.5 .mu.m). After the crystal orientation of each
crystal rain is completely determined by the mapping, it is
possible to statistically display the condition of the orientation
of the crystal rains to a film. If the distribution is concentrated
around {101} lattice plane, in the actual film <101>
orientation of each crystal grain is in a direction substantially
perpendicular to the substrate. At this time, it can be supposed
that the grains are arranged around there with some fluctuations.
There is provided an acceptable value to the fluctuation angle, for
example, by 5 degrees or 10 degrees and the ratio of the crystal
grains with the angle less than the above value is indicated by
numeric values. Herein, the acceptable deviation angle is set to 5
or 10 degrees as described above and the ratio of the crystal
grains whose angles all within the range is called the orientation
rate of crystal.
[0099] The crystalline silicon film formed by the conventional
method is influenced by the substrate or the base insulating film
at the time of crystallization and thus a plurality of crystal
grains are deposited. Therefore, although there is the tendency of
orientating to {111} plane, the ratio of crystal grains oriented
toward the plane direction is low.
[0100] By using as an active layer of the TFT the thus obtained
semiconductor film that is high in levelness and in orientation
rate of crystal in the semiconductor film, the semiconductor device
which has a low OFF current value with a reduced variation can be
obtained.
[0101] The present invention structured as described above will be
further described in detail by use of embodiments below.
[0102] [Embodiment 1]
[0103] An example of manufacturing TFTs conducted laser irradiation
or two times is shown in FIGS. 4 and 5.
[0104] Reference numeral 20 in FIG. 4A denotes a substrate having
an insulating surface, reference numeral 21 denotes an insulating
film that becomes a blocking layer, and reference numeral 22
denotes a semiconductor film having an amorphous structure.
[0105] First, the base insulating film 21 is formed on the
substrate 20 from an insulating film such as a silicon oxide film,
a silicon nitride film, or a silicon oxynitride film
(SiO,.sub..backslash.N.sub..backslash.- ), as shown in FIG. 4A. A
typical example is a two layer structure as the base insulating
film 21. The structure is employed, in which a first silicon
oxynitride film formed to have a thickness of 50 to 100 nm using
SiH.sub.4, NH.sub.3, and N.sub.2O as reaction gas, and a second
silicon oxynitride film formed to have a thickness of 100 to 150 nm
using SiH.sub.4 and N.sub.2O as reaction gas are laminated.
Further, it is preferable to use a silicon nitride film (SiN film)
with a film thickness of 10 nm or less or a second silicon
oxynitride film (SiN.sub..backslash.O.sub..backslash. film, where
x>>y) as one layer of the base insulating film 21. Nickel has
a tendency to easily move to regions including oxygen with a high
concentration, and therefore it is extremely effective to use a
silicon nitride film as the base insulating film that contacts the
semiconductor film. Further, a three layer structure in which a
first silicon oxynitride film, a second silicon oxynitride film,
and a silicon nitride film are laminated in order may also be
used.
[0106] The first semiconductor film 22 containing germanium with an
amorphous structure is then formed on the base insulating film. A
film such as an amorphous silicon germanium film is typically
applied, and is formed to have a thickness of 10 to 100 nm by
plasma CVD, reduced pressure CVD, or sputtering. It is preferable
to reduce the concentration of impurities such as oxygen and
nitrogen contained in the first semiconductor film 22 to a
concentration of 5.times.10.sup.18/cm.sup.3 or less (atomic
concentration measured using secondary ion mass spectrometry.
(SIMS)) in order to obtain a semiconductor film with a satisfactory
crystalline structure by later crystallizing. These impurity
elements cause interference in the later crystallization, and also
cause the concentration of capture centers and recombination
centers to increase after crystallization. It is therefore
desirable to use material as with high purity and to employ an
ultra-high vacuum CVD apparatus in which the inside of its reaction
chamber has undergone mirrored surface processing (electrolytic
polishing), and which is provided with an oil free vacuum
evacuation system.
[0107] Crystallization is performed next using the technique
disclosed in Japanese Patent Application Laid-open No. Hei 8-78329
as a technique for crystallizing the first semiconductor film 22.
The technique in Japanese Patent Application Laid-open No. Hei
8-78329 is that a metallic element for promoting crystallization is
selectively added to the amorphous silicon film, and heat treatment
is performed. A semiconductor film is thus formed which has a
crystalline structure spreading out from the region to which the
metallic element is added. First, a nickel acetate solution
containing 1 to 100 ppm by weight of a metallic element (nickel is
used here) which has a catalytic action for promoting
crystallization is applied to the surface of the first
semiconductor film 22 by a spinner to form a nickel containing
layer 23. (See FIG. 4B.) A means for forming an extremely thin film
by sputtering, evaporation, or plasma processing may also be
employed as an other means for forming the nickel containing layer
23. Furthermore, although an example in which application is
performed over the entire surface is shown here, the nickel
containing layer may be formed selectively by forming a mask.
[0108] Heat treatment is performed next to perform crystallization.
In this case, silicides are formed at portions of the semiconductor
film which are in contact with the metallic element that promotes
crystallization of semiconductor, and then crystallization proceeds
with the silicides acting as nuclei. A first semiconductor film 24a
with a crystalline structure is thus formed as shown in FIG. 4C.
Note that it is desirable that the concentration of oxygen
contained in the first semiconductor film 24a after crystallization
be is 5.times.10.sup.18/cm.sup.3 or less. Heat treatment for
dehydrogenation is here performed at 450.degree. C. for one hour,
and then heat treatment for crystallization is performed for 4 to
24 hours at 550 to 650.degree. C. Further, it is possible to use
one kind or a plurality of kinds, selected from the group
consisting of infrared light, visible light, and ultraviolet light
in the case of performing crystallization by irradiating strong
light. Light emitted from a halogen lamp, a metal halide lamp, a
xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or
a high pressure mercury lamp is typically used. A light source of a
lump may be turned on for 1 to 60 seconds, preferably 30 and 60
seconds, and this operation may be repeated one to 10 times to heat
the semiconductor film instantaneously to a temperature on the
order of 600 to 1000.degree. C. Note that, if necessary, heat
treatment for emitting hydrogen contained in the first
semiconductor film 24a may also be performed before irradiating
strong light. Furthermore, crystallization may also be performed by
using heat treatment and irradiation of strong light at the same
time. Considering productivity, it is preferable that
crystallization be performed by strong light irradiation.
[0109] The metallic element (nickel here) remains in the first
semiconductor film 24a thus obtained. Although the metallic element
is not distributed uniformly through the film, a concentration
exceeding 1.times.10.sup.19/cm.sup.3 remains on average. It is of
course possible to form various types of semiconductor elements
such as TFTs even in this state, but the metallic element is
removed by a gettering method described later.
[0110] Laser light (first laser light) is next irradiated to first
semiconductor film 24a with the crystalline in an atmosphere or in
an oxygen atmosphere, in order to increase crystallinity
(proportion of crystalline components to the total volume of the
film) and in order to repair defects remaining in crystal grains.
Unevenness is formed in the surface and a thin oxide film 25 is
formed if laser light (a first laser light) is irradiated (See FIG.
4D). The laser light (a first laser light) used is excimer laser
light with a wavelength of 400 nm or less, or second harmonic or
third harmonic of YAG laser. In addition, light emitted from an
ultraviolet light lamp may also be used as a substitute for the
excimer laser light. In any case, pulse laser light with a
repetition frequency of approximately 10 to 1000 Hz is used, the
pulse laser light is condensed to 100 to 500 mJ/cm.sup.2 by an
optical system, and irradiation is performed with an overlap ratio
of 90 to 95%, whereby the silicon film surface may be scanned.
[0111] Next, the oxide film 25 is removed (See FIG. 1E). Laser
light (second laser light) is then irradiated to the first
semiconductor film with the crystalline structure in a nitrogen
atmosphere or in a vacuum. The P-V value (Peak to Valley value:
difference between the maximum value and the minimum value of
height) of the unevenness formed by irradiating the first laser
light and rms is reduced when the second laser light is irradiated.
Namely, leveled semiconductor film 24b is performed (See FIG. 1F).
The laser light (the second laser light) used is excimer laser
light with a wavelength of 400 nm or less, or second harmonic and
third harmonic of YAG laser. In addition, light emitted from an
ultraviolet light lamp may also be used as a substitute for the
excimer laser light. Note that the energy density of the second
laser light is made larger than the energy density of the first
laser light, preferably from 30 to 60 mJ/cm.sup.2 larger.
[0112] In addition, an oxide film (referred to as a chemical oxide
film) is formed by using an ozone containing aqueous solution
(typically ozone water) to form a barrier layer 26 of an oxide film
with a total thickness of 1 to 10 nm. Then, a second semiconductor
film 27 containing an inert gas element is formed on the barrier
layer 26 (FIG. 5A). The barrier layer 26 functions as an etching
stopper in selectively removing the second semiconductor film 106
alone later. Further, the chemical oxide can also be formed
similarly by processing with an aqueous solution in which an acid
such as sulfuric acid, hydrochloric acid, or nitric acid is mixed
with aqueous hydrogen peroxide as a substrate for the ozone
containing aqueous solution. It may also be used as another method
of forming the barrier layer 26 that ozone is generated by
irradiating ultraviolet light in an oxygen atmosphere and the
surface of the semiconductor film with the crystalline structure is
oxidized. In addition, an oxide film with a thickness on the order
of 1 to 10 nm may also be deposited as a barrier layer with a
method such as plasma CVD, sputtering, or evaporation as an another
method for forming the barrier layer 26. Further, a thin oxide film
may also be formed by heating with a clean oven at a temperature on
the order of 200 to 350.degree. C., as an another method of forming
the barrier layer 26. Note that there are no particular limitations
on a method of forming the barrier layer 26, provided that it is
formed by one of, or a combination of, the above stated methods.
However, the barrier layer 26 needs to have a film quality or a
film thickness in order that nickel within the first semiconductor
film is capable of moving to the second semiconductor film by later
gettering.
[0113] The second semiconductor film 27 containing the inert gas
element is formed by sputtering here to form gettering sites. Note
that it is preferable that the conditions in sputtering are
suitably regulated in order that the inert gas element is not added
to the first semiconductor film. One element, or a plurality of
elements, selected from the group consisting of helium (He), neon
(Ne), argon (Ar), krypton (Kr), and xenon (Xe) are used as the
inert gas element. Among these elements, it is preferable to use
argon (Ar) which is low cost gas. A target of silicon is used in an
atmosphere containing the inert gas element here to form the second
semiconductor film. There are two meanings associated with
including ions of rare gas element that is inert gas within the
film; one is that dangling bonds are formed to impart distortions
to the semiconductor film, and the other is that distortions are
formed within lattices of the semiconductor film. The distortions
within the lattices of the semiconductor film can be obtained
remarkably if an element with a greater atomic radius, such as
argon (Ar), krypton (Kr), or xenon (Xe) than that of silicon is
used. Not only are lattice distortions formed by including the rare
gas element within the film, unpaired bonds are also formed to
contribute to gettering action.
[0114] Furthermore, gettering can be performed utilizing the
Coulomb force of phosphorous in addition to gettering with rare gas
element in the case of forming the second semiconductor film by
using a target containing phosphorous which is an impurity element
with a single conductivity type.
[0115] A heat treatment is performed next to perform gettering, for
reducing the concentration of the metallic element (nickel) in, or
removing the metallic element from, the first semiconductor film
(FIG. 5B). A treatment of irradiating strong light or thermal
treatment may be performed as the heat treatment. The metallic
element moves in the direction of the arrow in FIG. 5B (that is, in
the direction from the substrate side toward the surface of the
second semiconductor film), to perform removing the metallic
element or lowering the concentration of the metallic element,
contained in the first semiconductor film 24b covered by the
barrier layer 26. The distance where the metallic element move
during gettering may be a distance at least on the order of the
thickness of the first semiconductor film, and gettering can be
accomplished in a relatively short amount of time. Sufficient
gettering is performed in order that all of the nickel is made to
move to the second semiconductor film 27 without segregating in the
first semiconductor film 24b and that nickel contained in the first
semiconductor film 24b hardly exists. That is, gettering is
performed so that the concentration of the nickel within the first
semiconductor film becomes equal to or less than
1.times.10.sup.18/cm.sup.3, preferably equal to or less than
1.times.10.sup.17/cm.sup.3.
[0116] In this specification, the term gettering indicates emission
of a metallic element from a region to be gettered (the first
semiconductor film here) by thermal energy, and movement of the
metallic element to gettering sites by diffusion. Accordingly,
gettering is dependent upon the processing temperature, and
proceeds in a shorter amount of time with higher temperature.
[0117] Further, a light source of a lump for heating is turned on
for 1 to 60 seconds, preferably for 30 to 60 seconds, and this
operation is repeated for 1 to 10 times, preferably between 2 and 6
times, in the case of using a process of irradiating strong light
as the heat treatment for gettering. Although the light emission
strength of the light source may be set arbitrarily, the
semiconductor film made to be instantaneously heated to a
temperature of 600 to 1000.degree. C., preferably 700 and
750.degree. C.
[0118] In the case of performing thermal treatment, heating may be
conducted in a nitrogen atmosphere at a temperature of 450 to
800.degree. C. for 1 to 24 hours, for example, at 550.degree. C.
for 14 hours. Strong light may also be irradiated in addition to
the thermal treatment.
[0119] Next, the second semiconductor film only is selectively
removed with using the barrier layer 26 as an etching stopper, and
the barrier layer formed of the oxide film 26 is also removed. Dry
etching which does not utilize a ClF.sub.3 plasma, or wet etching
by using an alkaline solution such as hydrazine or an aqueous
solution containing tetraethyl-ammonium-hydroxide (chemical formula
(CH.sub.3).sub.4NOH)) can be performed as the method of selectively
etching only the second semiconductor film. Further, it is
preferable to remove the barrier layer after removing the second
semiconductor film since nickel is detected at high concentration
on the surface or the barrier layer by measuring the nickel
concentration with TXRF. The barrier layer may be removed by an
etchant containing hydrofluoric acid.
[0120] The leveled semiconductor film 24b is next formed into a
semiconductor layer 28 with a desired shape by using a known
patterning technique (FIG. 5C). It is preferable to form a thin
oxide film on the surface by using ozone water before forming a
resist mask.
[0121] An insulating film including silicon as its main
constituent, which becomes a gate insulating film 29, is then
formed next after cleaning the surface of the semiconductor film
using an etchant containing hydrofluoric acid. It is preferable to
clean the surface and form the gate insulating film in succession,
without exposing to the atmosphere.
[0122] Subsequent processes to completing TFT are performed in the
same processes of the Embodiment Modes of the invention (FIG. 5D).
Note that the reference numerals 29 to 36 denote a gate insulating
film, a gate electrode, a source region, a drain region, a channel
forming region, a source electrode, a drain electrode, and an
interlayer insulating film respectively.
[0123] Furthermore, this embodiment can be freely combined with the
Embodiment Modes of the invention. In addition, preset embodiment
may also be combined with other known gettering method.
[0124] Furthermore, there may be a case in which a semiconductor
layer is formed into a predetermined shape by gettering, and then
it is performed to irradiating second laser light in an inert gas
atmosphere or in a vacuum to perform leveling after removing an
oxide film, without irradiating the second laser light before
gettering.
[0125] [Embodiment 2]
[0126] An embodiment of the present invention is described with
reference to FIGS. 6 to 8. Here, a method of simultaneously
manufacturing a pixel portion and TFTs (n-channel TFTs and a
p-channel TFT) of a driver circuit provided in the periphery of the
pixel portion on the same substrate is described in detail.
[0127] First, a base insulating film 101 is formed on a substrate
100, and a first semiconductor film having a crystalline structure
is obtained. Then, the semiconductor film is etched to have a
desired shape to form semiconductor layers 102 to 106 separated
from one another in an island shape.
[0128] A glass substrate (#1737) is used as the substrate 100. For
the base insulating film 101, a silicon oxynitride film 101a formed
from SiH.sub.4, NH.sub.3, and N.sub.2O as material gases
(composition ratio: Si=32%, O=27%, N=24%, H=17%) is formed with a
thickness of 50 nm (preferably 10 to 200 nm) and at a film
deposition temperature of 400.degree. C. by using plasma CVD. Then,
after the surface is cleaned with ozone water, an oxide film on the
surface is removed by means of dilute hydrofluoric acid (dilution
with 1/100). Next, a silicon hydride oxynitride film 101b formed
from SiH.sub.4 and N.sub.2O as material gases (composition ratio:
Si=32%, O=59%, N=7%, H=2%) is formed thereon with a thickness of
100 nm (preferably 50 to 200 nm) and at a film deposition
temperature of 400.degree. C. by using plasma CVD to thereby form a
lamination. Further, without exposure to an atmosphere, a
semiconductor film having an amorphous structure (in this case,
amorphous silicon film) is formed to have a thickness of 54 nm
(preferably 25 to 80 nm) with SiH.sub.4 as a film deposition gas
and at a film deposition temperature of 300.degree. C. by using
plasma CVD. Also, Si.sub.2H.sub.6 or SiF.sub.4 instead of SiH.sub.4
and GeF.sub.4 instead of GeH.sub.4 may be used.
[0129] In this embodiment, the base film 101 is shown in a form of
a two-layer structure, but a single layer of the insulating film or
a structure in which two or more layers thereof are laminated may
be adopted. Further, there is no limitation on the material of the
semiconductor film. However, the semiconductor film may be
preferably formed of silicon or silicon germanium
(Si.sub.XGe.sub.1-X(X=0.0001 to 0.02)) alloy by using a known means
(sputtering, LPCVD, plasma CVD, or the like). Further, a plasma CVD
apparatus may be a single wafer type one or a batch type one. In
addition, the base insulating film and the semiconductor film may
be continuously formed in the same film formation chamber without
exposure to an atmosphere.
[0130] Subsequently, after the surface of the semiconductor film
having an amorphous structure is cleaned, an extremely thin oxide
film with a thickness of about 2 nm is formed from ozone water on
the surface. Then, in order to control a threshold value of a TFT,
doping of a minute amount of impurity element (boron or
phosphorous) is performed. Here, an ion doping method is used in
which diborane (B.sub.2H.sub.6) is plasma-excited without
mass-separation, and boron is added to the amorphous silicon film
under the doping conditions: an acceleration voltage of 15 kV; a
gas flow rate of diborane diluted to 1% with hydrogen of 30 sccm:
and a dosage of 2.times.10.sup.12/cm.sup.2.
[0131] Then, a nickel acetate salt solution containing nickel of 10
ppm in weight is applied using a spinner. Instead of the
application, a method of spraying nickel elements to the entire
surface by sputtering may also be used.
[0132] Then, heat treatment is conducted to perform
crystallization, thereby forming a semiconductor film having a
crystalline structure. A heating process using an electric furnace
or irradiation of strong light may be conducted for this heat
treatment. In case of the heating process using an electric
furnace, it may be conducted at 500 to 650.degree. C. for 4 to 24
hours. Here, after the heating process (500.degree. C. for 1 hour)
for dehydrogenation is conducted. the heating process (550.degree.
C. 1 or 4 hours) for crystallization is conducted, thereby
obtaining a silicon film having a crystalline structure. Note that,
although crystallization is performed by using the heating process
using a furnace, crystallization may be performed by means of a
lamp annealing apparatus. Also note that, although a
crystallization technique using nickel as a metal element that
promotes crystallization of silicon is used here, other known
crystallization techniques, for example, a solid-phase growth
method and a laser crystallization method, may be used.
[0133] Next, after the oxide film on the surface of the silicon
film having a crystalline structure is removed by dilute
hydrofluoric acid or the like, irradiation of first laser light
(XeCl: wavelength of 308 nm) for raising a crystallization rate and
repairing defects remaining in crystal grains is performed in an
atmosphere or in an oxygen atmosphere. Excimer laser light with a
wavelength of 400 nm or less, or second harmonic wave or third
harmonic wave of a YAG laser is used for the laser light. In any
case, pulse laser light with a repetition frequency of
approximately 10 to 1000 Hz is used, the pulse laser light is
condensed to 100 to 500 mJ/cm.sup.2 by an optical system, and
irradiation is performed with an overlap ratio of 90 to 95%,
whereby the silicon film surface may be scanned. Note that an oxide
film is formed on the surface by the first laser light irradiation
since the irradiation is conducted in an atmosphere or in an oxygen
atmosphere.
[0134] Next, after the oxide film formed by the first light
irradiation is removed by dilute hydrofluoric acid, second laser
light irradiation is performed in a nitrogen atmosphere or in a
vacuum, thereby leveling the semiconductor film surface. Excimer
laser light with a wavelength of 400 nm or less, or second harmonic
wave or third harmonic wave of a YAG laser is used as the laser
light (second laser light). The energy density of the second laser
light is made larger than that of the first laser light, preferably
made larger by 30 to 60 mJ/cm.sup.2.
[0135] Next, the surface is processed with ozone water for 120
seconds, thereby forming a barrier layer comprised of an oxide film
with a thickness or 1 to 5 nm in total.
[0136] Then, an amorphous silicon film containing an argon element,
which becomes a gettering site, is formed on the barrier layer to
have a thickness of 150 nm by sputtering. The film deposition
conditions with sputtering in this embodiment are: a film
deposition pressure of 0.3 Pa; a gas (Ar) flow rate of 50 sccm; a
film deposition power of 3 kW; and a substrate temperature of
150.degree. C. Note that under the above conditions, the atomic
concentration of the argon element contained in the amorphous
silicon film is 3.times.10.sup.20/cm.sup.3 to
6.times.10.sup.20/cm.sup.3, and the atomic concentration of oxygen
is 1.times.10.sup.19/cm.sup.3 to 3.times.10.sup.19/cm.sup.3.
Thereafter, heat treatment at 650.degree. C. for 3 minutes is
conducted using the lamp annealing apparatus to perform
gettering.
[0137] Subsequently, the amorphous silicon film containing the
argon element, which is the gettering site, is selectively removed
with the barrier layer as an etching stopper, and then, the barrier
layer is selectively removed by dilute hydrofluoric acid. Note that
there is a tendency that nickel is likely to move to a region with
a high oxygen concentration in gettering, and thus, it is desirable
that the barrier layer comprised of the oxide film is removed after
gettering.
[0138] Then, after a thin oxide film is formed from ozone water on
the surface of the obtained silicon film having a crystalline
structure (also referred to as polysilicon film), a mask made of
resist is formed, and an etching process is conducted thereto to
obtain a desired shape, thereby forming the island-like
semiconductor layers 102 to 106 separated from one another. After
the formation of the semiconductor layers, the mask made of resist
is removed.
[0139] Then, the oxide film is removed with the etchant containing
hydrofluoric acid, and at the same time, the surface of the silicon
film is cleaned. Thereafter, an insulating film containing silicon
as its main constituent, which becomes a gate insulating film 107,
is formed. In this embodiment, a silicon oxynitride film
(composition ratio: Si=32%, O=59%, N=7%, H=2%) is formed with a
thickness of 115 nm by plasma CVD.
[0140] Next, as shown in FIG. 6A, on the gate insulating film 107,
a first conductive film 108a with a thickness of 20 to 100 nm and a
second conductive film 108b with a thickness of 100 to 400 nm are
formed in lamination. In this embodiment, a 50 nm thick tantalum
nitride film and a 370 nm thick tungsten film are sequentially
laminated on the gate insulating film 107.
[0141] As a conductive material for forming the first conductive
film and the second conductive film, an element selected from the
group consisting of Ta, W, Ti, Mo, Al and Cu, or an alloy material
or compound material containing the above element as its main
constituent is employed. Further, a semiconductor film typified by
a polycrystalline silicon film doped with an impurity element such
as phosphorous, or an AgPdCu alloy may be used as the first
conductive film and the second conductive film. Further, the
present invention is not limited to a two-layer structure. For
example, a three-layer structure may be adopted in which a 50 nm
thick tungsten film, an alloy film of aluminum and silicon (Al--Si)
with a thickness of 500 nm, and a 30 nm thick titanium nitride film
are sequentially laminated. Moreover, in case of a three-layer
structure, tungsten nitride may be used in place of tungsten of the
first conductive film, an alloy film of aluminum and titanium
(Al--Ti) may be used in place of the alloy film of aluminum and
silicon (Al--Si) of the second conductive film, and a titanium film
may be used in place of the titanium nitride film of the third
conductive film. In addition, a single layer structure may also be
adopted.
[0142] Next, as shown in FIG. 6B, masks 110 to 115 are formed by an
exposure step, and a first etching process for forming gate
electrodes and wirings is performed. The first etching process is
performed with first and second etching conditions. An ICP
(inductively coupled plasma) etching method may be preferably used
for the etching process. The ICP etching method is used, and the
etching conditions (an electric energy applied to a coil-shape
electrode, an electric energy applied to an electrode on a
substrate side, a temperature of the electrode on the substrate
side, and the like) are appropriately adjusted, whereby a film can
be etched to have a desired taper shape. Note that chlorine-based
gases typified by Cl.sub.2, BCl.sub.3, SiCl.sub.4, and CCl.sub.4,
fluorine-based gases typified by CF.sub.4, SF.sub.6, and NF.sub.3,
and O.sub.2 can be appropriately used as etching gases.
[0143] In this embodiment, RF (13.56 MHZ) power of 150 W is applied
also to the substrate (sample stage) to apply a substantially
negative self-bias voltage. With the first etching conditions, a W
film is etched to form an end portion of the first conductive layer
into a tapered shape. Under the first etching conditions, an
etching rate to W is 200.39 nm/min, an etching rate to TaN is 80.32
nm/min. and a selection ratio of W to TaN is about 2.5. Further,
with the first etching conditions, a taper angle of W is
approximately 26.degree.. Thereafter, the first etching conditions
are changed to the second etching conditions without removing the
masks 110 to 115 made of resist. CF.sub.4 and Cl.sub.2 are used as
etching gases, the flow rate of the gases is set to 30/30 sccm, and
RF (13.56 MHZ) power of 500 W is applied to a coil-shape electrode
with a pressure of 1 Pa to generate plasma, thereby performing
etching for about 30 seconds. RF (13.56 MHZ) power of 20 W is also
applied to the substrate side (sample stage) to apply a
substantially negative self-bias voltage. Under the second etching
conditions in which CF.sub.4 and Cl.sub.2 are mixed, both the W
film and the TaN film are etched at the same level. With the second
etching conditions, an etching rate to W is 58.97 nm/min. and an
etching rate to TaN is 66.43 nm/min. Note that an etching time may
be increased by 10 to 20% in order to conduct etching without
remaining residue on the gate insulating film.
[0144] In the first etching process as described above, the shape
of the mask made of resist is made appropriate, whereby the end
portion of the first conductive layer and the end portion of the
second conductive layer each have a tapered shape due to the effect
of the bias voltage applied to the substrate side. The angle of the
tapered portion is sufficiently set to 15 to 45.degree..
[0145] Thus, first shape conductive layers 117 to 121 composed of
the first conductive layer and the second conductive layer (first
conductive layers 117a to 121a and second conductive layers 117b to
121b) are formed by the first etching process. The insulating film
107 that becomes the gate insulating film is etched by
approximately 10 to 20 nm, and becomes a gate insulating film 116
in which regions which are not covered by the first shape
conductive layers 117 to 121 are thinned.
[0146] Next, a second etching process is conducted without removing
the masks made of resist. Here, SF.sub.6, Cl.sub.2 and O.sub.2 are
used as etching gases, the flow rate of the gases is set to
24/12/24 sccm, and RF (13.56 MHZ) power of 700 W is applied to a
coil-shape electrode with a pressure of 1.3 Pa to generate plasma,
thereby performing etching for 25 seconds. RF (13.56 MHZ) power of
10 W is also applied to the substrate side (sample stage) to apply
a substantially negative self-bias voltage. In the second etching
process, an etching rate to W is 227.3 nm/min, an etching rate to
TaN is 32.1 nm/min, a selection ratio of W to TaN is 7.1, an
etching rate to SiON that is the insulating film 116 is 33.7
nm/min, and a selection ratio of W to SiON is 6.83. In the case
where SF.sub.6 is used as the etching gas, the selection ratio with
respect to the insulating film 116 is high as described above.
Thus, reduction in the film thickness can be suppressed. In this
embodiment, the film thickness of the insulating film 116 is
reduced by only about 8 nm.
[0147] By the second etching process, the taper angle of W becomes
70.degree.. By the second etching process, second conductive layers
124b to 129b are formed. On the other hand, the first conductive
layers are hardly etched to become first conductive layers 124a to
129a (FIG. 6C). Note that the first conductive layers 124a to 129a
have substantially the same size as the first conductive layers
117a to 122a. In actuality, the width of the first conductive layer
may be reduced by approximately 0.3 .mu.m, namely, approximately
0.6 .mu.m in the total line width in comparison with before the
second etching process. However, there is almost no change in size
of the first conductive layer.
[0148] Next, the masks made of resist are removed, and then, a
first doping process is conducted to obtain the state of FIG. 6D.
The doping process may be conducted by ion doping or ion
implantation. Ion doping is conducted with the conditions of a
dosage of 1.5.times.10.sup.14 atoms/cm.sup.2 and an accelerating
voltage of 60 to 100 keV. As an impurity element imparting n-type
conductivity, phosphorous (P) or arsenic (As) is typically used. In
this case, first conductive layers and second conductive layers 124
to 128 become masks against the impurity element imparting n-type
conductivity, and first impurity regions 130 to 134 are formed in a
self-aligning manner. The impurity element imparting n-type
conductivity is added to the first impurity regions 130 to 134 in a
concentration range of 1.times.10.sup.16 to
1.times.10.sup.17/cm.sup.3. Here, the region having the same
concentration range as the first impurity region is also called an
n.sup.- region.
[0149] Note that although the first doping process is performed
after the removal of the masks made of resist in this embodiment,
the first doping process may be performed without removing the
masks made of resist.
[0150] Subsequently, as shown in FIG. 7A, masks 135 to 137 made of
resist are formed, and a second doping process is conducted. The
mask 135 is a mask for protecting a channel forming region and a
periphery thereof of a semiconductor layer forming a p-channel TFT
of a driver circuit, the mask 136 is a mask for protecting a
channel forming region and a periphery thereof of a semiconductor
layer forming one of n-channel TFTs of the driver circuit, and the
mask 137 is a mask for protecting a channel forming region, a
periphery thereof, and a storage capacitor of a semiconductor layer
forming a TFT of a pixel portion.
[0151] With the ion doping conditions in the second doping process:
a dosage of 1.5.times.10.sup.15 atoms/cm.sup.2; and an accelerating
voltage of 60 to 100 keV, phosphorous (P) is doped. Here, impurity
regions are formed in the respective semiconductor layers in a
self-aligning manner with the second conductive layers 124b to 126b
as masks. Of course, phosphorous is not added to the regions
covered by the masks 135 to 137. Thus, second impurity regions 138
to 140 and a third impurity region 142 are formed. The impurity
element imparting n-type conductivity is added to the second
impurity regions 138 to 140 in a concentration range of
1.times.10.sup.20 to 1.times.10.sup.21/cm.sup.3. Here, the region
having the same concentration range as the second impurity region
is also called an n.sup.+ region.
[0152] Further, the third impurity region is formed at a lower
concentration than that in the second impurity region by the first
conductive layer, and is added with the impurity element imparting
n-type conductivity in a concentration range of 1.times.10.sup.18
to 1.times.10.sup.19/cm.sup.3. Note that since doping is conducted
by passing the portion of the first conductive layer having a
tapered shape, the third impurity region has a concentration
gradient in which an impurity concentration increases toward the
end portion of the tapered portion. Here, the region having the
same concentration range as the third impurity region is called an
.sup.- region. Furthermore, the regions covered by the masks 136
and 137 are not added with the impurity element in the second
doping process, and become first impurity regions 144 and 145.
[0153] Next, after the masks 135 to 137 made of resist are removed,
masks 146 to 148 made of resist are newly formed, and a third
doping process is conducted as shown in FIG. 7B.
[0154] In the driver circuit, by the third doping process as
described above, fourth impurity regions 149, 150 and fifth
impurity regions 151, 152 are formed in which an impurity element
imparting p-type conductivity is added to the semiconductor layer
forming the p-channel TFT and to the semiconductor layer forming
the storage capacitor.
[0155] Further, the impurity element imparting p-type conductivity
is added to the fourth impurity regions 149 and 150 in a
concentration range of 1.times.10.sup.20 to
1.times.10.sup.21/cm.sup.3. Note that, in the fourth impurity
regions 149, 150, phosphorous (P) has been added in the preceding
step (n.sup.- region), but the impurity element imparting p-type
conductivity is added at a concentration that is 1.5 to 3 times as
high as that of phosphorous. Thus, the fourth impurity regions 149,
150 have a p-type conductivity. Here, the region having the same
concentration range as the fourth impurity region is also called a
p.sup.+ region.
[0156] Further, fifth impurity regions 151 and 152 are formed in
regions overlapping the tapered portion of the second conductive
layer 125a, and are added with the impurity element imparting
p-type conductivity in a concentration range of 1.times.10.sup.18
to 1.times.10.sup.20/cm.sup.3. Here, the region having the same
concentration range as the fifth impurity region is also called a
p.sup.- region.
[0157] Through the above-described steps, the impurity regions
having n-type or p-type conductivity are formed in the respective
semiconductor layers. The conductive layers 124 to 127 become gate
electrodes of a TFT. Further, the conductive layer 128 becomes one
of electrodes, which forms the storage capacitor in the pixel
portion. Moreover, the conductive layer 129 forms a source wiring
in the pixel portion.
[0158] Next, an insulating film (not shown) that covers
substantially the entire surface is formed. In this embodiment, a
50 nm thick silicon oxide film is formed by plasma CVD. Of course,
the insulating film is not limited to a silicon oxide film, and
other insulating films containing silicon may be used in a single
layer or a lamination structure.
[0159] Then, a step of activating the impurity element added to the
respective semiconductor layers is conducted. In this activation
step, a rapid thermal annealing (RTA) method using a lamp light
source, a method of irradiating light emitted from a YAG laser or
excimer laser from the back surface, heat treatment using a
furnace, or a combination thereof is employed.
[0160] Further, although an example in which the insulating film is
formed before the activation is shown in this embodiment, a step of
forming the insulating film may be conducted after the activation
is conducted.
[0161] Next, a first interlayer insulating film 153 is formed of a
silicon nitride film, and heat treatment (300 to 550.degree. C. for
1 to 12 hours) is performed, thereby conducting a step of
hydrogenating the semiconductor layers (FIG. 7C). This step is a
step of terminating dangling bonds of the semiconductor layers by
hydrogen contained in the first interlayer insulating film 153. The
semiconductor layers can be hydrogenated irrespective of the
existence of an insulating film (not shown) formed of a silicon
oxide film. Incidentally, in this embodiment, a material containing
aluminum as its main constituent is used for the second conductive
layer, and thus, it is important to apply the heating process
condition that the second conductive layer can withstand in the
step of hydrogenation. As another means for hydrogenation, plasma
hydrogenation (using hydrogen excited by plasma) may be
conducted.
[0162] Next, a second interlayer insulating film 154 is formed from
an organic insulating material on the first interlayer insulating
film 153. In this embodiment, an acrylic resin film with a
thickness of 1.6 .mu.m is formed. Then, a contact hole that reaches
the source wiring 129, contact holes that respectively reach the
conductive layers 127 and 128, and contact holes that reach the
respective impurity regions are formed. In this embodiment, a
plurality of etching processes are sequentially performed. In this
embodiment, the second interlayer insulting film is etched with the
first interlayer insulating film as the etching stopper, the first
interlayer insulating film is etched with the insulating film (not
shown) as the etching stopper, and then, the insulating film (not
shown) is etched.
[0163] Thereafter, wirings and pixel electrode are formed by using
Al, Ti, Mo, W and the like. As the material of the electrodes and
pixel electrode, it is desirable to use a material excellent in
reflecting property, such as a film containing Al or Ag as its main
constituent or a lamination film of the above film. Thus, source
electrodes or drain electrodes 155 to 160, a gate wiring 162, a
connection wiring 161, and a pixel electrode 163 are formed.
[0164] As described above, a driver circuit 206 having an n-channel
TFT 201. a p-channel TFT 202, and an n-channel TFT 203 and a pixel
portion 207 having a pixel TFT 204 comprised of an n-channel TFT
and a storage capacitor 205 can be formed on the same substrate
(FIG. 8). In this specification, the above substrate is called an
active matrix substrate for the sake of convenience.
[0165] In the pixel portion 207, the pixel TFT 204 (n-channel TFT)
has a channel forming region 167, the first impurity region
(n.sup.31 region) 145 formed outside the conductive layer 127
forming the gate electrode, and the second impurity region (n.sup.+
region) 140 functioning as a source region. Further, in the
semiconductor layer functioning as one of the electrodes of the
storage capacitor 205, the fourth impurity region 150 and the fifth
impurity region 152 are formed. The storage capacitor 205 is
constituted of the second electrode 128 and the semiconductor
layers 150, 152, and 168 with the insulating film (the same film as
the gate insulating film) 116 as dielectric.
[0166] Further, in the driver circuit 206, the n-channel TFT 201
(first n-channel TFT) has a channel forming region 164, the third
impurity region (n.sup.- region) 142 that overlaps a part of the
conductive layer 124 forming the gate electrode through the
insulating film, and the second impurity region (n.sup.+ region)
138 functioning as a source region or a drain region.
[0167] Further, in the driver circuit 206, the p-channel TFT 202
has a channel forming region 165, the fifth impurity region
(p.sup.- region) 151 that overlaps a part of the conductive layer
125 forming the gate electrode through the insulating film, and the
fourth impurity region (p.sup.+ region) 149 functioning as a source
region or a drain region.
[0168] Furthermore, in the driver circuit 206, the n-channel TFT
203 (second n-channel TFT) has a channel forming region 166, the
first impurity region (n.sup.- region) 144 outside the conductive
layer 126 forming the gate electrode, and the second impurity
region (n.sup.+ region) 139 functioning as a source region or a
drain region.
[0169] The above TFTs 201 to 203 are appropriately combined to form
a shift resister circuit, a buffer circuit, a level shifter
circuit, a latch circuit and the like, thereby forming the driver
circuit 206. For example, in the case where a CMOS circuit is
formed, the n-channel TFT 201 and the p-channel TFT 202 may be
complementarily connected to each other.
[0170] In particular, the structure of the n-channel TFT 203 is
appropriate for the buffer circuit having a high driving voltage
with the purpose of preventing deterioration due to a hot carrier
effect.
[0171] Moreover, the structure of the n-channel TFT 201, which is a
GOLD structure, is appropriate for the circuit in which the
reliability takes top priority.
[0172] A semiconductor film that is high in levelness and in
orientation rate of crystal obtained by the present embodiment is
formed for use in an active layer of TFT, whereby withstand
pressure and reliability of TFT are increased.
[0173] Further, an example of manufacturing the active matrix
substrate for forming a reflection type display device is shown in
this embodiment. However, if the pixel electrode is formed of a
transparent conductive film, a transmission type display device can
be formed although the number of photomasks is increased by
one.
[0174] Furthermore, this embodiment can be freely combined with any
of Embodiment Modes and Embodiment 1.
[0175] [Embodiment 3]
[0176] This embodiment describes a process of manufacturing an
active matrix liquid crystal display device from the active matrix
substrate fabricated in Embodiment 2. The description is given with
reference to FIG. 9.
[0177] After the active matrix substrate as illustrated in FIG. 8
is obtained in accordance with Embodiment 2, an oriented film is
formed on the active matrix substrate of FIG. 8 and subjected to
rubbing treatment. In this embodiment, before the oriented film is
formed, an organic resin film such as an acrylic resin film is
patterned to form columnar spacers in desired positions in order to
keep the substrates apart. The columnar spacers may be replaced by
spherical spacers sprayed onto the entire surface of the
substrate.
[0178] An opposite substrate is prepared next. The opposite
substrate has a color filter in which colored layers and
light-shielding layers are arranged with respect to the pixels. A
light-shielding layer is also placed in the driving circuit
portion. A planarization film is formed to cover the color filter
and the light-shielding layer. On the planarization film, an
opposite electrode is formed from a transparent conductive film in
the pixel portion. An oriented film is formed over the entire
surface of the opposite substrate and is subjected to rubbing
treatment.
[0179] Then the opposite substrate is bonded to the active matrix
substrate on which the pixel portion and the driving circuits are
formed, using a sealing member. The sealing member has filler mixed
therein and the filler, together with the columnar spacers, keeps
the distance between the two substrates while they are bonded.
Thereafter a liquid crystal material is injected between the
substrates and an encapsulant (not shown) is used to completely
seal the substrates. A known liquid crystal material can be used.
The active matrix liquid crystal display device is thus completed.
If necessary, the active matrix substrate or the opposite substrate
is cut into pieces of desired shapes. The display device may be
appropriately provided with a polarizing plate using a known
technique. Then FPCs are attached to the substrate using a known
technique.
[0180] The structure of the thus obtained liquid crystal module is
described with reference to the top view in FIG. 9.
[0181] A pixel portion 304 is placed in the center of an active
matrix substrate 301. A source signal line driving circuit 302 for
driving source signal lines is positioned above the pixel portion
304. Gate signal line driving circuits 303 for driving gate signal
lines are placed to the left and right of the pixel portion 304.
Although the gate signal line driving circuits 303 are symmetrical
with respect to the pixel portion in this embodiment, the liquid
crystal module may have only one gate signal line driving circuit
on one side of the pixel portion. Of the above two options, a
designer can choose the arrangement that suits better considering
the substrate size or the like of the liquid crystal module.
However, the symmetrical arrangement of the gate signal line
driving circuits shown in FIG. 9 is preferred in terms of circuit
operation reliability, driving efficiency, and the like.
[0182] Signals are inputted to the driving circuits from flexible
printed circuits (FPC) 305. The FPCs 305 are press-fit through an
anisotropic conductive film or the like after opening contact holes
in the interlayer insulating film and resin film and forming a
connection electrode 309 so as to reach the wiring lines arranged
in given places of the substrate 301. The connection electrode is
formed from ITO in this embodiment.
[0183] A sealing agent 307 is applied to the substrate along its
perimeter surrounding the driving circuits and the pixel portion.
An opposite substrate 306 is bonded to the substrate 301 by the
sealing agent 307 while a spacer formed in advance on the active
matrix substrate keeps the distance between the two substrates
constant (the distance between the substrate 301 and the opposed
substrate 306). A liquid crystal element is injected through an
area of the substrate that is not coated with the sealing agent
307. The substrates are then sealed by an encapsulant 308. The
liquid crystal module is completed through the above steps.
[0184] Although all of the driving circuits are formed on the
substrate in the example shown here, several ICs may be used for
some of the driving circuits.
[0185] Further, this embodiment can be freely combined with any
structures in Embodiment Modes, Embodiment 1 and Embodiment 2.
[0186] [Embodiment 4]
[0187] Embodiment 2 shows an example of reflective display device
in which a pixel electrode is formed from a reflective metal
material. Shown in this embodiment is an example of transmissive
display device in which a pixel electrode is formed from a
light-transmitting conductive film.
[0188] The manufacture process up through the step of forming an
interlayer insulating film is identical with the process of
Embodiment 2, and the description thereof is omitted here. After
the interlayer insulating film is formed in accordance with
Embodiment 2, a pixel electrode 601 is formed from a
light-transmitting conductive film. Examples of the
light-transmitting conductive film include an ITO (indium tin oxide
alloy) film, an indium oxide-zinc oxide alloy
(In.sub.2O.sub.3--ZnO) film, a zinc oxide (ZnO) film, and the
like.
[0189] Thereafter, contact holes are formed in an interlayer
insulating film 600. A connection electrode 602 overlapping the
pixel electrode is formed next. The connection electrode 602 is
connected to a drain region through the contact hole. At the same
time the connection electrode is formed, source electrodes or drain
electrodes of other TFTs are formed.
[0190] Although all of the driving circuits are formed on the
substrate in the example shown here, several ICs may be used for
some of the driving circuits.
[0191] An active matrix substrate is completed as above. A liquid
crystal module is manufactured from this active matrix substrate in
accordance With Embodiment 3. The liquid crystal module is provided
with a backlight 604 and a light guiding plate 605, and is covered
with a cover 606 to complete the active matrix liquid crystal
display device of which a partial sectional view is shown in FIG.
10. The cover is bonded to the liquid crystal module using an
adhesive or an organic resin. When bonding the substrate to the
opposite substrate, the substrates may be framed so that the space
between the frame and the substrates is filled with an organic
resin for bonding. Since the display device is of transmissive
type, the active matrix substrate and the opposite substrate each
needs a polarizing plate 603 to be bonded.
[0192] This embodiment can be freely combined with any structures
in Embodiment Modes, and Embodiments 1 to 3.
[0193] [Embodiment 5]
[0194] In this embodiment, an example of manufacturing a light
emitting display device provided with an EL (electro luminescence)
element is shown in FIGS. 11A and 11B.
[0195] FIG. 11A is a top view of an EL module, and FIG. 11B is a
sectional view taken along a line A-A' of FIG. 11A. On a substrate
900 having an insulating surface (for example, a glass substrate, a
crystallized glass substrate, a plastic substrate or the like), a
pixel portion 902, a source side driver circuit 901, and a gate
side driver circuit 903 are formed. The pixel portion and the
driver circuits can be obtained in accordance with the
above-described embodiments. Further, reference numeral 918
indicates a sealing member, and reference numeral 919 indicates a
DLC film. The pixel portion and the driver circuit portions are
covered by the sealing member 918, and the sealing member is
covered by a protective film 919. Further, the protective film 919
is sealed by a cover member 920 using an adhesive. It is desirable
that the cover member 920 is made of the same material as the
substrate 900, for example, is a glass substrate in order to
withstand deformation due to heat or external force. The cover
member 920 is processed to have the recess shape (with a depth of 3
to 10 .mu.m) shown in FIG. 11B by sandblasting or the like. It is
desirable that the cover member 920 is further processed to form a
recess portion (with a depth of 50 to 200 .mu.m) into which a
drying agent 921 can be arranged. Further, in the case where
multiple EL modules are manufactured, after the substrate and the
cover member are attached with each other, segmentation may be
conducted using a CO.sub.2 laser or the like such that end surfaces
match with each other.
[0196] Note that reference numeral 908 indicates a wiring for
transmitting signals input to the source side driver circuit 901
and the gate side driver circuit 903, and receives a video signal
and a clock signal from an FPC (flexible printed circuit) 909 that
is an external input terminal. Note that although only the FPC is
shown in the figure, a printed wiring board (PWB) may be attached
to the FPC. The light emitting device in this specification
includes not only the main body of the light emitting device but
also the light emitting device attached with the FPC or PWB.
[0197] Next, the sectional structure is described with reference to
FIG. 11B. An insulating film 910 is provided on the substrate 900,
the pixel portion 902 and the gate side driver circuit 903 are
formed above the insulating film 910, and the pixel portion 902 is
constituted of a plurality of pixels including a current control
TFT 911 and a pixel electrode 912 electrically connected to a drain
of the current control TFT 911. Further, the ate side driver
circuit 903 is formed by using a CMOS circuit in which an n-channel
TFT 913 and a p-channel TFT 914 are combined.
[0198] The above TFTs (including 911, 913, and 914) may be
manufactured in accordance With the n-channel TFT 201 and the
p-channel TFT 202 in Embodiment 2.
[0199] Note that, as to a material of the insulating film provided
between the TFT and the EL element, it is appropriate to use a
material that not only blocks diffusion of impurity ions such as
alkali metal ions or alkaline-earth metal ions but also positively
adsorbs the impurity ions such as alkali metal ions or
alkaline-earth metal ions, and further to use a material that can
withstand a subsequent process temperature. As the material that
satisfies the above conditions, a silicon nitride film containing a
large amount of fluorine is given as an example. The concentration
of fluorine contained in the silicon nitride film is
1.times.10.sup.19/cm.sup.3 or more, and preferably, the composition
ratio of fluorine in the silicon nitride film is 1 to 5%. Fluorine
in the silicon nitride film bonds to alkali metal ions or
alkaline-earth metal ions, and is adsorbed into the film. Further,
as another example, there is given an organic resin film containing
particulates comprised of a stibium (Sb) compound, a stannum (Sn)
compound or an indium (In) compound, which adsorbs alkali metal
ions, alkallin-earth metal ions or the like, for example, an
organic resin film containing particulates of stibium pentoxide
(Sb.sub.2O.sub.5.nH.sub.2O). Note that this organic resin film
contains particulates with an average particle size of 10 to 20 nm,
and has high light transmission properties. The stibium compound
typified by the stibium pentoxide particulates is likely to adsorb
impurity ions such as alkali metal ions or alkaline-earth metal
ions.
[0200] The pixel electrode 912 functions as an anode of a light
emitting element (EL element). Further, banks 915 are formed at
both ends of the pixel electrode 912, and an EL layer 916 and a
cathode 917 of the light emitting element are formed on the pixel
electrode 912.
[0201] As to the EL layer 916, a light emitting layer, a charge
transportation layer and a charge injection layer may be freely
combined to form an EL layer (layer for light emission and movement
of carrier for light emission). For example, a low molecular weight
organic EL material or a high molecular weight organic EL material
man be used. Further, as the EL layer, a thin film formed from a
light emitting material that emits light by singlet excitation
(fluorescence) (singlet compound) or a thin film formed from a
light emitting material that emits light by triplet excitation
(phosphorescence) (triplet compound) can be used. Further, an
inorganic material such as silicon carbide can be used for the
charge transportation layer or the charge injection layer. Known
materials can be used for the organic EL materials or inorganic
materials.
[0202] A cathode 917 also functions as a wiring common to all the
pixels, and is electrically connected to the FPC 909 through the
connection wiring 908. Further, all the elements contained in the
pixel portion 902 and the gate side driver circuit 903 are covered
by the cathode 917, the sealing member 918 and the protective film
919.
[0203] Note that a material that is transparent or semitransparent
to visible light is preferably used for the sealing member 918.
Further, the sealing member 918 is desirably formed from a material
that does not permeate moisture or oxygen as much as possible.
[0204] Further, after the light emitting element is completely
covered by the sealing member 918, it is preferable that the
protective film 919 comprised of a DLC film or the like is provided
at least on the surface (exposed surface) of the sealing member 918
as shown in FIGS. 11A and 11B. Further, the protective film may be
provided on the entire surface including the back surface of the
substrate. Here, it is necessary that attention is paid to in order
that the protective film is not deposited to the portion where the
external input terminal (FPC) is provided. A mask may be used in
order not to form the protective film. Alternatively, the external
input terminal portion may be covered by a tape formed of Teflon
(registered trademark) or the like, which is used as a masking tape
in a CVD apparatus in order not to form the protective film.
[0205] The light emitting element is sealed by the sealing member
918 and the protective film with the above-described structure,
whereby the light emitting element can be completely shut from the
outside. Thus, it is possible to prevent a substance that promotes
deterioration due to oxidization of the EL layer, such as moisture
or oxygen from permeating from the outside. Therefore, the light
emitting device with high reliability can be obtained.
[0206] Further, the structure may be adopted in which a pixel
electrode is a cathode, and an EL layer and an anode are laminated
to thereby provide light emission in an opposite direction to that
in FIGS. 11A and 11B.
[0207] Note that this embodiment can be freely combined with any of
Embodiment Modes and Embodiment 1.
[0208] [Embodiment 6]
[0209] The driver circuit and the pixel portion formed by
implementing the present invention can be used in various modules
(active matrix type liquid crystal module, active matrix type EL
module and active matrix type EC module). That is, the present
invention can be implemented in all of electronic equipments
integrated with the modules at display portions thereof.
[0210] As such electronic equipment there are pointed out a video
camera, a digital camera, a head mount display (goggle type
display), a car navigation system, a projector, a car stereo, a
personal computer, a portable information terminal (mobile
computer, cellular phone or electronic book) and the like. Examples
of these are shown in FIGS. 12 to 14.
[0211] FIG. 12A shows a personal computer including a main body
2001, an image input portion 2002, a display portion 2003 and a
keyboard 2004. The present invention can be applied to the display
portion 2003.
[0212] FIG. 12B shows a video camera including a main body 2101, a
display portion 2102, a voice input portion 2103, operation
switches 2104, a battery 2105 and an image receiving portion 2106.
The present invention can be applied to the display portion
2102.
[0213] FIG. 12C shows a mobile computer including a main body 2201,
a camera portion 2202, an image receiving portion 2203, an
operation switch 2204 and a display portion 2205. The present
invention can be applied to the display portion 2205.
[0214] FIG. 12D shows a goggle type display including a main body
2301 a display portion 2302 and an ann portion 2303. The present
invention can be applied to the display portion 2302.
[0215] FIG. 12E shows a player using a record medium recorded with
programs (hereinafter, referred to as record medium) including a
main body 2401, a display portion 2402, a speaker portion 2403, a
record medium 2404 and an operation switch 2405. The player uses
DVD (Digital Versatile Disc) or CD as the record medium and can
enjoy music, enjoy movie and carry out game or Internet. The
present invention can be applied to the display portion 2402.
[0216] FIG. 12F shows a digital camera including a main body 2501,
a display portion 2502, an eye contact portion 2503, operation
switches 2504 and an image receiving portion (not illustrated). The
present invention can be applied to the display portion 2502.
[0217] FIG. 13A shows a front type projector including a projection
equipment 2601 and a screen 2602. The present invention can be
applied to the liquid crystal module 2808 forming a part of the
projection equipment 2601.
[0218] FIG. 13B shows a rear type projector including a main body
2701 a projection equipment 2702, a mirror 2703 and a screen 2704.
The present invention can be applied to the liquid crystal module
2808 forming a part of the projection equipment 2702.
[0219] Further, FIG. 13C is a view showing an example of a
structure of the projection equipment 2601 and 2702 in FIG. 13A and
FIG. 13B. The projection equipment 2601 or 2702 is constituted by a
light source optical system 2801, mirrors 2802, and 2804 through
2806, a dichroic mirror 2803, a prism 2807, a liquid crystal
display equipment 2808, a phase difference plate 2809 and a
projection optical system 2810. The projection optical system 2810
is constituted by an optical system including a projection lens.
Although this embodiment shows an example of three plates type,
this embodiment is not particularly limited thereto but may be of,
for example, a single plate type. Further, person of executing this
embodiment may pertinently provide an optical system such as an
optical lens, a film having a polarization function, a film for
adjusting a phase difference or an IR film in an optical path shown
by arrow marks in FIG. 13C.
[0220] Further, FIG. 13D is a view showing an example of a
structure of the light source optical system 2801 in FIG. 13C.
According to this embodiment, the light source optical system 2801
is constituted by a reflector 2811, a light source 2812, lens
arrays 2813 and 2814, a polarization conversion element 2815 and a
focusing lens 2816. Further, the light source optical system shown
in FIG. 13D is only an example and this example is not particularly
limited thereto. For example, a person of executing this embodiment
may pertinently provide an optical system such as an optical lens,
a film having a polarization function, a film for adjusting a phase
difference or an IR film in the light source optical system.
[0221] However, according to the projectors shown in FIG. 13, there
is shown a case of using a transmission type electro-optical device
and an example of applying a reflection type electro-optical device
and EL module are not illustrated.
[0222] FIG. 14A shows a cellular phone including a main body 2901,
a sound output portion 2902, a sound input portion 2903, a display
portion 2904, an operation switch 2905, an antenna 2906 and an
image input portion (CCD, image sensor or the like) 2907. The
present invention can be applied to display portion 2904.
[0223] FIG. 14B shows a portable book (electronic book) including a
main body 3001, display portions 3002 and 3003, a record medium
3004, an operation switch 3005 and an antenna 3006. The present
invention can be applied to display portions 3002 and 3003.
[0224] FIG. 14C shows a display including a main body 3101, a
support base 3102 and a display portion 3103. The present invention
can be applied to display portion 3103.
[0225] In addition, the display shown in FIG. 14C is small and
medium type or large type, for example, screen of the display sized
5 to 20 inches. Moreover, it is preferable to mass-produce by
executing a multiple pattern using a substrate sized 1.times.1 m to
form such sized display section.
[0226] As has been described, the range of applying the present
invention is extremely wide and is applicable to electronic
equipment of all the fields. The electronic equipment of the
present invention can be implemented by freely combined with the
structures in Embodiments 1 to 5.
[0227] According to the present invention, a semiconductor film
that is high in levelness and in orientation rate of crystal is
formed for use in an active layer of TFT, whereby a semiconductor
device which has a low OFF current value with a reduced variation
can be obtained.
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