U.S. patent application number 09/738124 was filed with the patent office on 2002-06-20 for method and apparatus for generating digitally modulated signals.
This patent application is currently assigned to Motorola, Inc.. Invention is credited to Ma, Stephen Chihhung, Okrah, Peter O., Ronning, Matthew A., Turcotte, Randy L., Warble, Keith V..
Application Number | 20020075092 09/738124 |
Document ID | / |
Family ID | 24966672 |
Filed Date | 2002-06-20 |
United States Patent
Application |
20020075092 |
Kind Code |
A1 |
Turcotte, Randy L. ; et
al. |
June 20, 2002 |
METHOD AND APPARATUS FOR GENERATING DIGITALLY MODULATED SIGNALS
Abstract
A method and apparatus for generating digitally modulated
signals in which a serial data stream of digital signals to be
modulated (70) is provided, the serial data stream being converted
into real and imaginary components (74) which are then converted
into a complex polar signal (80) representing the serial data
stream. A carrier of appropriate frequency is generated by an
infinite impulse response filter (84,86) and the polar signal is
mixed with the output of the infinite impulse response filter to
provide a representation of the complex polar signal modulated at
the frequency generated by the infinite impulse response filter
(88). Subsequently the imaginary component of the resulting
representation is stripped from the signal (90) and the real
component of the resulting representation is applied to a digital
to analog converter (92) to produce an analog version of the serial
data stream.
Inventors: |
Turcotte, Randy L.; (Tempe,
AZ) ; Ma, Stephen Chihhung; (Mesa, AZ) ;
Ronning, Matthew A.; (Scottsdale, AZ) ; Warble, Keith
V.; (Chandler, AZ) ; Okrah, Peter O.;
(Chandler, AZ) |
Correspondence
Address: |
MOTOROLA, INC.
CORPORATE LAW DEPARTMENT - #56-238
3102 NORTH 56TH STREET
PHOENIX
AZ
85018
US
|
Assignee: |
Motorola, Inc.
|
Family ID: |
24966672 |
Appl. No.: |
09/738124 |
Filed: |
December 15, 2000 |
Current U.S.
Class: |
332/100 ;
332/103; 332/106; 375/272; 375/279; 375/302 |
Current CPC
Class: |
H04L 27/365
20130101 |
Class at
Publication: |
332/100 ;
332/103; 332/106; 375/272; 375/279; 375/302 |
International
Class: |
H04L 027/12; H04L
027/20 |
Claims
What is claimed is:
1. A method for generating digitally modulated signals comprising:
providing a serial data stream of digital signals to be modulated;
converting the serial data stream into real and imaginary
components; converting the real and imaginary components into a
complex polar signal representing the serial data stream; providing
an infinite impulse response filter for generating a carrier at a
desired frequency; mixing the polar signal with the output of the
infinite impulse response filter to provide a representation of the
complex polar signal modulated at the frequency generated by the
infinite impulse response filter; and extracting the real component
of the resulting representation to provide a digitally modulated
representation of the serial data stream.
2. A method as set forth in claim 1 wherein the conversion of the
serial data stream into a complex polar signal is performed at a
clock rate lower than the clock rate of the infinite impulse
response filter.
3. A method as set forth in claim 2 further comprising
interpolating the complex polar signal to a rate corresponding to
the clock rate of the infinite impulse response filter.
4. A method as set forth in claim 1 comprising applying the
digitally modulated representation of the serial data stream to a
digital to analog converter to produce an analog version of the
serial data stream.
5. A method as set forth in claim 3 comprising applying the
digitally modulated representation of the serial data stream to a
digital to analog converter to produce an analog version of the
serial data stream.
6. A digital modulator comprising: a processor for receiving a
serial data stream of digital signals to be modulated and for
separating the serial data stream to into real and imaginary
components; a rectangular to polar converter for receiving the real
and imaginary components to produce a complex polar signal
representing the serial data stream; a complex multiplier; an
infinite impulse response filter for producing a carrier signal at
a desired frequency; applying the complex polar signal and the
carrier signal of the infinite impulse response filter to the
complex multiplier to produce a modulated complex signal
representative of the serial data stream of digital signals at a
frequency of the carrier signal generated by the infinite impulse
response filter; and means for extracting the real component of the
modulated complex signal to produce a resultant digital signal
representative of the serial data stream of digital signals.
7. A digital modulator as set forth in claim 6 wherein the serial
data stream is converted into the complex polar signal at a clock
rate lower than the clock rate of the infinite impulse response
filter.
8. A digital modulator as set forth in claim 7 further comprising
an interpolator for interpolating the complex polar signal to a
rate corresponding to the clock rate of the infinite impulse
response filter.
9. A digital modulator as set forth in claim 6 further comprising a
digital to analog converter for accepting the resultant digital
signal and for producing an analog output signal representative of
the serial data stream of digital signals.
10. A digital modulator as set forth in claim 8 further comprising
a digital to analog converter for accepting the modulated signal
and for producing an analog output signal representative of the
serial data stream of digital signals.
11. A digital modulator comprising: a rectangular to polar
converter for receiving real and imaginary components of a digital
data stream to produce a complex polar signal representing the
digital data stream; a complex multiplier; an infinite impulse
response filter having an input representative of a frequency of a
desired carrier signal, and comprising a multiplier, and a delay
register in feedback to the multiplier to produce at an output a
carrier frequency signal of a desired frequency; applying the
complex polar signal and the output of the infinite impulse
response filter to the complex multiplier to produce a modulated
complex signal representative of the digital data stream at the
desired frequency of the carrier frequency signal generated by the
infinite impulse response filter, the modulated complex signal
having real and imaginary parts; means for extracting the real part
of the modulated complex signal to produce a resultant digital
signal representative of the digital data stream; and, an analog to
digital converter having an input for receiving the resultant
digital signal, and an output for producing an analog signal
representing the digital data stream modulated at the desired
carrier frequency.
12. A digital modulator as set forth in claim 11 further comprising
a demultiplexer for receiving a serial data stream of digital
signals to be modulated and for separating the serial data stream
to into real and imaginary components of a digital data stream.
Description
FIELD OF THE INVENTION
[0001] This invention relates to digital modulators, and, more
particularly to digital modulators in which the modulation of a
digital signal onto a carrier occurs entirely in the digital
domain.
BACKGROUND OF THE INVENTION
[0002] Digital modulators are employed when it is desired to
transform a digital data stream into an analog signal modulated
onto a carrier or intermediate frequency signal. Digital modulators
are used, for example, in cable modems, television set top boxes,
Microwave Multipoint Distribution Systems, Local Multipoint
Distribution Systems, Orthogonal Frequency Division Multiplexing,
and Vector Orthogonal Frequency Division Multiplexing.
[0003] In a classical implementation of a digital modulator, a pair
of digital data streams, perhaps derived from a single data stream,
are converted into analog signals and mixed as analog signals with
the outputs of a quadrature oscillator to produce in-phase and
quadrature-phase signals imposed on a carrier at the frequency
determined by the oscillator.
[0004] Other more recent digital modulators, known as direct
digital synthesis (DDS) modulators, have provided similar digital
data streams (which may be designated as the real and imaginary
components of an original data stream) which are modulated onto a
carrier signal entirely within the digital domain. This allows
processing of the signal substantially entirely within one
integrated circuit. Once the digitally modulated carrier is
produced, it is converted to an analog modulated carrier by a
digital to analog converter.
[0005] This latter technique has several advantages, including the
introduction of less distortion due to filter dissimilarities in
the in-phase and quadrature-phase analog paths, better gain
balance, and better phase balance.
[0006] The oscillator of a DDS, however may introduce spurious
signals and noise into the system, thereby reducing the
effectiveness of the circuit. It would be desirable to retain the
advantages of direct digital synthesis while at the same time
reducing the spurious content of the oscillator.
SUMMARY OF THE INVENTION
[0007] The above and other advantages of the present invention are
attained by providing a method and apparatus for generating
digitally modulated signals in which a serial data stream of
digital signals to be modulated is provided, the serial data stream
being converted into real and imaginary components which are then
converted into a complex polar signal representing the serial data
stream. A carrier of appropriate frequency is generated by an
infinite impulse response filter and the polar signal is mixed with
the output of the infinite impulse response filter to provide a
representation of the complex polar signal modulated at the
frequency generated by the infinite impulse response filter.
Subsequently the imaginary component of the resulting
representation is stripped from the signal and the real component
of the resulting representation is applied to a digital to analog
converter to produce an analog version of the serial data
stream.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] FIG. 1 is a representation of a classical implementation of
a digital modulator.
[0009] FIG. 2 is a representation of a direct digital synthesis
modulator.
[0010] FIG. 3 is a block diagram of a digital modulator according
to the present invention.
[0011] FIG. 4 is a chart showing the input signal to the
interpolator of the invention.
[0012] FIG. 5 is a chart showing the output of the interpolator of
the invention.
DESCRIPTION OF A PREFERRED EMBODIMENT
[0013] The classical implementation of a digital modulator is shown
in FIG. 1A discrete-time data signal is processed using digital
signal processing techniques. A single digital data stream may be
demultiplexed into two data streams 10 and 12. The data streams 10
and 12 are usually processed, for example by pulse shaping filters
14 and 16. The filtered signals are applied to interpolation
filters 18 and 20 that serve the purpose of inserting, through
interpolation, additional data points in each of the data streams.
The outputs of the interpolation filters are applied to
digital-to-analog converters 22 and 24, the outputs of which are
smoothed by low pass filters 26 and 28.
[0014] An oscillator 30 produces a carrier at a desired frequency
that is applied to a quadrature phase shifter to produce the sin
and cos components of the carrier. The sin and cos signals are
mixed with the analog data streams in mixers 34 and 36 to produce
in-phase and quadrature-phase signals which are summed by summer 38
to produce a carrier which is modulated by analog signals which are
representations of the original data stream.
[0015] In the representation of FIG. 1, elements 10-20 are digital
elements and elements 22-38 are analog elements.
[0016] This modulation scheme has the disadvantage of being
primarily analog and thus subject to distortion as a result of the
difficulty of precisely matching analog filters and failing to take
advantage of the simpler semiconductor processing techniques
available in largely digital systems.
[0017] FIG. 2 is a representation of a more recent digital
modulator design, known as a direct digital synthesis (DDS)
modulator. The modulator has provided two similar digital data
streams 40 and 42 (which may be designated as the real and
imaginary components of a single original data stream derived as in
the modulator of FIG. 1), but which are modulated onto a carrier
signal entirely within the digital domain. This allows processing
of the signal substantially entirely within one integrated
circuit.
[0018] The data streams 40 and 42 are applied to pulse shaping
filters 44 and 46, the outputs of which are applied to
interpolations filters 48 and 50.
[0019] The outputs of the interpolation filters 48 and 50 are
applied to Rectangular to Polar conversion element 52 in order to
create the amplitude and phase components of the baseband modulated
signal. The phase modulation component is applied to the
Numerically Controlled Oscillator (NCO) 54, thereby creating the
phase modulation of the NCO created IF. The amplitude modulation
component is applied directly to the Digital to Analog Converter 56
in order to create the amplitude modulation of the IF. The output
of the DAC 56 is smoothed by the Low Pass Filter 58.
[0020] In this representation all the elements of the modulator are
digital except for the Digital to Analog Converter 56 and the Low
Pass Filter 58.
[0021] This latter technique has several advantages, including the
introduction of less distortion due to filter dissimilarities in
the in-phase and quadrature-phase analog paths, better gain
balance, and better phase balance.
[0022] The oscillator of a DDS, however may introduce spurious
signals and noise into the system, thereby reducing the
effectiveness of the circuit. It would be desirable to retain the
advantages of direct digital synthesis while at the same time
reducing the spurious content of the oscillator.
[0023] FIG. 3 is a block diagram of a digital modulator according
to the present invention. A digital data stream is generated by a
source 70 which may be the output of a vocoder, for example, or
simply a digital data stream from the output of a computer. The
digital data stream optionally may be subjected to error correction
such as forward error correction apparatus 72.
[0024] The encoded data stream is then demultiplexed by
demultiplexer 74 which creates two digital data streams designated
as the real and imaginary portions of the digital data stream. The
demultiplexer 74 may operate simply by taking every second digital
signal to be designated as the real component and the others as the
imaginary portion of the data stream to create a series of complex
digital numbers.
[0025] The real and imaginary portions of the data stream may be
optionally applied to pulse shapers 76 and 78 respectively. The
pulse shapers, if employed, shape the digital pulses to change
their spectrum. For example an unshaped signal may constitute a
pulse with fairly sharp rising and falling edges. The output pulses
from the pulse shapers would typically have much more rounded
edges. The shaped pulses therefore would require less spectrum than
the sharper pulses.
[0026] The real and imaginary outputs of the pulse shapers 76 and
78, respectively, are converted into a series of complex numbers
expressed in polar coordinates by rectangular to polar converter
80. If the pulse stream of the real portion of the rectangular
waveform is a(t) and the imaginary portion is b(t), then the
complex number at the input of converter 80 is a(t)+jb(t). The
converter 80 merely solves the equations:
A(t)=sqrt{a.sup.2(t)+b.sup.2(t)} and
.theta.(t)=tan.sup.-1{b(t)/a(t).
[0027] In a normal implementation, the clock rate necessary for the
generation of the IF and modulated signal must be considerably
higher than the clock rate necessary to process the data. Because
of this the pulse shaping filters 76, 78, the interpolation filter
82, and the rectangular to polar converter 80 will operate at a
slower sample clock than the clock used to process the data to be
modulated. The respective clocks are F.sub.clkd<F.sub.cdk, where
F.sub.clkd is the clock used in processing the data and F.sub.dkm
is the clock used to actually modulate the polar data onto the
digital IF.
[0028] The outputs of the rectangular to polar converter 80 are
thus applied to an interpolator where the additional numerical
points are added to the points of the digital data streams to
provide a smoother representation of the data stream and to match
to higher clock rate of the digital IF. For example, FIG. 4 shows a
series of points on a graph representing the numbers generated at
the output of the rectangular to polar 80. FIG. 5 is a
representation of the same series of numbers after having been
interpolated by a factor of four to one (four to one is an
exemplary ratio only; the actual interpolation rate will be
determined by the ratio of F.sub.clkd to F.sub.clkm).
[0029] An infinite impulse response filter IIR 84 and 86 in FIG. 3
is used to produce a carrier signal at an appropriate IF frequency
f.sub.IF. At the clock rate 1/T.sub.M, a phasor,
exp{-j2.pi.f.sub.0T.sub.M} is applied to a multiplier 84. The
output of multiplier 84 is applied to complex multiplier 88 where
it is mixed with the output of the interpolation filter 82. The
output signal of multiplier 84 is also applied to a delay register
86, the output of which is fed back, delayed, to the multiplier 84
where the delayed value from delay register 86 is mixed with the
input carrier phasor, exp{-j2.pi.f.sub.0T.sub.M}. The infinite
impulse response filter operates in accordance with the following
equation:
Y(nT.sub.M)=.delta.(nT.sub.M)+exp{-j2.pi.T.sub.M}y[(n-1)T.sub.M]
[0030] The impulse .delta. initializes the IIR oscillator and the
oscillation is sustained by feedback. Thus a one is stored in the
delay register 86 for the first cycle. So .delta.=1 and
y[(n-1)T.sub.M]=0 resulting in a first output of 1. On the next
cycle, .delta. becomes 0 (.delta.(n)=0). For subsequent groups,
exp{-j2.pi.f.sub.0T.sub.M} controls the frequency,
f.sub.IF=f.sub.0.multidot.T.sub.M.
[0031] The modulation in the complex multiplier 88 takes place in
the digital domain. The output is a complex modulated signal:
Z(nT.sub.M)=M(nT.sub.M)e.sup.j.phi.(.sup.nTM)e.sup.-j2.pi.f.sub.IF.sup.T.s-
ub.M
[0032] Rewriting this equation in terms of real and imaginary
components:
Z(nT.sub.M)=M(nT.sub.M) cos
[n2.pi.f.sub.IFT.sub.M+.phi.(nT.sub.M)]-j sin
[n2.pi.f.sub.IFT.sub.M+.phi.(nT.sub.M)]
[0033] It can be seen that the digital version of the desired
signal after modulation is the real part of Z(nT.sub.m), or
Re{z(nT.sub.M)}=M(nT.sub.M)cos
[n2.pi.f.sub.IFT.sub.M+.phi.(nT.sub.M)]
[0034] This signal is produced by the apparatus 90, which simply
takes the real part of the complex signal and drives the digital to
analog converter DAC 92 whose output becomes the analog version of
the desired modulated signal. The output of DAC 92 is further
processed by a low pass filter to smooth the signal and eliminate
some of the clock noise.
[0035] Thus has been provided a digital modulator with
substantially wholly digital processing of a digital data stream
which uses an infinite impulse response filter to generate the
carrier frequency onto which the digital data stream is to be
modulated.
[0036] Although the preferred embodiment of the invention has been
illustrated, and that form described in detail, it will be readily
apparent to those skilled in the art that various modifications may
be made without departing form the spirit of the invention or from
the scope of the appended claims.
* * * * *