U.S. patent application number 09/733858 was filed with the patent office on 2002-06-13 for current isolating epitaxial buffer layers for high voltage photodiode array.
This patent application is currently assigned to The Regents of the University of California. Invention is credited to Cooper, Gregory A., Morse, Jeffrey D..
Application Number | 20020070416 09/733858 |
Document ID | / |
Family ID | 26865544 |
Filed Date | 2002-06-13 |
United States Patent
Application |
20020070416 |
Kind Code |
A1 |
Morse, Jeffrey D. ; et
al. |
June 13, 2002 |
Current isolating epitaxial buffer layers for high voltage
photodiode array
Abstract
An array of photodiodes in series on a common semi-insulating
substrate has a non-conductive buffer layer between the photodiodes
and the semi-insulating substrate. The buffer layer reduces current
injection leakage between the photodiodes of the array and allows
optical energy to be converted to high voltage electrical
energy.
Inventors: |
Morse, Jeffrey D.;
(Martinez, CA) ; Cooper, Gregory A.; (Pleasant
Hill, CA) |
Correspondence
Address: |
Alan H. Thompson
ATTORNEY
P.O. Box 808, L-703
Livermore
CA
94551
US
|
Assignee: |
The Regents of the University of
California
|
Family ID: |
26865544 |
Appl. No.: |
09/733858 |
Filed: |
December 8, 2000 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
60169964 |
Dec 9, 1999 |
|
|
|
Current U.S.
Class: |
257/443 ;
257/446; 257/E27.133; 257/E31.059 |
Current CPC
Class: |
H01L 27/1463 20130101;
H01L 31/1035 20130101; H01L 27/14643 20130101 |
Class at
Publication: |
257/443 ;
257/446 |
International
Class: |
H01L 031/111; H01L
031/00 |
Goverment Interests
[0002] The United States Government has rights in this invention
pursuant to Contract No. W-7405-ENG-48 between the United States
Department of Energy and the University of California for the
operation of Lawrence Livermore National Laboratory.
Claims
We claim:
1. An array of photodiodes on a semi-insulating, single crystal
semiconductor substrate, said array comprising: a semi-insulating
substrate; at least one non-conductive buffer layer adjacent said
substrate and having sufficient thickness to reduce charge
injection compared to an otherwise same array without said buffer
layer; and active photodiodes adjacent said non-conductive buffer
layer, said photodiode comprising at least one layer having a
single crystal semiconductor.
2. The array of claim 1 wherein said non-conductive buffer layer
comprising a single crystal semiconductor having a direct bandgap
greater than a bandgap of said single crystal semiconductor of said
photodiode and greater than a bandgap of a single crystal
semiconductor contained in said semi-insulating substrate.
3. The array of claim 1 wherein said non-conductive buffer layer is
positioned between said photodiodes and said semi-insulating
substrate.
4. The array of claim 1 wherein said non-conductive buffer layer is
epitaxially grown upon said semi-insulating substrate.
5. The array of claim 1 wherein said non-conductive buffer layer
comprises at least one single crystal semiconductor prepared by low
temperature growth (LTB).
6. The array of claim 1 wherein said non-conductive buffer layer
comprises AlAs, AlGaAs or GaAs.
7. The array of claim 1 wherein said photodiodes on said substrate
are interconnected to produce more than 10 volts.
8. The array of claim 1 wherein said non-conductive buffer layer
comprises a doped semiconductor material.
9. The array of claim 1 wherein a distance between adjacent rows of
said photodiodes on said substrate is sufficient in the absence of
said nonconductive buffer layer to provide a field strength between
portions of each row that is high enough to inject current into
said semi-insulating substrate resulting in a leakage current path
between adjacent rows.
10. A method for fabricating an array of photodiodes on a
semi-insulating substrate; said method comprising: growing a
non-conductive, buffer layer on a semi-insulating substrate; and
growing a photodiode structure comprising semiconductor layers on
said non-conductive layer.
11. The method of claim 10 wherein said semi-insulating substrate
and said semiconductor layers comprise a single crystal, direct
bandgap semiconductor.
12. The method of claim 10 wherein said growing comprises
epitaxially growing said buffer layer and/or semiconductor layers
on said semi-insulating substrate.
13. The method of claim 10 further comprising etching said
semiconductor layers to expose said non-conductive, buffer layer or
said semi-insulating substrate between said diodes to electrically
isolate said photodiodes.
14. The method of claim 10 wherein said nonconductor buffer layer
is prepared by a low temperature growth method (LTB).
15. The method of claim 10 wherein said nonconductor buffer layer
is selected from a buffer semiconductor material having a bandgap
greater than a bandgap of a semiconductor material of said
semi-insulating substrate and greater than a bandgap of said
semiconductor layer of said photodiode structure that is in contact
with said buffer semiconductor material.
16. A system for converting optical energy to high voltage
electrical energy, said system comprising: a source of optical
energy; means for transmitting said optical energy to an array of
independent photovoltaic cells interconnected in series on a
surface of a semi-insulating substrate, said cells comprising at
least one layer of single crystal semiconductor, and wherein said
independent photovoltaic cells are separated from said
semi-insulating substrate by at least one non-conductive buffer
layer between a plurality of said photovoltaic cells and said
semi-insulating substrate.
17. The system of claim 16 wherein said source of optical energy
comprises a laser.
18. The system of claim 17 wherein said means for transmitting said
optical energy comprises a fiber optic.
19. The system of claim 18 wherein an optical homogenizer is
located between said fiber optic and said array to produce a
uniform laser beam profile for illuminence onto said array.
20. The system of claim 16 wherein said source of optical energy
comprises solar radiation.
21. The system of claim 16 wherein said non-conductive buffer layer
comprises insulator or semiconductor material not allowing current
injection between said substrate and said photodiode during
illuminence of said optical energy onto said array.
22. The system of claim 16 wherein said non-conductive buffer layer
has a resistivity of greater than 1e9 ohm-cm.
Description
RELATED APPLICATION
[0001] This application relates to U.S. Provisional Application No.
60/169,964 filed Dec. 9, 1999, and claims priority thereof.
BACKGROUND OF THE INVENTION
[0003] Linear arrays of photovoltaic semiconductor diodes are used
to produce higher voltages than a single diode can produce.
Fabricating such arrays monolithically (on a common substrate)
using mass production techniques common to the semiconductor
industry is preferable to the manual assembly and interconnection
of individual diodes. Monolithically fabricated arrays can be
adversely affected by parasitic electrical currents flowing between
the individual diodes through the substrate reducing the usable
current and voltage produced by the array. One identified cause of
parasitic substrate conduction is the generation of charge carriers
in the substrate by illumination of the substrate in the regions
between the diodes. Two methods have been identified to reduce or
eliminate this effect; one is to use substrates that do not become
conductive when illuminated and the other is to block the light
from entering the substrate.
[0004] Using non-photo-conductive substrates has been demonstrated
for silicon diode arrays but the silicon produced is either
polycrystalline or amorphous. Silicon, being an indirect bandgap
material, has an inherently low efficiency at converting photons
into usable electrical current. Making the silicon polycrystalline
or amorphous reduces the efficiency even further. The
photon-to-usable-current efficiency can be substantially improved
by using single crystal, direct bandgap semiconductors. Single
crystal, direct bandgap semiconductors are the preferred materials
for high efficiency applications. However, fabricating high
quality, single crystal semiconductor diodes on insulating
substrates has been very difficult. Substrates which allow the
formation of single crystal diodes tend also to be susceptible to
photo-generated carrier production.
[0005] Methods for blocking the light from entering the substrates
required for the fabrication of single crystal, direct bandgap
semiconductors have also been demonstrated. Such light blocking
techniques have been limited to small differences in electrical
potential (10 volts or less) between spaced diodes. The reduction
of current leakage between closely spaced diodes in photodetector
diode arrays has been discussed in U.S. Pat. Nos. 5,049,962;
5,061,652; and 6,133,615. Other approaches have been based on doped
direct bandgap materials (e.g., U.S. Pat. No. 4,774,554 to Dentai,
et al. An example of a photodiode array containing direct bandgap
buffer materials on insulating substrates is discussed by Major et
al (U.S. Pat. No. 6,100,546). However, a need still exists for
photodiode arrays for high voltage power generation, using direct
bandgap materials on semi-insulating substrates.
SUMMARY OF THE INVENTION
[0006] Briefly, the invention includes an array of photodiodes on a
semi-insulating substrate, a method for fabricating such
photodiodes, and a system for converting optical energy to high
voltage electrical energy. The reduction or elimination of the
injection of electrical charge carriers into a common
semi-insulating substrate having an array of two or more
photodiodes (e.g., photocells) at different electrical potentials
is provided by positioning a nonconductive buffer layer containing
at least one single crystal semiconductor material between the
substrate and spaced diodes. Such an array can provide reduced
current injections and voltage collapse and can be illuminated with
uniform light beam profiles to increase efficiency.
[0007] The invention provides high quality lattice matching (i.e.,
within about 5%) between the semiconductor materials of the
non-conductive single crystal, buffer layer and the semiconductor
materials of the mesa photodiodes on the array, particularly during
epitaxial growth fabrication of the array.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] FIG. 1A illustrates a multiple row array of diodes including
a maximum voltage gradient area where excess current leakage often
occurs during operation of the array
[0009] FIG. 1B illustrates current leakage between a
non-independent pair of diodes.
[0010] FIG. 1C illustrates the physical separation method for
reduction of current leakage between an independent pair of
diodes.
[0011] FIG. 2A illustrates a band diagram for n-GaAs/AlAs/n+GaAs
structure at equilibrium.
[0012] FIG. 2B illustrates band diagrams with applied voltage
showing barriers to current flow at AlAs/GaAs interface.
[0013] FIG. 3 illustrates, in graphical form, the order of
magnitude of leakage current reduction at different buffer layer
thicknesses.
[0014] FIG. 4 illustrates at least two photodiodes and a buffer
layer on a common semi-insulating substrate.
[0015] FIG. 5 illustrates, in graphical form, a comparison of
minimal current leakage in three different non-conductive buffer
layers to that of an isolated p-n junction.
DETAILED DESCRIPTION OF THE INVENTION
[0016] In a system of the invention, the direct generation of high
voltage with an array of low voltage photodiodes involves optically
illuminating an array of photodiodes simultaneously. While the low
voltage power generation of approximately six volts has been
previously demonstrated with commercial arrays of photodiodes, many
applications require the generation of significantly higher
voltages (hundreds to thousands). The arrays of photodiodes of the
present invention can provide electrical potential differences of
above 10 volts, usually at least about 16 volts, often at least 50
volts, normally at least 90 volts, and easily capable of more than
1000 volts.
[0017] Optical energy is transmitted by conventional means,
including solar radiation, free space, and optical wave guides such
as optic fiber, to an array of photovoltaic cells or photodiodes
arranged to typically minimize footprint. An optical homogenizer
can be located between the optical transmission and the array to
form a uniform laser beam profile for illuminence onto the array.
In the generation of, for example, 1200 volts using discrete arrays
of GaAs-containing photodiodes, a limitation in such voltage
scaleups and compact, integrated photodiode arrays is excessive
leakage current due to parasitic electric fields as arrays of
series diodes are placed in parallel rows, for instance in
serpentine fashion, to minimize footprint to provide a compact
array. Although in many instances, rows of photodiodes are
interconnected in an array, any geometric pattern can be employed.
The result can be a collapse of the voltage across each component
of the array, thereby degrading the overall voltage generated by
the entire array of photodiodes. An integrated photodiode array can
utilize a current isolating buffer layer integrated with the
photodiode array.
[0018] High voltage photovoltaic arrays are designed as a means to
provide electrical power via optical energy for a variety of
applications. FIG. 1A illustrates a top view of an example of a
high voltage array 2 in which a plurality of rows 3 containing
spaced photodiodes 4 are fabricated in a serpentine fashion on a
semi-insulating substrate 6 and to which optical energy via, for
instance, optic fiber, is transmitted. Each row 3 of array 2 of
FIG. 1A is interconnected by a conductive interconnect 5 to provide
an in series connection of the photodiodes and has, for example, 90
photodiodes at about 1 volt/photodiode. FIG. 1B illustrates a side
view of two adjacent diodes 8 and 9 grown in spaced rows separated
by a distance 10 on a semi-insulating substrate 11. A limitation of
such arrays has been a collapse of the voltage across each
photodiode of the array, thereby degrading the overall voltage
generated by the entire photocell. Although not bound by any
theory, this collapse can be due to excess leakage current 12 being
generated between the rows of the photodiode array having different
electrical potentials as the rows are placed in parallel (see FIG.
1A and FIG. 1B), which results (in this example) in a maximum
voltage difference of 180 V (depicted at 7 in FIG. 1A and 10 in
FIG. 1B) at the unconnected ends of adjacent diode array rows or
columns. (1 Volt/diode.times.90 diodes/row=90 Volt
differential/row).
[0019] With a distance, for example, of about 300 .mu.m between
adjacent rows, the electric field strength between certain portions
of each row is high enough to inject current into the
semi-insulating substrate resulting in a leakage current path
between adjacent rows. As illustrated in FIG. 1C, such a problem
can be solved by physically separating adjacent rows 8 and 9 by,
for example, dicing the combination of photodiode and
semi-insulating substrate 11 and connecting the interconnects at
each end by an electrical connector, such as a wire, thus the
substrates can then be isolated electrically, on for instance an
insulating substrate 13. However, this approach does not increase
the overall voltage of the array and/or reduce the footprint. An
array having current isolating buffer layers between the photo
diode structures and the semi-insulating substrate provides a
solution to such a problem.
[0020] To reduce or eliminate the leakage current between adjacent
rows, a current isolating buffer layer can be positioned between
the semi-insulating substrate and the photodiode structure to act
as a barrier to current flow. For example, a photodiode array is
fabricated using a single crystal semi-insulating substrate such as
a Gallium Arsenide (GaAs) with material grown by any of the
conventional deposition methods, such as metal-organic chemical
vapor deposition (MOCVD) or molecular beam epitaxy (MBE). In a
resulting array of photodiode structures, the growth of single
crystal buffer layers, such as Aluminum Arsenide (AlAs) epitaxial
layers, on the GaAs substrate provides an offset in the conduction
and valence bands at the GaAs-AlAs interface, as illustrated in
FIG. 2A. As the voltage across the structure increases, causing the
bands to bend, the path of flow of electrons is impeded by this
band offset (as shown in FIG. 2B), until the effective distance
across the barrier becomes small enough such that the electrons can
tunnel through the barrier. At this point the current has an
exponential dependence on voltage. In general, the thicker the
barrier layer, the higher the voltage at which the electrons begin
to conduct current, although some materials can provide effective
barrier layers at thinner layers or within a range of micron
thicknesses.
[0021] On a semi-insulating GaAs substrate, leakage test structures
are grown having a thickness greater than about 1 .mu.m, and
usually in the range from about 0.1 .mu.m to about 6.0 .mu.m, by,
for instance, MOCVD. An AlAs or AlGaAs buffer layer is first grown
on the semi-insulating substrate varying in thickness from about
0.02 .mu.m to about 2 .mu.m, followed by a 0.5 .mu.m thick layer of
n+GaAs to provide an electrical contact. The active devices are
fabricated by forming a mesa ridge structure on which a contact
metal pad is patterned. The current vs. voltage characteristics are
then measured as a function of the thickness of buffer layer. Such
results are shown in FIG. 3. Such data indicate that the leakage
current is reduced by 3-5 orders of magnitude as the AlAs layer
thickness is increased. Although the data indicate that layers of
thickness from about 0.5 micron to about 2.0 micron are effective,
a range from about 0.2 to about 2.0 can be highly effective.
[0022] During operation of a system of the invention, the injection
of electrical charge carriers into the common substrate containing
two or more photodiodes at different electrical potentials, is
reduced or essentially eliminated by introducing a non-conductive
buffer layer, usually a single crystal material containing
semiconductor materials, that contacts and is positioned between a
single crystal, semi-insulating substrate and a single crystal
semiconductor material of the photodiode. Common techniques
employed to epitaxially grow single crystal semiconductor layer or
layers on compatible single crystal semiconductor substrates can be
employed in the invention. FIG. 4 illustrates a portion of an array
of spaced photodiodes 18 and 19 positioned on a clean,
semi-insulating, single crystal substrate 15. A non-conductive,
single crystal buffer layer 20 (or layers) is positioned between
each photodiode and semi-insulating, single crystal substrate 15
and grown to a thickness sufficient to reduce (or essentially
eliminate) charge injection for the electrical potential
differences anticipated or desired. The single crystal layers of
the active photodiode device, such as n-type semiconductor 21 over
which p-type semiconductor 22 (or vice versa) are grown in
juxtaposition to (e.g., on top of) the non-conductive, single
crystal buffer layer. Individual devices are then electrically
isolated from each other by removing material around each
photodiode device down to the non-conductive, single crystal buffer
layer 20 or the semi-insulating substrate 15. Wet or dry chemical
etches may be used for the material removal. The non-conductive,
single crystal buffer layer may contain a single material or may
contain multiple layers of different materials or a graded
composition layer.
[0023] In one embodiment, the non-conductive buffer layer 20 (FIG.
4) between the semi-insulating substrate 15 and photodiode
structures 18 and 19, which acts as a barrier to leakage current
flow, is a single crystal semiconductor material having a bandgap
greater than the bandgap of the semiconductor material comprising
the semi-insulating substrate 15 and also greater than the bandgap
of the adjacent semiconductor material 21 of the photodiode. Such
nonconductive, single crystal buffer layer semiconductor material
normally has a bandgap greater than 0.5 eV, and often greater than
1.0 eV.
[0024] The non-conductive, single crystal buffer layers can also be
selected and employed based on the fabrication method of low
temperature growth of a buffer layer (i.e., LTB) by molecular beam
epitaxy (MBE). For example, an LTB, such as GaAs, can be referred
to as LTB-GaAs. The LTB is prepared by reducing the temperature of
the semi-insulating substrate to less than about 500 degrees C.
during epitaxial growth and followed by a higher annealing
temperature above about 700 degrees C. Methods that can be utilized
to provide LTB produced non-conductive, single crystal buffer
layers are described in "MICROSTRUCTURE OF ANNEALED
LOW-TEMPERATURE-GROWN GaAs-LAYERS," authored by LILIENTALWEBER Z.,
CLAVERIE A., WASHBURN J., SMITH F., CALAWA R. in the APPLIED
PHYSICS A-MATERIALS SCIENCE & PROCESSING, 53: (2) 141-146 AUG
1991, and in "THE ROLE OF AS IN MOLECULAR-BEAM EPITAXY GaAs-LAYERS
GROWN AT LOW-TEMPERATURE," authored by LILIENTALWEBER Z., COOPER
G., MARIELLA R., KOCOT C., in the JOURNAL OF VACUUM SCIENCE &
TECHNOLOGY, B 9: (4) 2323-2327 JUL-AUG 1991, which are incorporated
by reference herein. The LTB-GaAs has the property that the crystal
lattice of the MBE layer has a significant level of naturally
occurring defects which act to trap any charge that is injected
into the lattice, yet retains adequate crystalline properties such
that high quality layers can be grown on top of it. Similar
structures are fabricated in 1 .mu.m thick LTB-GaAs layers.
Resulting current/voltage characteristics from testing such a
structure show the current leakage is essentially eliminated where
a current of only a few nanoamps is exhibited at 200 V bias.
[0025] The particular method of producing a non-conductive, single
crystal buffer layer results in increasing the electrical traps in
the predetermined (or chosen) initial single crystal, semiconductor
material. Such methods can increase the physical defects in the
crystal lattice. Furthermore, doping of the predetermined initial
semiconductor material can create more traps.
[0026] Useful semi-insulating substrate materials and
non-conductive, single crystal buffer layer materials include Group
III-V semiconductor materials, such as GaAs, AlAs, InAs, and
combinations thereof; InP, AlP, GaP, and combinations thereof;
InGaAlPAs, InSb, GaSb, AlSb and combinations thereof; Group IV-IV
semiconductor materials, such as SiGe, GaN, AIN, InN and
combinations thereof; Group II-VI semiconductor materials such as
ZnSe, HgCdTe, CdTe, and combinations thereof. Some of such
materials have bandgaps less than 1 eV, which can lead to high
concentrations of intrinsic electrical carriers rendering the
material conductive or semi-conductive, not semi-insulating.
However these same materials may be made semi-insulating or
non-conductive through the addition of impurities or preparation
techniques that add carrier traps reducing the number of electrical
carriers. Some of these materials have bandgaps greater than 2 eV
which generally renders them semi-insulating or non-conducting.
Thus, such higher bandgap materials may also be useful as the
non-conducting layer in the invention. For the present invention,
the various levels of conductivity can be referred to as follows:
for conductors having a bulk resistivity less than 10 ohm-cm, for
semi-conductors having a bulk resistivity between 1e2 and 1e5
ohm-cm, for semi-insulating substrates having a bulk resistivity
between 1e7 and 1e9 ohm-cm, and for non-conductors having a bulk
resistivity greater than 1e9 ohm-cm.
[0027] Materials that have demonstrated excellent results for the
non-conductive, single-crystal buffer layer are aluminum-arsenide
(AlAs), aluminum-gallium-arsenide (AlGaAs), and
Low-Growth-Temperature gallium-arsenide (LGT-GaAs).
[0028] FIG. 5 illustrates a comparison between arrays of
photodiodes containing (1) a low temperature buffer (LTB) layer of
about 2 micron thickness, (2) of about a 2 .mu.m thick AlAs buffer,
(3) of about a 2 .mu.m thick AlGaAs buffer, and (4) non-buffered
p-n junctions in isolated photodiode cells. At voltages greater
than about 10 volts, and particularly above about 180 volts, such
buffered photodiode cells of each array exhibits greater than 3
orders of magnitude reduction of leakage current compared to
unbuffered p-n junction isolated photodiode cells. The leakage
between the LTB and AlGaAs buffered devices remains low even out to
1400 volts.
[0029] Changes and modifications in the specifically described
embodiments can be carried out without departing from the scope of
the invention which is intended to be limited only by the scope of
the claims.
* * * * *