U.S. patent application number 09/920658 was filed with the patent office on 2002-06-06 for semiconductor article and method of manufacturing the same.
Invention is credited to Sakaguchi, Kiyofumi, Yonehara, Takao.
Application Number | 20020068419 09/920658 |
Document ID | / |
Family ID | 18472162 |
Filed Date | 2002-06-06 |
United States Patent
Application |
20020068419 |
Kind Code |
A1 |
Sakaguchi, Kiyofumi ; et
al. |
June 6, 2002 |
SEMICONDUCTOR ARTICLE AND METHOD OF MANUFACTURING THE SAME
Abstract
A method comprises steps of forming a doped layer containing an
element capable of controlling the conductivity type at least on
one of the surfaces of a semiconductor substrate, modifying the
surface of the doped layer into a porous state to obtain a porous
layer thinner than the doped layer, forming a non-porous layer on
the porous layer to prepare a first article, bonding said first
article and a second article so as to produce a multilayer
structure having said porous layer in the inside thereof, and
separating said multilayer structure along said porous layer.
Inventors: |
Sakaguchi, Kiyofumi;
(Yokohama-shi, JP) ; Yonehara, Takao; (Atsugi-shi,
JP) |
Correspondence
Address: |
FITZPATRICK CELLA HARPER & SCINTO
30 ROCKEFELLER PLAZA
NEW YORK
NY
10112
US
|
Family ID: |
18472162 |
Appl. No.: |
09/920658 |
Filed: |
August 3, 2001 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
09920658 |
Aug 3, 2001 |
|
|
|
09219748 |
Dec 23, 1998 |
|
|
|
Current U.S.
Class: |
438/458 ;
257/E21.122; 257/E21.57; 438/406; 438/409; 438/413; 438/759 |
Current CPC
Class: |
H01L 21/76259 20130101;
H01L 21/2007 20130101 |
Class at
Publication: |
438/458 ;
438/409; 438/413; 438/759; 438/406 |
International
Class: |
H01L 021/30; H01L
021/46; H01L 021/76; H01L 021/31; H01L 021/469 |
Foreign Application Data
Date |
Code |
Application Number |
Dec 26, 1997 |
JP |
9-361091 |
Claims
What is claimed is:
1. A method of manufacturing a semiconductor article, comprising
steps of forming an doped layer containing an element capable of
controlling the conductivity type at least on one of the surfaces
of a semiconductor substrate, modifying the surface of the doped
layer into a porous state to obtain a porous layer thinner than the
doped layer, forming a non-porous layer on the porous layer to
prepare a first article, bonding said first article and a second
article so as to produce a multilayer structure having said porous
layer in the inside thereof, and separating said multilayer
structure along said porous layer.
2. A method of manufacturing a semiconductor article according to
claim 1, further comprising a step of reusing the separated first
article as said semiconductor substrate for manufacturing another
semiconductor article.
3. A method of manufacturing a semiconductor article according to
claim 1, further comprising a step of reusing the separated first
article as said second article for manufacturing another
semiconductor article.
4. A method of manufacturing a semiconductor article according to
claim 1, wherein said doped layer and said porous layer are formed
on each of the two opposite surfaces of said semiconductor
substrate and subsequently said non-porous layer is formed on each
of said porous layers.
5. A method of manufacturing a semiconductor article according to
claim 1, wherein said element capable of controlling the
conductivity type is capable of controlling the conductivity type
of said doped layer to the n-type.
6. A method of manufacturing a semiconductor article according to
claim 5, wherein said element capable of controlling the
conductivity type is selected from P, As and Sb.
7. A method of manufacturing a semiconductor article according to
claim 1, wherein said element capable of controlling the
conductivity type is capable of controlling the conductivity type
of said doped layer to the p-type.
8. A method of manufacturing a semiconductor article according to
claim 7, wherein said element capable of controlling the
conductivity type is B.
9. A method of manufacturing a semiconductor article according to
claim 1, said doped layer is formed by way of a diffusion
process.
10. A method of manufacturing a semiconductor article according to
claim 1, wherein said doped layer is formed by way of an epitaxial
growth process.
11. A method of manufacturing a semiconductor article according to
claim 9 or 10, wherein said element capable of controlling the
conductivity type is supplied by using gas as source.
12. A method of manufacturing a semiconductor article according to
claim 9 or 10, wherein said element capable of controlling the
conductivity type is supplied by using liquid as source.
13. A method of manufacturing a semiconductor article according to
claim 9 or 10, wherein said element capable of controlling the
conductivity type is supplied by using solid as source.
14. A method of manufacturing a semiconductor article according to
claim 1, wherein a plurality of porous layers are formed in said
doped layer with porosities different from each other.
15. A method of manufacturing a semiconductor article according to
claim 1, wherein said porous layer includes first and-second porous
layers having different porosities and laid one on the other to
form a multilayer, of which the first porous thin layer located
adjacent to said non-porous layer has a lower porosity.
16. A method of manufacturing a semiconductor article according to
claim 1, wherein said doped layer comprises an epitaxial layer
formed by epitaxial growth and said porous layer is formed in the
epitaxial layer.
17. A method of manufacturing a semiconductor article according to
claim 16, wherein said porous layer comprises a plurality of porous
layers having porosities different from each other.
18. A method of manufacturing a semiconductor article according to
claim 14 or 17, wherein said multilayer structure is separated in
and/or at the interface of the porous layer having the higher
porosity.
19. A method of manufacturing a semiconductor article according to
claim 1, wherein the concentration of said element capable of
controlling the conductivity type contained in said doped layer is
controlled within a range between 5.0.times.10.sup.16/cm.sup.3 and
5.0.times.10.sup.20/cm.sup- .3.
20. A method of manufacturing a semiconductor article according to
claim 1, wherein the concentration of said element capable of
controlling the conductivity type contained in said doped layer is
controlled within a range between 1.0.times.10.sup.17/cm.sup.3 and
2.0.times.10.sup.20/cm.sup- .3.
21. A method of manufacturing a semiconductor article according to
claim 1, wherein the concentration of said element capable of
controlling the conductivity type contained in said doped layer is
controlled within a range between 5.0.times.10.sup.17/cm.sup.3 and
1.0.times.10.sup.20/cm.sup- .3.
22. A method of manufacturing a semiconductor article according to
claim 1, wherein said multilayer structure is separated by applying
external force to said porous layer.
23. A method of manufacturing a semiconductor article according to
claim 22, wherein said force is applied by applying pressure to
said multilayer structure in a direction perpendicular to its
surface, by pulling it in a direction perpendicular to its surface
and/or by applying shearing force to it.
24. A method of manufacturing a semiconductor article according to
claim 1, wherein said multilayer structure is separated by exposing
the porous silicon at a peripheral edge of said multilayer
structure and subsequently oxidizing the multilayer structure.
25. A method of manufacturing a semiconductor article according to
claim 1, wherein said multilayer structure is separated by heating
said multilayer structure.
26. A method of manufacturing a semiconductor article according to
claim 25, wherein said multilayer structure is heated entirely.
27. A method of manufacturing a semiconductor article according to
claim 25, wherein said multilayer structure is heated partly
28. A method of manufacturing a semiconductor article according to
claim 27, wherein said multilayer structure is heated by means of
laser or an electric current.
29. A method of manufacturing a semiconductor article according to
claim 28, wherein said laser is carbon dioxide laser.
30. A method of manufacturing a semiconductor article according to
claim 1, wherein said multilayer structure is separated by blowing
a fluid stream to an end of said multilayer structure.
31. A method of manufacturing a semiconductor article according to
claim 1, wherein said non-porous layer is a single-crystal silicon
layer.
32. A method of manufacturing a semiconductor article according to
claim 31, wherein a silicon oxide layer is formed on said
single-crystal silicon layer.
33. A method of manufacturing a semiconductor article according to
claim 1, wherein said non-porous layer is a single-crystal compound
semiconductor layer.
34. A method of manufacturing a semiconductor article according to
claim 4, wherein a pair of second articles are bonded respectively
to the opposite surfaces of said first article.
35. A method of manufacturing a semiconductor article according to
any of claims 1 through 3, further comprising a step of removing
the residual porous layer remaining on said separated semiconductor
substrate and/or said separated second article.
36. A method of manufacturing a semiconductor article according to
claim 35, wherein said removal step is a step of etching said
residual porous layer.
37. A method of manufacturing a semiconductor article according to
claim 35, wherein said removal step is a step of heat-treating said
residual porous layer in a hydrogen-containing reducing
atmosphere.
38. A method of manufacturing a semiconductor article according to
claim 35, wherein said residual porous layer is etched and
subsequently said separated semiconductor substrate and/or said
separated second article are heat-treated in a hydrogen-containing
reducing atmosphere.
39. A method of manufacturing a semiconductor article according to
any of claims 1 through 3, wherein the surface of said separated
semiconductor substrate and/or that of said separated second
article are smoothed.
40. A method of manufacturing a semiconductor article according to
claim 35, wherein said removal step is conducted by dipping said
residual porous layer in hydrofluoric acid, a solution of
hydrofluoric acid to which at least alcohol or hydrogen peroxide is
added, buffered hydrofluoric acid or a buffered hydrofluoric acid
solution to which at least alcohol or hydrogen peroxide is
added.
41. A method of manufacturing a semiconductor article according to
claim 35, wherein said removal step is conducted by selectively
polishing said porous layer, using said non-porous layer as
stopper.
42. A method of manufacturing a semiconductor article according to
claim 1, wherein said bonding step is a step of bringing said
articles into close contact with each other.
43. A method of manufacturing a semiconductor article according to
claim 1, wherein said bonding step is conducted by anodic bonding,
pressurization, heat treatment or a combination of any of
these.
44. A semiconductor article comprising a semiconductor substrate, a
single-crystal semiconductor layer formed on the semiconductor
substrate and a porous layer formed on the single-crystal
semiconductor layer; said single-crystal semiconductor layer being
a layer formed by epitaxial growth; said porous layer comprising a
plurality of layers having respective porosities different from
each other.
45. A semiconductor article according to claim 44, wherein said
porous layer is obtained by turning a surface layer of said layer
formed by epitaxial growth into a porous state so as to make said
porous layer have a thickness smaller than said layer formed by
epitaxial growth.
46. A semiconductor article according to claim 44, further
comprising a non-porous layer capable of being separated from said
semiconductor substrate.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] This invention generally relates to a method of
manufacturing a semiconductor article to be suitably be used for
preparing a semiconductor device, a filter, a light emitting
device, a micromechanical or optical part and, more particularly,
it relates to a method of manufacturing a semiconductor article
comprising a step of separating a multilayer structure having a
porous layer into two or more than two parts.
[0003] 2. Related Background Art
[0004] Semiconductor articles refer to semiconductor wafers,
semiconductor substrates and other semiconductor members. For the
purpose of the present invention, semiconductor articles include
those on which one or more than one semiconductor devices are
formed or to be formed by utilizing the semiconductor region
thereof.
[0005] Certain semiconductor articles comprise a semiconductor
layer formed on an insulator. Such semiconductor articles will be
discussed in greater detail below. The technology of forming a
single-crystal Si semiconductor layer on an insulator is known as
the semiconductor on insulator (SOI) technology and has been
investigated by many researchers because it provides a number of
advantages that cannot be obtained by bulk Si substrates that are
widely used for preparing ordinary Si integrated circuits. In
short, the SOI technology provides advantages of:
[0006] (1) easy dielectric separation and feasibility to a high
degree of integration;
[0007] (2) an excellent radiation resistance;
[0008] (3) a reduced floating capacitance and adaptability to high
speed operation;
[0009] (4) capability of omitting a well step;
[0010] (5) prevention of latch-ups; and
[0011] (6) capability of producing fully depleted type field effect
transistors as a result of realizing a semiconductor thin film.
[0012] Meanwhile, Japanese Patent Application Laid-Open No. 5-21338
and U.S. Pat. No. 5,371,037 propose a method of manufacturing a
semiconductor article comprising a bonding step as will be
described below.
[0013] According to the proposed method, a non single-crystal
semiconductor layer is formed on a porous layer and bonded to a
support substrate with an insulation layer interposed therebetween
and subsequently the porous layer is removed by etching. This
method is unique and remarkable in that it provides an excellent
uniformity for the film thickness of the SOI layer, a particular
easiness for reducing the crystal defect density of the SOI layer,
a good surface smoothness of the SOI layer, no need of a
particularly specified and hence costly manufacturing apparatus and
the capability of manufacturing SOI structures over a wide range of
film thickness between several hundred angstroms and 10
microns.
[0014] Japanese Patent Application Laid-Open No. 9-102594 proposes
a manufacturing method comprising forming a diffusion region by
diffusing an element capable of controlling the conductivity into a
silicon substrate, forming a porous layer in the diffusion region,
forming a non-porous single-crystal layer in the diffusion region,
bonding it to a supporting substrate with interposing an insulation
layer and subsequently removing the porous layer. This method
provides advantages that a relatively inexpensive
resistance-non-specified substrate can be employed to reduce the
manufacturing cost and that the concentration of the element
(specific resistance) on and near the surface can be controlled
precisely by the diffusion process. However, with the above
proposed methods, a pair of silicon substrates are consumed for
producing a single SOI wafer and one of the substrates will be
totally lost as a result of grinding, polishing and etching.
[0015] Thus, Japanese Patent Application Laid-Open No. 7-302889
proposes a method of manufacturing an SOI wafer without losing a
silicon substrate. The proposed method comprises forming a
non-porous single-crystal semiconductor layer on a porous layer
formed on a first substrate, bonding the non-porous single-crystal
semiconductor layer to a second substrate with interposing an
insulation layer, separating the first and second substrates along
the porous layer without destroying the substrates, smoothing the
surface of the first substrate and forming another porous layer on
the first substrate for reuse. With this method, the first
substrate is separated away without being destroyed so that it can
be repeatedly used for the process of manufacturing SOI wafers to
significantly reduce the manufacturing cost and simplify the
manufacturing process.
[0016] However, the inventors of the present invention have found
that, unless the first substrate is always separated away to show a
same contour and a same (exposed) surface condition, the processing
steps necessary for regenerating the first substrate to make it
reusable require certain adjustment.
[0017] Additionally, large undulations on the interface of the
porous layer and the substrate can limit the reusability of the
first substrate.
SUMMARY OF THE INVENTION
[0018] It is an object of the present invention to provide a method
of manufacturing a semiconductor article at low cost with
simplified processing steps necessary for regenerating a first
substrate.
[0019] Another object of the present invention is to provide a
method of manufacturing a semiconductor article adapted to separate
a first substrate from a second article reliably and make it show a
same contour and a same surface condition after the separation.
[0020] Still another object of the present invention is to provide
a method of manufacturing a semiconductor article adapted to reduce
the undulations on the porous layer/substrate interface of a first
substrate after separating it from a second article and make the
first substrate reusable regardless of its specific resistance.
[0021] According to the invention, the above objects and other
objects are achieved by providing a method of manufacturing a
semiconductor article, comprising steps of forming an doped layer
containing an element capable of controlling the conductivity type
at least on one of the surfaces of a semiconductor substrate,
modifying the surface of the doped layer into a porous state to
obtain a porous layer thinner than the doped layer, forming a
non-porous layer on the porous layer to prepare a first substrate,
bonding said first article and a second article so as to produce a
multilayer structure having said porous layer in the inside
thereof, and separating said multilayer structure along said porous
layer.
[0022] According to the invention, there is also provided a
semiconductor article comprising a semiconductor substrate, a
single-crystal semiconductor layer formed on the semiconductor
substrate and a porous layer formed on the single-crystal
semiconductor layer;
[0023] said single-crystal semiconductor layer being a layer formed
by epitaxial growth;
[0024] said porous layer comprising a plurality of thin layers
having respective porosities different from each other.
BRIEF DESCRIPTION OF THE DRAWINGS
[0025] FIGS. 1A, 1B, 1BP, 1C, 1D, 1E, 1F and 1FP are schematic
cross sectional views of an embodiment of semiconductor article,
showing different manufacturing steps of a manufacturing method
according to the invention.
[0026] FIGS. 2A, 2AP, 2B, 2C, 2D, 2E and 2EP are schematic cross
sectional view of a semiconductor article, showing different
manufacturing steps of a comparative manufacturing method.
[0027] FIG. 3 is a schematic illustration of a diffusion process
conducted in a furnace that can be used for the purpose of the
present invention.
[0028] FIG. 4 is a graph showing the concentration distribution
pattern of the dopant in the doped layer of a semiconductor article
according to the invention.
[0029] FIGS. 5A and 5B are schematic cross sectional views of
semiconductor articles according to the invention, illustrating
different modes of separation.
[0030] FIGS. 6A, 6B, 6BP, 6C, 6D, 6E, 6F and 6FP are schematic
cross sectional view of another embodiment of semiconductor
article, showing different manufacturing steps of a manufacturing
method according to the invention.
[0031] FIGS. 7 and 8 are charts showing some of the results of the
evaluation conducted on the semiconductor article obtained by the
method of FIGS. 1A to 1F and the article obtained by the
comparative method of FIGS. 2A to 2E.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0032] FIGS. 1A, 1B, 1BP, 1C, 1D, 1E, 1F and 1FP are schematic
cross sectional views of an embodiment of semiconductor article,
showing different manufacturing steps of a manufacturing method
according to the invention.
[0033] In Step S1, a doped layer 12 is formed on the surface of a
prepared semiconductor substrate 11 by adding an element (which may
be referred to as dopant hereinafter) capable of controlling the
conductivity type (FIG. 1A).
[0034] Then, in Step S2, the surface side of the doped layer 12 is
modified into a porous state such that the formed porous layer 13
shows a thickness smaller than that of the doped layer 12 and hence
a residual doped layer 12A is left under the porous layer 13 (FIGS.
1B, 1BP).
[0035] Subsequently, in Step S3, a non-porous layer 14 is formed on
the porous layer 13. If necessary, an insulation layer 15 is formed
on the non-porous layer 14 (FIG. 1C).
[0036] In Step S4, the semiconductor substrate 11 now carrying a
non-porous layer 14 (first article) and a separately prepared
second article 16 are bonded together. Thus, there is obtained a
multilayer structure 1 having a non-porous layer 14 in the inside
thereof.
[0037] Then, in Step S5, the multilayer structure 1 is separated
into two parts along the inside or the interface (the upper or
lower surface) of the porous layer 13 (FIG. 1E). In fact, FIG. 1E
shows that the multilayer structure 1 is separated in the inside of
the porous layer 13 so that both the semiconductor substrate 11 and
the second article 16 carry a residue of the porous layer on the
respective surfaces produced by the separation.
[0038] If necessary, in Step S6, the residual porous layer 13 is
removed to produce an SOI substrate 2 and a separated semiconductor
substrate 11 each having a flat surface.
[0039] The doped layer 12 has a dopant concentration distribution
improved in the in-plane uniformity, i.e. uniformity in the
horizontal direction in FIGS. 1A to 1F, as compared to the
semiconductor substrate before doped (virgine wafer). Therefore,
the interface IF between the residual doped layer 12A and the
porous layer 13 is highly flat.
[0040] Since the interface IF is flat, a flat surface SF showing a
uniform dopant concentration is obtained for the semiconductor
substrate 11 after removing the residual porous layer 13.
[0041] On the other hand, if the SOI substrate 2 carries the
residual porous layer 13 on the non-porous layer 14 after the
separation, the residual layer 13 shows a uniform dopant
concentration and a highly uniform intra-planar porosity. Then,
since the residual porous layer 13 shows a highly uniform
thickness, it can be selectively removed without giving rise to a
non-uniform film thickness distribution in the non-porous
underlayer.
[0042] Additionally, due to the fact that the porous layer 13 that
operates as separation layer shows a uniform dopant concentration
and a highly uniform intra-planar porosity as pointed out above,
the separation takes place generally along the same plane to
invariably give an intended profile to the semiconductor substrate
11 so that the residual porous layer will show a substantially
constant thickness. Thus, the operation of removing the residual
porous layer can be conducted under same conditions and hence is
adapted to mass production.
[0043] Furthermore, the undulations on the porous layer/substrate
interface of the first article can be minimized by modifying a
surface layer of the doped layer into a porous state to a thickness
smaller than the thickness of the doped layer and separating the
multilayer structure along this porous layer. This effect will be
discussed below in greater detail.
[0044] In the process of producing an ingot for a single-crystal
wafer, fine variations can appear in the dopant concentration as
the solid phase grow along a transversal direction of the ingot.
The variations in the concentration may be negligible for the
ordinary IC manufacturing process.
[0045] With the method of separating the bonded first and second
articles along the porous layer formed on the first article and
reusing the separated Si substrate as another first article as
proposed in Japanese Patent Application Laid-Open No. 7-302889,
undulations can be produced on the interface of the porous
layer/substrate interface due to the variations in the dopant
concentration of the wafer surface as pointed out above. For
instance, in the process of anodizing the porous layer on the wafer
surface, the current density changes to locally change the film
thickness distribution of the porous layer and produce undulations
on the porous layer/substrate interface. This phenomenon will be
described further by referring to FIGS. 2A through 2E.
[0046] In FIG. 2A showing Step S11, 21 denotes a single-crystal
substrate and 22 denotes a porous layer. Referring to FIG. 2AP, the
dopant concentration differs at positions indicated by arrows 26
and 27 so that the doped layer is modified into a porous layer at a
rate that differs at these positions to produce a difference of
level there as a result. Then, in Step S12, a single-crystal layer
23 and an oxide layer 24 are formed to complete the process of
preparing a first article (FIG. 2B) and, in Step S13, the first
article is bonded to a second article 25 (FIG. 2C). Thereafter, in
Step S14, the two articles are separated along the porous layer 22
(FIG. 2D) and, in Step S15, the residual porous layer is removed
from the second article to produce an SOI substrate (FIG. 2E). On
the other hand, after removing the residual porous layer, the first
article reveals the undulations 28 existing on the porous
layer/substrate interface at intervals of about several hundred
.mu.m to 1 mm (FIG. 2EP). In an ingot preparing process using a CZ
technique, for example, substantially coaxial undulations will be
produced. The undulations 28 will be left if the porous layer is
removed by polishing unless the substrate is overpolished after
removing the porous layer. The surface of the first article exposed
after removing the porous layer not only shows such undulations but
also a certain degree of micro-roughness that corresponds to the
profiles of the front ends of micro-pores of the porous layer. The
micro-roughness can be removed to smooth the surface by a heat
treatment process conducted in an hydrogen-containing atmosphere or
by a surface touch-polishing process that are not accompanied by a
reduction in the film thickness.
[0047] However, since the undulations are caused by the variations
in the thickness of the porous layer, the first substrate will
eventually come to show remarkable undulations that would not allow
any further reuse unless it is subjected to a surface planarizing
process, although it may be regenerated satisfactorily for the
first reuse. Then, the first substrate has to be planarized by
polishing at the cost of reducing its height to a certain extent.
Thus, the wafer loses its height by "the thickness of the porous
layer and the thickness lost by the polishing". When the wafer
shows a height that undergoes a certain level, it will become short
of the required mechanical strength and can be broken during the
manufacturing process. The number of times of reusing the wafer
will be limited. In other words, both the thickness and the number
of times by which the wafer is polished for removing the
undulations should be reduced in order to regenerate the wafer for
a large number of times. Thus, the wafer can be effectively and
efficiently regenerated for a number of times by reducing both the
local variations in the dopant concentration on the wafer surface
and the undulations on the porous layer/substrate interface.
[0048] According to the invention, the undulations on the porous
layer/substrate interface is reduced by using a process adapted to
uniformizing the intra-planar dopant concentration on the wafer
surface by means of an appropriate technique for adding a dopant
element capable of controlling the conductivity type such as
diffusion, ion implantation or epitaxial growth. Thus, according to
the invention, the undulations on the porous layer/substrate
interface can be effectively reduced so that the first article can
be reused immediately after removing the residual porous layer
therefrom or after regenerating it by smoothing the micro-roughness
by means of a heat treatment process conducted in a
hydrogen-containing atmosphere or a surface touch-polishing
process.
[0049] For the purpose of the invention, only a surface layer of
the first article may be modified into a doped layer showing a high
dopant concentration because the crystallinity of the epitaxial
layer is highly sensitive to the structure of the porous layer at
and near the surface thereon. Since the remaining underlying
portion of the wafer is not practically used for the manufacturing
process, a relatively inexpensive resistance-non-specified
regenerated wafer may be used for the purpose of the invention. A
"regenerated wafer" as used herein refers to a wafer obtained by
removing the surface layer of a monitor wafer used in an IC process
or a wafer carrying a rejected device on the surface by means of
etching or grinding and then polishing the surface to a level of
smoothness compatible with an IC process. Such a regenerated wafer
may show an impurity concentration level and a contamination level
same as those of an ordinary wafer.
[0050] When a doped layer is formed by means of a diffusion
technique, the diffusion of the diffusion layer (e.g., P.sup.+
layer) can be carried out both on the front surface and the rear
surface simultaneously. This means that both the resistance of the
rear surface of the wafer and that of the positive electrode can be
lowered for anodization so that an electric current may be made to
flow uniformly on the wafer surface. Then, porous Si may be formed
on the surface of the wafer with a uniform thickness. While, a
P.sup.+ layer may be formed by ion implantation or epitaxial
growth, unlike a diffusion technique, both of these techniques are
effective only for treating a side of the wafer and neither of them
can be used to form a P.sup.+ layer on the rear surface
simultaneously. Additionally, they are more costly than the
diffusion technique although they are good for treating only a side
of the wafer. Thus, the diffusion technique is advantageous in that
it can treat the both sides simultaneously and the process cost is
low.
[0051] The epitaxial growth technique, on the other hand, is
advantageous over the diffusion technique in that it can
effectively minimize the reduction of the height of the first
article, smooth the surface with a low defect density and provide a
uniform dopant concentration across the height of the film,
although the process may be more costly than the diffusion
technique.
[0052] Thus, as discussed above, according to the invention, the
first and second substrates of a multilayer structure can be
separated along a porous layer over a large surface area so that
the processing steps of grinding, polishing and etching that are
used in the conventional processes to scrape the first article and
expose the porous layer can be omitted to significantly reduce the
total number of steps.
[0053] Additionally, if the substrate of the first article is
gradually removed by grinding or etching from a side thereof in a
process of preparing a multilayer structure, the two sides of the
substrate cannot be effectively used to bond it to a supporting
substrate. To the contrary, according to the invention, the
substrate of the first substrate retains the original profile
except the surface layer and, therefore, a pair of multilayer
structures may be prepared simultaneously by using the two opposite
sides of the substrate of the first article and bonding a pair of
supporting substrates to the respective sides of the substrate of
the first article. Such a technique will significantly curtail the
overall manufacturing time and improve the productivity. It may be
needless to say that the substrate of the first article can be
reused after separating it from the multilayer structures.
[0054] Thus, the present invention provides a method of
manufacturing a semiconductor article in a highly economical way by
using a single-crystal substrate showing a uniform crystallinity
over a wide area and removing the surface layer from a side of the
substrate except the Si or compound semiconductor active layer
formed on the surface to produce an Si single-crystal layer or a
compound semiconductor single-crystal layer on an insulation layer
practically without defects.
[0055] Additionally, the present invention provides a method of
manufacturing a semiconductor article that is outstanding in terms
of productivity, uniformity, controllability and cost for preparing
an Si or compound semiconductor single-crystal layer showing a
crystallinity as good as a single-crystal wafer on a transparent
substrate (light-transmitting substrate).
[0056] Still additionally, the present invention provides a method
of manufacturing a semiconductor article that can replace a costly
SOS or SIMOX for preparing an LSI having an SOI structure.
[0057] According to the invention, a single-crystal compound
semiconductor layer showing a good crystallinity can be formed on
porous Si layer and then transferred onto an insulating substrate
having a large surface area that can be provided economically.
Thus, a compound semiconductor layer can be formed on an insulating
substrate, minimizing the difference in the lattice constant and
the thermal expansion coefficient.
[0058] A semiconductor substrate that can be used for the purpose
of the present invention is a P-type or N-type semiconductor
substrate. It may be a silicon substrate having a specified
specific resistance or, alternatively, it may be a less costly
resistance-non-specified silicon wafer or regenerated wafer (a
"regenerated wafer" as used herein refers to a wafer obtained by
removing the surface layer of a monitor wafer used in an IC process
or a wafer carrying a rejected device on the surface by means of
etching or polishing and then polishing the surface to a level of
smoothness compatible with an IC process).
[0059] According to the invention, the porosity of an outer
peripheral area may be reduced while that of a central area may be
raised through a combined use of anodization and ion implantation
so that the outer peripheral area may be expanded remarkably to
increase its volume while the central area may be made less strong
and hence may be separated with ease.
[0060] (Formation of Doped Layer)
[0061] For the purpose of the present invention, the element
(dopant) to be added to the silicon substrate to control the
conductivity type refers to any of the elements popularly used for
the semiconductor process. Table 1 shows some of such elements.
1TABLE 1 Element Capable of Controlling the Conductivity Type
Conductivety type Element n P, As, Sb p B
[0062] Techniques that can be used to add an element include
diffusion, ion implantation and epitaxial growth. If the diffusion
method is used for adding an element, it is preferable from the
viewpoint of cost to select a diffusion technique that can
thermally diffuse an element capable of controlling the
conductivity type into the silicon substrate. Table 2 below shows
various diffusion techniques that can be used to thermally diffuse
such an element.
2TABLE 2 Techniques for Diffusing an Element Diffusion technique
Diffusion source Furnace Open tube method POCl.sub.3, BN, PH.sub.3
Diffusion furnace Coating method Coated glass Diffusion furnace Use
of doped Doped oxide Diffusion film (CVDPSG) furnace Doped poly Si
Shield tube As (solid), BCl.sub.3, Diffusion method PH.sub.3,
capsule furnace
[0063] While a porous layer is formed in the diffusion region
according to the invention, a porous layer can be formed more
easily in a p-type diffusion region than in an n-type diffusion
region. Table 3 shows techniques that can be used for diffusing B
(boron), bearing this fact in mind.
3TABLE 3 Techniques for Diffusing Boron Gaseous source
B.sub.2H.sub.6 Liquid source BBr.sub.3 Solid source B.sub.2O.sub.3
Solid phase-solid phase CVD film, BSG, diffusion spin-coat film
[0064] The techniques listed in Table 3 are designed basically to
diffuse the element supplied from the source into the silicon
substrate by a heat treatment operation conducted in a furnace.
[0065] For example, a diffusion process using a spin-coat film may
typically be conducted in a manner as described below.
[0066] Firstly, a mixture solution of B.sub.2O.sub.3, an organic
binder and a solvent is applied uniformly onto a silicon substrate
(silicon wafer) by means of a spinner. Then, the applied solution
is dried and baked to produce a B.sub.2O.sub.3 film on the silicon
substrate. Then, the silicon substrate is placed in a furnace as
shown in FIG. 3 and heat-treated to drive the boron (B) to diffuse.
In FIG. 3, 301 denotes the furnace and 302 denotes a susceptor
whereas 100 denotes a silicon substrate coated with a
B.sub.2O.sub.3 film 150 at one of the opposite sides thereof. The
boron (B) can be driven to diffuse into the silicon substrate by
heat-treating it at about 900.degree. C. to 1,300.degree. C. in a
furnace as shown in FIG. 3. Note that a diffusion layer is formed
not only on the above described side bearing the B.sub.2O.sub.3
film but also on the opposite side, using the B.sub.2O.sub.3 film
formed on the adjacently located silicon substrate(s) as diffusion
source.
[0067] The diffusion layers formed respectively on the two opposite
sides of the silicon substrate operate advantageously to reduce the
contact resistance with the HF solution when forming a porous layer
by anodization in a subsequent step.
[0068] For the purpose of the invention, the concentration of the
element capable of controlling the conductivity type that is
contained in the produced diffusion region is generally found
within a range between 5.0.times.10.sup.16/cm.sup.3 and
5.0.times.10.sup.20/cm.sup.3, preferably between
1.0.times.10.sup.17/cm.sup.3 and 2.0.times.10.sup.21/cm.sup.3, more
preferably between 5.0.times.10.sup.17/cm.sup.3 and
1.0.times.10.sup.20/cm.sup.3, although the concentration is
preferably selected by taking the step of modifying the surface
layer into a porous layer and the characteristics of the epitaxial
film to be formed on the porous silicon layer into
consideration.
[0069] For the purpose of the invention, the thickness of the doped
layer refers to the thickness of the portion where the
concentration of the added dopant is higher than the concentration
of that dopant in the semiconductor substrate before it is doped
with the dopant.
[0070] When a dopant operating as acceptor relative to an n-type
substrate is added, the depth from the surface to the PN junction
plane becomes the thickness of this p-type doped layer.
[0071] Similarly, when a dopant operating as doner relative to a
p-type substrate is added, the depth from the surface to the PN
junction plane becomes the thickness of this n-type doped
layer.
[0072] FIG. 4 shows the concentration profile of a dopant when it
is of the same type as that of the substrate, be it p-type or
n-type, is added, as obtained as a result of an experiment.
[0073] In FIG. 4, the solid curve 31 depicts the dopant profile
obtained when a dopant (e.g., B) is added by means of a diffusion
technique and the dotted line 32 depicts the dopant profile
obtained when a doped layer is formed by epitaxial growth. In FIG.
4, t1 denotes the thickness of the doped layer. As seen in FIG. 4,
forming a doped layer by epitaxial growth produces a dopant
concentration profile uniform in layer thickness and is therefore
preferable for modifying the layer to a porous state. The doped
layer should preferably have a depth beteen 0.2 .mu.m and 30 .mu.m,
more preferably between 0.21 .mu.m and 15 .mu.m.
[0074] (Formation of Porous Layer)
[0075] Techniques that can be used for forming a porous layer for
the purpose of the invention will be summarily described below.
Porous layers, of Si for example, were discovered by Uhlir et al.
in 1956 when they were looking into a process of electrolytically
polishing a semiconductor object (A. Uhlir, Bell Syst. Tech. J.,
vol.35,333 (1956)). Porous Si can be produced by anodizing an Si
substrate in an HF solution. Unagami et al. report as a result of
researches on the dissolving reaction of Si in anodization that
holes are required in an anodic reaction of Si that proceeds in an
HF solution and the reaction is expressed by the following formulas
(T. Unagami, J. Electrochem. Soc., vol.127,476 (1980)).
Si+2HF+(2-n)e.sup.+.fwdarw.SiF.sub.2+2H.sup.++ne.sup.-
[0076] SiF.sub.2+2HF.fwdarw.SiF.sub.4+H.sub.2
SiF.sub.4+2HF.fwdarw.H.sub.2SiF.sub.6
or
Si+4HF+(4-.lambda.)e.sup.+.fwdarw.SiF.sub.4+4H.sup.++.lambda.e.sup.-
SiF.sub.4+2HF.fwdarw.H.sub.2SiF.sub.6
[0077] where e.sup.+ and e.sup.- represent a hole and an electron
respectively and n and .lambda. represent the numbers of holes
required to dissolve an Si atom. Porous Si is produced when n>2
or .lambda.>4 is satisfied.
[0078] From the above description, it may be said that p-type Si is
modified into porous Si in the presence of holes, whereas n-type Si
is not modified into porous Si. However, in reality, n-type Si can
also be modified to show a porous state. Additionally,
semiconductors other than Si such as GaAs can also be modified to
show a porous state.
[0079] According to the invention, a porous layer showing a
monocrystalline property can be produced by anodizing a
single-crystal semiconductor substrate typically in an HF solution.
A porous layer shows a sponge-like structure, where pores with a
diameter between 10.sup.-1 and 10 nm are arranged at intervals also
between 10.sup.-1 and 10 nm. While the density of a single-crystal
semiconductor substrate is typically 2.33 g/cm.sup.3, the density
of the porous layer can be modified within a range between 2.1 and
0.6 g/cm.sup.3 by changing the concentration of the HF solution
between 50 and 20% and/or changing the current density. Thus, the
porosity of a porous layer is variable. While the density of a
porous layer can be reduced to less than a half of that of a
single-crystal semiconductor substrate, the porous layer maintains
the monocrystalline property and hence a non-porous single-crystal
layer can be formed on the porous layer by epitaxial growth.
However, a rearrangement of internal pores takes place to damage
the effect of accelerated etching at temperature higher than
1,000.degree. C. Thus, the use of a low temperature growth
technique such as molecular beam epitaxial growth, plasma CVD,
reduced pressure CVD, photo-assisted CVD, bias sputtering or liquid
phase growth is believed to be preferable. However, a high
temperature growth technique may also be feasible when a thin
protective film is formed on the wall of the pores of the porous
layer in advance typically through a low temperature oxidation
process.
[0080] Since a porous layer contains a large number of voids in the
inside, its density is reduced to less than a half of that of a
single-crystal semiconductor substrate. In other words, the surface
area of the porous layer dramatically increases relative to the
volume and hence the rate of chemically etching the porous layer is
remarkably enhanced from that of etching an ordinary single-crystal
layer.
[0081] While the mechanical strength of a porous layer may vary
depending on its porosity, it is lower than that of a non-porous
layer. For example, a porous layer with a porosity of 50% may show
a mechanical strength substantially equal to a half of that of a
non-porous layer. Therefore, when a bonded wafer having a porous
layer is subjected to compression, tension or shearing force, the
porous layer will be destroyed first. A porous layer having a high
porosity will be destroyed with small power.
[0082] There are reports saying that micro-cavities with a diameter
between several nm and tens of several nm are formed in bulk Si to
a density of 1016 to 10.sup.17/cm.sup.3 when the bulk Si is
heat-treated after implanting helium or hydrogen ions into it. (for
example, A. Van Veen, C. C. Griffioen and J. H. Evans, Mat. Res.
Soc. Symp. Proc. 107 (1988, Material Res. Soc. Pittsburgh,
Pennsylvania) p.449). Recently, researches are being made to
utilize such micro-cavities as gettering sites for metal
impurities.
[0083] For the purpose of the invention, the porous layer is
preferably made to show a thickness smaller than its counterpart
before forming the porous layer. While there is no limitation to
the thickness of the porous layer so long as this requirement is
met, it is preferably between 0.1 .mu.m and 29 .mu.m, more
preferably between 0.1 .mu.m and 14 .mu.m.
[0084] The thickness of the non-porous doped layer left under the
porous layer without having been modified into a porous state is
preferably between 0.01 .mu.m and 29 .mu.m, more preferably between
0.01 .mu.m and 10 .mu.m.
[0085] The porous layer is preferably made to comprise two thin
layers having different porosities.
[0086] The thin porous layer formed as upper layer in the porous
layer that will be located adjacent to a nonporous layer to be
formed subsequently is referred to as first porous layer, while the
other thin porous layer located under the first porous layer is
referred to as second porous layer. Then, the first porous layer
preferably has a porosity lower than that of the second porous
layer.
[0087] Still another porous layer having an intermediary porosity
may be arranged between the first and second porous layers.
[0088] Alternatively a third porous layer may be formed adjacently
relative to the second porous layer. Then, it is sufficient for the
third porous layer to show a porosity from that of the second
porous layer.
[0089] A multilayer structure comprising a porous layer can be
separated with ease when the first porous layer shows a thickness
smaller than the second porous layer.
[0090] Since a doped layer formed by epitaxial growth shows a
particularly uniform dopant concentration, the use of such a layer
is preferable to make the process of forming a plurality of porous
layers an easy and satisfactory one.
[0091] As described above, a semiconductor article according to the
invention allows a subsequently formed non-porous layer to be
separated with ease.
[0092] A semiconductor article according to the invention can be
made to become easily separated by implanting ions of hydrogen,
nitrogen or rare gas into at least one of the porous layers.
[0093] A semiconductor article according to the invention can be
made to become separated along a specific depth in or on the
interface of the porous Si layer by implanting ions of at least an
element selected from rare gas, hydrogen and nitrogen in advance in
such a way that the projection range is located within the porous
layer. With such an arrangement, the porous layer left on the
second substrate will show a uniform thickness so that it can be
removed uniformly by using an etching solution that is not
remarkably selective.
[0094] (Non-porous Layer)
[0095] For the purpose of the invention a non-porous semiconductor
layer may be of a single layer or multilayer structure that can
suitably be formed by using at least one selected from
single-crystal Si, poly-crystalline Si, amorphous Si or a compound
semiconductor selected from GaAs, InP, GaAsP, GaA1As, InAs, AlGaSb,
InGaAs, ZnS, CdSe, CdTe, SiGe and other compound semiconductor
materials. The non-porous layer may contain one or more than
semiconductor devices such as FETs (field effect transistors)
formed therein in advance.
[0096] Alternatively, the non-porous layer may be a metal thin film
or a carbon thin film, although not limited thereto. It is not
necessary to form such a thin film over the entire surface and the
produced thin film may be partly etched.
[0097] (First Article)
[0098] For the purpose of the invention, a first article comprising
a semiconductor substrate having a porous layer and a non-porous
layer arranged on said porous layer can be prepared either by
forming a non-porous layer on a porous layer formed in a
semiconductor substrate or by forming a porous layer in a
semiconductor substrate having a non-porous layer.
[0099] Techniques that can be used for forming a non-porous
semiconductor layer on a porous layer include CVD methods such as
reduced pressure CVD, plasma CVD, photo-assisted CVD and MOCVD
(metal-organic CVD) and sputtering (including bias sputtering),
molecular beam epitaxial growth and liquid phase growth.
[0100] (Second Article)
[0101] For the purpose of the invention, a second article onto
which a non-porous semiconductor layer is to be transferred may be
a semiconductor substrate such as a single-crystal silicon
substrate, an article obtained by forming an insulation film such
as an oxide film (which may be a thermal oxide film) or a nitride
film on the surface of a semiconductor substrate, a light
transmitting substrate such as a silica glass substrate or a glass
substrate, an electrically conductive substrate typically made of
metal or an electrically insulating substrate typically made of
alumina according to the application of the semiconductor article
to be prepared.
[0102] (Bonding)
[0103] According to the invention, a first article having a porous
layer and a non-porous layer is bonded to a second article to
produce a multilayer structure in such a way that the non-porous
layer is located inside the multilayer structure. For the purpose
of the invention, a multilayer structure having a non-porous layer
located inside may be a structure obtained by bonding the
non-porous layer of a first article directly to a second article or
by way of an insulation film such as an oxide film or a nitride
film or some other film formed on the non-porous layer. In other
words, for the purpose of the invention, a multilayer structure
refers to a structure where a non-porous layer is located closer to
the second article as viewed from the porous layer.
[0104] A first article and a second article may be bonded to each
other by holding them in close contact with each other at room
temperature if the surfaces to be bonded together of the articles
have been smoothed. The bonding strength can be improved by using a
technique such as anode coupling, pressure application or heat
treatment.
[0105] (Separation of Multilayer Structure)
[0106] The porous layer that has been produced by modifying a
surface layer of a doped layer obtained by adding an element
capable of controlling the conductivity type of a diffusion region
is brittle and fragile when compared with other regions so that a
multilayer structure having such a porous layer can be separated
easily and reliably along the porous layer in a separation
process.
[0107] A multilayer structure can be separated by pulling it in
directions perpendicular to the bonding interface, by applying
shearing stress to it in a direction parallel to the bonding
interface (e.g., by moving the first and second articles in
opposite directions parallel to the bonding interface or by
rotating them in opposite senses around the center), by applying
pressure to it in a direction perpendicular to the bonding
interface, by applying wave energy such as ultrasonic waves to the
area to be separated, by inserting a separating tool (e.g., a knife
having a sharp edge) into the region to be separated from a lateral
side of the bonded articles in parallel with the bonding interface,
by utilizing the energy of expansion of a substance infiltrated
into the porous layer to be separated, by thermally oxidizing the
porous layer to be separated and causing it to expand and separate,
by selectively etching the porous layer to be separated from a
lateral side of the bonded articles or by irradiating a layer that
can produce micro-cavities by ion implantation with a laser beam
and heating the layer to separate. Alternatively, a multilayer
structure can be separated by applying pulsatile heat or thermal
stress or by softening the porous layer although it may be
separated by means of some other technique.
[0108] Now, some of the separating techniques that can feasibly be
used for the purpose of the invention will be discussed below.
[0109] (Separation by Means of Fluid)
[0110] A fluid flow that can be used for separating the porous
layer of a multilayer structure for the purpose of the invention
can be produced by injecting pressurized fluid (gas or liquid)
through a narrow nozzle. A water jet technique as described in
"Water Jet", vol.1, p.4 may be used to produce a beam-like high
speed jet stream under high pressure. A water jet stream as
described above that can suitably be used for the purpose of the
invention is produced by applying high pressure (100 kgf/cm.sup.2
to 8,000 kgf/cm.sup.2) to water by means of a high pressure pump
and causing it to flow out as a high speed jet stream through a
narrow nozzle, that can be used effectively to cut, process, remove
the surface film coat from or clean the surface of various objects
made of ceramic, metal, concrete, resin, rubber and/or wood
(although a polishing agent may have to be added to water when the
object is particularly hard). Conventionally, a water jet stream is
used to remove part of an object in a manner as described above.
More specifically, a water jet stream is conventionally used to
remove a margin to be cut and/or a surface film coat of an object
or clean the surface of an object. However, for the purpose of the
invention, a jet stream of fluid, which may be water, is made to
hit the region to be separated along the bonding line of the bonded
articles from a lateral side thereof until the multilayer structure
is separated. More specifically, the jet stream is firstly made to
directly hit the region to be separated that is exposed at a
lateral side of the bonded articles and part of the first and
second articles located adjacent to it. Then, only the region to be
separated that is mechanically fragile is destroyed by the jet
stream of fluid to separate the multilayer structure at that region
while the articles are left intact. If the region to be separated
is covered by a thin layer and not exposed for some reason or
other, such a thin layer can be removed or destroyed by the jet
stream to expose the region to be separated, which is then removed
by the jet stream.
[0111] While not utilized effectively to date, the bonded wafers
can be destroyed and separated at the region to be separated by
hitting a narrow gap (recess) on a lateral side of the bonded
wafers by means of a liquid jet stream so as to push the bonded
articles apart along said fragile region. Since no cutting nor
removal of part of the wafers take place with such a technique, the
region to be separated produce practically no debris. Even the
region to be separated is made of a material that cannot be removed
by a fluid jet, it can be separated without using a polishing agent
and producing damages on the surfaces produced by the separation.
Thus, the effect of using a fluid jet is not like the one obtained
by cutting or polishing and may be a sort of wedge effect of fluid.
Thus, this effect can be expected when the bonded articles show a
narrow recess or gap on a lateral side thereof so that a fluid jet
stream can exert force to it in directions good for destroying the
region to be separated. When this effect can be expected, lateral
sides of the bonded articles preferably show not a projecting but
recessed profile.
[0112] FIGS. 5A and 5B schematically illustrate this effect. In
FIGS. 5A and 5B, 901 and 911 denote a first article, 902 and 912
denote a second article and 903 and 913 denote a region to be
separated, while 904, 914 denote a semiconductor layer, 905 and 915
denote an insulation layer and 906 and 916 denote an bonding
interface. Reference numeral 907 denote a fluid jet stream and 908
and 918 indicate the directions along which force is applied to the
articles.
[0113] FIG. 5A shows the directions along which force is exerted
onto the bonded articles by a fluid jet stream when the lateral
side of the bonded articles shows a recessed profile. Force is
exerted in directions good for broadening the recess and hence
separating the bonded articles. On the other hand, FIG. 5B shows
the directions along which force is exerted onto the bonded
articles by a fluid jet stream when the lateral side of the bonded
articles shows a projecting profile. Since force is not exerted in
directions good for separating the bonded articles, the articles
would not be separated unless the region to be separated is
destroyed or removed by some other means.
[0114] If the region to be separated is covered by a thin layer and
not exposed for some reason or other, such a thin layer can be
removed or destroyed by the jet stream that exerts force good for
broadening the recess to consequently expose the region to be
separated, which is then destroyed by the jet stream to
successfully separate the articles. In order to receive the fluid
jet stream without loss the recess preferably has an aperture not
smaller than the cross section of the jet stream. In view of the
fact that each of the first and second articles to be used for
manufacturing a semiconductor article has a thickness not greater
than 1.0 mm, typically between 0.7 and 0.8 mm, to make the total
thickness not greater than 2.0 mm when bonded and the recess will
show a width of about a half of this thickness, the fluid jet
stream preferably shows a cross section with a diameter not greater
than 1.0 mm. In actual applications, the use of a fluid jet stream
having a diameter of about 0.1 mm will be feasible.
[0115] The nozzle through which a fluid jet stream is produced may
show a circular cross section or some other contour. An oblong
slit-like nozzle may feasibly be used. A very flat fluid jet stream
will be produced from such a nozzle.
[0116] The parameters for producing the fluid jet stream may be
appropriately selected depending on the type of the region to be
separated, the profile of the lateral surface of the bonded wafers
to which the jet stream is applied and other factors. The
parameters include, above all, the pressure of the jet stream, the
scanning speed of the jet stream, the nozzle diameter
(substantially equal to the diameter of the fluid jet stream), the
profile of the nozzle, the distance between the nozzle and the
region to be separated and the flow rate of the fluid.
[0117] In the actual separating process, the two wafers can be
separated by scanning the nozzle along the bonding interface,
hitting the lateral side in a direction parallel to the bonding
interface or, alternatively, by moving the bonded articles in
parallel with the nozzle, while rigidly and invariably holding the
fluid jet stream. Still alternatively, the fluid jet stream may be
made to scan to draw a sector extending from a center, which is the
nozzle, or, when the bonded articles shows a disk-like profile as
often is the case, the bonded wafers may be rotated around the
center thereof, while also rigidly and invariably holding the fluid
jet stream. If necessary, the bonded interface and the nozzle may
be arranged at offset positions displaced from a common plane so
that the fluid jet stream may hit the region to be separated with a
given angle. The mode of scanning the fluid jet stream also may not
be limited to the above description. Since the fluid jet stream has
a very small cross section and proceeds in a direction
substantially parallel to the surfaces of the bonded wafers, the
high pressure of the jet stream that is as high as thousands of
several kgf/cm2 will practically not be applied to the wafers as
will easily be understood by way of vector analysis. The force
exerted to the bonded articles by the fluid jet stream is several g
at most so that it cannot destroy the articles.
[0118] The fluid to be used for producing a jet stream may not
necessarily be water. Fluid materials that can be used for the
purpose of the invention include alcohol, organic solvents, acids
such as hydrofluoric acid and nitric acid, alkalis such as
potassium hydroxide and liquid substances that can selectively etch
the region to be separated as well as gaseous substances such as
air, nitrogen gas, carbon dioxide gas and rare gases. Gas or plasma
that can etch the region to be separated may also be used. When
water is used, it is preferably pure water or ultra-pure water from
which impurity metals and particles have been almost completely
removed if the operation of separating the articles is incorporated
into a semiconductor manufacturing process, although ordinary water
may be used to produce a water jet for a completely low temperature
process and the wafers may be washed completely after the
separation.
[0119] (Separation by Means of Oxidation)
[0120] The porous layer Si layer may be oxidized from the outer
periphery of the wafers by utilizing the phenomenon of enhanced
oxidation of porous Si. Then, the porous Si layer expands more
along the outer periphery than at the center to produce an effect
as if a number of wedges were driven into the porous Si layer
evenly and simultaneously along the outer periphery to make only
the porous Si layer subjected to internal pressure so that the
bonded wafers are broken apart exclusively through the porous Si
layer over the entire area. Since the porous Si layer is normally
covered by a non-porous layer even in an outer peripheral area and
hence has to be exposed along the outer peripheral area or along
the edge before or after the bonding process. When the bonded
articles are oxidized, enhanced oxidation starts from an outer
peripheral area of the porous Si layer because of the tremendously
large surface area of the porous Si layer. As Si is oxidized to
become SiO.sub.2, its volume is expanded to become 2.27 times
greater than before. Thus, the oxidized porous Si layer will
continue to expand when the porosity is less than 56%. Oxidation
takes place to a less degree in a central area and the expansion of
volume of the oxidized porous Si layer will be more remarkable in
an outer peripheral area of the wafers. The net result will be same
as the effect produced when a number of wedges are driven into the
porous Si layer from the edge evenly and simultaneously and only to
make only the porous Si layer subjected to internal pressure and
become separated. Additionally, since oxidation proceeds uniformly
along the periphery of the wafers, the latter are separated from
each other as separation proceeds evenly from the outer periphery
toward the center.
[0121] Thus, as a combined effect of enhanced oxidation of the
porous Si layer, expansion of the volume of the porous Si layer and
the fragility of the porous Si layer, only the porous Si layer can
be made to be subjected to internal pressure to separate the bonded
wafers in a well-controlled manner by utilizing an operation of
oxidation that proceeds highly uniformly and is commonly used in
ordinary Si-IC processes.
[0122] (Separation by Means of Heating)
[0123] For the purpose of the invention, the bonded articles can be
separated along the fragile porous Si layer by entirely heating
bonded articles to generate thermal stress therein, making use of
the fact that the porous Si layer is structurally fragile.
[0124] Since the bonded articles show a multilayer structure, they
may be separated along part of the interface that is mechanically
less strong and/or some other regions that are also mechanically
less strong if external pressure is applied thereto to separate the
porous Si layer. On the other hand, the bonded articles can be
separated successfully along the porous Si layer by heating the
porous Si layer with or without some adjacent areas to mollify
and/or apply thermal stress to the porous Si layer, making use of
the fact that the porous Si layer is structurally fragile.
[0125] Alternatively, laser may be used to cause a specific layer
of the bonded articles to absorb laser energy and become heated
without heating the entire bonded articles. The porous Si layer may
be locally heated and separated by irradiating it with a laser beam
having a wavelength apt to be absorbed exclusively by the porous Si
layer along with or without adjacent layers.
[0126] (Separation by Means of Electric Energization)
[0127] The porous Si layer can be heated rapidly to generate
thermal stress therein and separate it to separate the bonded
articles by causing an electric current to flow through the porous
Si layer or its vicinity. More specifically, the doped layer is
exposed at an end of the wafers by removing SiO.sub.2 and the
wafers are pinched by a positive electrode and a negative electrode
that contact the wafers only at the edge thereof to make an
electric current flow along the doped layer in order to separate
the wafers.
[0128] (Removal of the Porous Layer)
[0129] After separating the multilayer structure obtained by
bonding first and second articles along the porous layer, the
residual porous Si layer, if any, left on the separated
semiconductor substrate, which is the second article, can be
selectively removed by utilizing the fact that the porous layer is
mechanically fragile and has a tremendously large surface area.
Methods that can be used for selectively removing the residual
porous layer include mechanical ones such as grinding, polishing
and lapping, chemical etching using an etching solution, chemical
dry etching and ion etching (e.g., reactive ion etching).
[0130] Etching solutions that can be used for selectively
wet-etching the porous layer include a solution of a mixture of 49%
hydrofluoric acid and 30% hydrogen peroxide, a solution of
hydrofluoric acid to which alcohol is added, a solution of
hydrofluoric acid to which alcohol and hydrogen peroxide are added,
a buffered hydrofluoric acid solution with or without alcohol or
hydrogen peroxide added thereto, a buffered hydrofluoric acid
solution to which alcohol and hydrogen peroxide are added and a
solution of a mixture of hydrofluoric acid, nitric acid and acetic
acid.
[0131] After selectively removing the porous layer, the
semiconductor article (SOI substrate) obtained by transferring the
non-porous layer onto the second article may be heat-treated in a
hydrogen-containing atmosphere to improve the smoothness of the
non-porous layer.
[0132] Alternatively, particularly when the residual porous layer
left on the non-porous layer of the second article is as thin as
less than 1 .mu.m, the porous layer may be turned into a non-porous
state simply by heat treatment (as a method of removing the
residual porous layer).
[0133] The residual porous layer remaining on the residual doped
layer of the semiconductor substrate may be treated like the
residual porous layer on the second article to produce a smoothed
non-porous surface.
[0134] Alternatively, the residual porous layer on the
semiconductor substrate and/or the second article can be removed by
polishing or lapping.
[0135] Embodiment 1
[0136] Now, Embodiment 1 of the present invention will be described
in detail by referring to FIGS. 1A through 1F. Firstly, a P.sup.+
layer 12 is formed on the principal surface of an Si single-crystal
substrate 11 by means of a diffusion process or an epitaxial growth
process (Step Si, FIG. 1A). Subsequently, the principal surface is
modified into a porous state by a depth smaller than the thickness
of the P.sup.+ layer 12 to produce a P.sup.+ porous Si layer 13
(Step S2, FIG. 1B). The rate at which the porous Si layer is formed
depends on the P.sup.+ concentration of the substrate.
[0137] At least a non-porous layer 14 is formed on the P.sup.+
porous Si layer 12 to produce a complete first article. The
non-porous layer 14 is made of a material selected from
single-crystal Si, poly-crystalline Si, amorphous Si, metal film,
compound semiconductor thin film and superconductor thin film. It
may comprise a device structure of transistors such as MOSFETs.
Preferably, SiO.sub.2 is formed as outermost layer from the
viewpoint that the interface level of the bonding interface can be
separated from the active layer. Step S3 is a step for forming an
insulation layer 15 of SiO.sub.2 as uppermost layer on the surface
(FIG. 1C). Then, in Step S4, the surface of the first article is
brought into close contact with that of a second article 16 (FIG.
1D). Thereafter, the bonding effect of the two articles may be
intensified by anodic bonding or pressure application and, if
necessary, heat treatment or a combination of all of them.
[0138] When single-crystal Si is deposited, the two articles are
preferably bonded together after forming silicon oxide on the
surface of the single-crystal Si typically by thermal oxidation.
The second article may be selected from an Si substrate, an Si
substrate carrying a silicon oxide film formed thereon, a
light-transmitting substrate typically made of vitreous silica and
a sapphire substrate, although it is not limited thereto and may be
any other appropriate article whose surface to be bonded is
sufficiently flat and smooth. FIG. 1D shows that the first and
second articles are bonded with the insulation layer 15 interposed
therebetween, although the insulation layer 15 may be omitted when
the non-porous layer 14 is not made of Si or the second article is
not an Si substrate.
[0139] When bonding, an insulating laminate may be sandwiched
between the first and second articles to produce a tripartite
structure.
[0140] When the non-porous layer is made of epitaxially grown
single-crystal silicon or some other material produced by a process
involving the use of heat treatment in the epitaxial growth step or
in a subsequent step, the internal pores of the porous Si layer can
be rearranged and become shut to damage the effect of the operation
of etching the porous layer. However, this problem can be avoided
by preliminarily heat-treating the porous Si layer typically at
temperature between 200.degree. C. and 700.degree. C. to form a
thin oxide film on the inner wall of the pores (while maintaining
the monocrystallinity of the porous layer) in order to structurally
stabilize the porous layer and prevent the possible rearrangement
from taking place.
[0141] A technique as will be described below can be used to form
an epitaxial silicon film with minimal flaws.
[0142] While a porous silicon layer maintains a monocrystalline
structure, flaws can occur in the epitaxial silicon film due to the
innumerable pores on the surface of the porous silicon layer.
However, such flaws may be eliminated by covering the uppermost
surface of the porous silicon layer with single-crystal
silicon.
[0143] This can be achieved by heat-treating the porous silicon
layer in a hydrogen-containing atmosphere. As a result of the heat
treatment using hydrogen, a phenomenon of migration takes pace to
some of the silicon atoms on the surface of the porous silicon
layer to close the pores of the porous silicon layer exposed to the
surface. The heat treatment is conducted at temperature preferably
between 500.degree. C. and 1,300.degree. C., more preferably
between 900.degree. C. and 1,300.degree. C.
[0144] Alternatively, the pores exposed to the surface of the
porous silicon layer can be closed by causing source gas containing
silicon atoms to flow at a very low rate into a film-forming
chamber and produce a silicon film also at a very low rate.
[0145] When the outermost pores are closed and an epitaxial silicon
film is formed after forming a thin oxide film on the inner wall of
the pores, the single-crystal silicon is preferably exposed from
the uppermost surface of the porous silicon layer. For the purpose
of the invention, the single-crystal silicon can be exposed by
dipping the uppermost surface of the porous silicon layer, where a
thin oxide film has been formed on the inner wall of the pores,
into a solution of an acid such as hydrofluoric acid and removing
the thin oxide film formed on the uppermost surface.
[0146] Then, the bonded two articles are separated from each other
through the inside or the upper or lower surface of the porous
silicon layer 13 (Step S5, FIG. 1E) by means of any of the above
listed separating technique, although some other technique may
alternatively be used.
[0147] Thereafter, the residual porous silicon layer 13 is
selectively removed. When the non-porous layer is made of
single-crystal Si, at least one of the solutions including an
ordinary etching solution for etching Si, a hydrofluoric acid
solution that is used for selectively etching porous silicon, a
mixture solution obtained by adding at least alcohol or hydrogen
peroxide to hydrofluoric acid, a buffered hydrofluoric acid
solution or a mixture solution obtained by adding at least alcohol
or hydrogen peroxide to a buffered hydrofluoric acid solution will
be selected and only the porous silicon layer 13 will be subjected
to non-hydrolytic wet chemical etching, using the selected
solution, so that the film formed on the porous layer of the first
article may be left on the second article. As discussed in detail
above, only the porous silicon can be selectively etched by means
of an ordinary etching solution to be used for etching silicon due
to the tremendous surface area of the porous silicon layer.
Alternatively, the porous silicon layer 13 may be removed by
selective polishing, using the non-porous thin film layer 14 as
polishing stopper.
[0148] When a compound semiconductor layer is formed on the porous
silicon layer, only the porous silicon layer 13 will be chemically
etched by means of an etching solution showing a higher etching
rate relative to Si than to compound semiconductor so that the thin
film of the single-crystal compound semiconductor layer 14 may be
left on the second article. Alternatively, the porous silicon layer
13 may be removed by selective polishing, using the single-crystal
compound semiconductor layer 14 as polishing stopper.
[0149] FIG. 1F schematically shows a semiconductor article obtained
by a method according to the invention. A non-porous thin film such
as a single-crystal Si thin film 14 is formed flatly and uniformly
on the second article 16 to cover the entire surface of the wafer
and show a large surface area. When an insulator substrate is used
for the second article 16, the obtained semiconductor substrate can
advantageously be used for preparing insulated and isolated
electronic devices.
[0150] The residual porous silicon layer is removed from the Si
single-crystal substrate 11. The surface reflects the profile of
the original porous Si/substrate interface and hence is
substantially flat. However, the surface shows a degree of
micro-roughness attributable to the fine pores of the porous
silicon layer. If the flatness of the surface is not acceptable,
the substrate 11 is subjected to a smoothing process before it is
reused as an Si single-crystal substrate 11 that becomes a first
article or as a second article.
[0151] Embodiment 2
[0152] This embodiment can be obtained by partly modifying
Embodiment 1. This will be described by referring to FIGS. 6A
through 6F.
[0153] Firstly, a doped layer 12 of Si is made to epitaxially grow
on the surface of a semiconductor substrate 11 (Step S1, FIG.
6A).
[0154] Then, the doped layer 12 is turned into porous state from
the surface to produce a porous silicon layer. Note that at least
two porous silicon thin layers 33, 43 having different respective
porosities are formed by modifying the conditions for turning the
doped layer 12 into a porous state. Preferably, the thin layer 33
that is to be arranged adjacent to a non-porous layer 14 to be
formed in a subsequent step shows a porosity lower than that of the
other thin layer 43 (Step S2, FIG. 6B).
[0155] If necessary, the wall surface of the pores of the porous
silicon layer 13 is oxidized at temperature between 200.degree. C.
and 700.degree. C.
[0156] Also if necessary, the oxide film on the surface of the
porous silicon layer 13 is removed and heat-treated in a
hydrogen-containing atmosphere at temperature between 500.degree.
C. and 1,300.degree. C. Subsequently, a single-crystal
semiconductor layer 14 is formed by homo- or hetro-epitaxial
growth.
[0157] If necessary, an insulation layer is formed on the surface
of the non-porous layer 14 (Step S3, FIG. 6C) and then the surface
is bonded to the non-porous layer 14 of a second article 16 (Step
S4, FIG. 6D).
[0158] The obtained multilayer structure is then separated by any
of the above listed techniques (Step S5, FIG. 6). Since the porous
layer comprises a plurality of sub-layers 33, 34 having different
respective porosities in this embodiment, the separation of the two
articles will be easier and the technique of causing a fluid jet
stream to hit a lateral side (edge) of the multilayer structure
will advantageously be used.
[0159] Embodiment 3
[0160] This embodiment can be obtained by partly modifying
Embodiment 1 or 2.
[0161] More specifically, ions of an element selected from
hydrogen, nitrogen or rare gas are implanted into or on the upper
or lower interface of the porous layer 13 comprising a single layer
or a plurality of sub-layers to produce a layer capable of
providing micro-bubbles.
[0162] The operation of implanting ions may be conducted before or
after forming the non-porous layer 14.
[0163] After forming a layer capable of providing micro-bubbles by
ion implantation, the bubbles grow and the multilayer structure is
separated by itself when it is subjected to a heat treatment
process.
[0164] Embodiment 4
[0165] This embodiment is realized by conducting the processing
steps described above by referring to Embodiments 1 through 3 on
the two opposite sides of a first article, bonding a pair of second
articles to the opposite sides of the first article respectively
and separating the two second articles from the first article along
the respective porous layers to produce a pair of semiconductor
articles simultaneously.
[0166] The residual porous Si is then removed from the Si
single-crystal substrate of the first article. If the flatness of
the surfaces is not acceptable, the substrate is subjected to a
smoothing process before it is reused as an Si single-crystal
substrate that becomes a first article or as a second article.
[0167] The two second semiconductor articles may not be made of a
same material nor have a same thickness. The non-porous thin films
formed on the opposite sides of the first article may not be made
of a same material nor have a same thickness.
EXAMPLE 1
[0168] A P.sup.+ high concentration layer with a boron
concentration of 5.times.10.sup.17 to 1.times.10.sup.20/cm.sup.3
was formed to a thickness of 10 .mu.m on the surface of a
resistance-non-specified single-crystal Si substrate by means a
diffusion method. The process of forming the P.sup.+ high
concentration layer by using a diffusion method was conducted in a
manner as described below. Firstly, a solution obtained by
dissolving B.sub.2O.sub.3 into a solvent was applied to the
principal surface of the Si substrate by means of a spin-coat
technique. Then, the solvent was driven off by baking the substrate
at 140.degree. C. The obtained substrate was then placed in a
diffusion furnace and subjected to a so-called drive-in diffusion
process, maintaining the inside of the furnace tube to
1,150.degree. C. for 24 hours, to produce the P.sup.+ high
concentration layer. After removing the coat film, the layer was
anodized in an HF solution from the side of the high density
surface.
[0169] The anodization was conducted under the following
conditions.
4 Current density: 7 (mA .multidot. cm.sup.-2) Anodizing solution:
HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1 Duration: 7 (min.)
Thickness of porous Si layer: 8 .mu.m
[0170] The substrate was then oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour. As a result of the oxidation, the inner
walls of the pores of the porous Si layer were covered by a thermal
oxide film. Then, single-crystal Si was made to epitaxially grow at
a rate of 0.3 .mu.m/min. on the porous Si layer by CVD (chemical
vapor deposition) under the following conditions. Since the surface
of the porous Si layer was exposed to high heat treatment
temperature of 1,000.degree. C. in 100% hydrogen ambient in the
initial stages of the epitaxial growth, the pores exposed to the
surface was filled to show a flat surface.
5 Source gas: SiH.sub.2Cl.sub.2 / H.sub.2 Aas flow rate: 0.5/180
liter/min. Gas pressure: 80 Torr Temperature: 950.degree. C. Growth
rate: 0.3 .mu.m/min.
[0171] Then, an SiO.sub.2 layer was formed on the surface of the
epitaxial Si layer by thermal oxidation to produce a finished first
article.
[0172] Then, the surface of the SiO.sub.2 layer was brought into
close contact with the surface of another Si substrate (second
article) and the two articles were heat-treated at 1,000.degree. C.
for 1 hour.
[0173] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0174] Subsequently, the residual porous Si layer left on the
second article was removed by selective etching, using a mixture
solution of 49 Vol% hydrofluoric acid, 30 Vol% hydrogen peroxide
and water, which was stirred constantly. The single-crystal Si was
left unetched, whereas the porous Si was totally removed by the
selective etching, utilizing the single-crystal Si as etching
stopper.
[0175] The rate R1 of etching non-porous Si single-crystal of the
etching solution is very low and the ratio R1/R2 relative to the
rate R2 of etching a porous layer is as small as more than 10-5 so
that the effect of etching the non-porous layer and reducing the
film thickness thereof (tens of several angstroms) was practically
negligible.
[0176] Thus, a single-crystal Si layer was formed on the silicon
oxide film to a thickness of 0.2 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal Si layer was observed at 100 points distributed over
the entire surface of the article to find that it was as uniform as
201 nm.+-.4 nm.
[0177] Additionally, the obtained semiconductor article was heat
treated in 100% hydrogen at 1,100.degree. C. for 1 hour. The
surface roughness was evaluated through an atomic force microscope
to find that the root-mean-square of surface roughness in a 50
.mu.m square area was about 0.2 nm, which was comparable to that of
commercially available Si wafers.
[0178] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the Si
layer and an excellent crystallinity was maintained.
[0179] Similar results were obtained when no oxide film was formed
on the epitaxial Si layer. Further, similar results were obtained
when an oxide film was formed on the second article.
[0180] At the same time, the porous Si left on the single-crystal
Si substrate was also removed by selective etching, using a mixture
solution of 49% hydrofluoric acid, 30% hydrogen peroxide and water,
which was stirred constantly. The single-crystal Si was left
unetched, whereas the porous Si was totally removed by the
selective etching, utilizing the single-crystal Si as etching
stopper. Thus, it was possible to reuse it in a diffusion process
to form a P.sup.+ high concentration layer as the single-crystal Si
substrate of another first article or in a contacting process as
another second article.
[0181] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0182] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0183] The root-mean-square of surface roughness of the Si
substrate of the first article was less than 10 nm in a
micro-region of a 50 .mu.m square area and its surface was visually
mirror-smooth under fluorescent light over a large area, or over
the entire surface of the wafer, after removing the porous layer.
For the purpose of comparison, a similar Si substrate was prepared
for the first article by following the steps of this example except
that a porous layer was formed on a P.sup.+ wafer with an impurity
concentration of 5.times.10.sup.18/cm.sup.3 and no additional doped
layer was formed. Then, the root-mean-square of surface roughness
of the Si substrate of the first article was less than 10 nm in a
micro-region of a 50 .mu.m square area but undulations were
visually observed under fluorescent light over a large area, or
over the entire surface of the wafer, after removing the porous
layer. FIG. 7 illustrates the observed surfaces of the two
specimens.
[0184] When the Si substrate of the first article of this example
and that of the first article prepared for the purpose of
comparison were both subjected to a hydrogen annealing process as
described above, after removing the porous layer, the
root-mean-square of surface roughness of the Si substrate of the
first article of this example was less than 0.2 nm in a
micro-region of a 50 .mu.m square area and its surface was visually
mirror-smooth under fluorescent light over a large area, or over
the entire surface of the wafer, whereas the root-mean-square of
surface roughness of the Si substrate of the first article of the
comparative specimen was less than 0.2 nm in a micro-region of a 50
.mu.m square area but undulations were visually observed under
fluorescent light over a large area, or over the entire surface of
the wafer. FIGS. 5A and 5B illustrate the observed surfaces of the
two specimens.
EXAMPLE 2
[0185] A specimen was prepared as in Example 1 except the following
anodization conditions were used.
[0186] A P.sup.+ high concentration layer with a boron
concentration of 5.times.10.sup.17 to 1.times.10.sup.20/cm.sup.3
was formed to a thickness of 10 .mu.m on the surface of a
resistance-non-specified single-crystal Si substrate by means a
diffusion method and subsequently subjected to an anodization
process conducted under the following conditions.
6 First stage Current density: 7 (mA .multidot. cm.sup.-2)
Anodizing solution: HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1
Duration: 5 (min.) Thickness of first porous Si layer: 6 .mu.m
Second stage Current density: 30 (mA .multidot. cm.sup.-2)
Anodizing solution: HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1
Duration: 100 (sec.) Thickness of second porous Si layer: 3
.mu.m
[0187] As a result of using different current densities, the
porosity of the first porous Si layer was lower than that of the
second porous Si layer.
[0188] Then, the substrate was oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour to cover the inner wall of the pores of
the porous Si layer with a thermal oxide film. Subsequently,
single-crystal Si was made to epitaxially grow at a rate of 0.3
.mu.m/min. on the porous Si layer by CVD (chemical vapor
deposition) under the conditions as described above for Example 1.
Then, an SiO.sub.2 layer was formed to a thickness of 200 nm on the
surface of the epitaxial Si layer by thermal oxidation to produce a
finished first article.
[0189] Then, the surf ace of the SiO.sub.2 layer was brought into
close contact with the surface of another Si substrate (second
article) and the two articles were heat-treated at 1,000.degree. C.
for 1 hour.
[0190] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0191] Subsequently, the residual porous Si layer left on the
second article was removed by selective etching, using a mixture
solution of 49% hydrofluoric acid, 30% hydrogen peroxide and water,
which was stirred constantly. The single-crystal Si was left
unetched, whereas the porous Si was totally removed by the
selective etching, utilizing the single-crystal Si as etching
stopper.
[0192] The rate R1 of etching non-porous Si single-crystal of the
etching solution is very low and the ratio relative to the rate R2
of etching a porous layer is as small as more than 10.sup.-5 so
that the effect of etching the non-porous layer and reducing the
film thickness thereof (tens of several angstroms) was practically
negligible.
[0193] Thus, a single-crystal Si layer was formed on the silicon
oxide film to a thickness of 0.2 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal Si layer was observed at 100 points distributed over
the entire surface of the article to find that it was as uniform as
201 nm+4 nm.
[0194] Additionally, the obtained semiconductor article was heat
treated in hydrogen at 1,100.degree. C. for 1 hour. The surface
roughness was evaluated through an atomic force microscope to find
that the root-mean-square of surface roughness in a 50 .mu.m square
area was about 0.2 nm, which was comparable to that of commercially
available Si wafers.
[0195] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the Si
layer and an excellent crystallinity was maintained.
[0196] Similar results were obtained when no oxide film was formed
on the epitaxial Si layer. Further, similar results were obtained
when an oxide film was formed on the second article.
[0197] At the same time, the porous Si left on the first article
was also removed by selective etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal Si was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal Si as etching stopper. Thus, it was
possible to reuse it in a diffusion process to form a P.sup.+ high
concentration layer as the single-crystal Si substrate of another
first article or in a contacting process as another second
article.
[0198] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0199] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0200] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 3
[0201] The single-crystal Si substrate regenerated in Example 1 was
used as a single-crystal Si substrate for preparing a first article
and a semiconductor article was produced as in Example 1.
[0202] More specifically, after separating the first article from
the second article in Example 1, the residual porous Si on the
first article was removed by selective etching to obtain a
regenerated substrate. The regenerated single-crystal Si substrate
was then used to prepare a semiconductor article as in Example
1.
[0203] As a result of using a regenerated substrate, the obtained
semiconductor article showed a uniformity of film thickness
comparable to the semiconductor article obtained by using a new
substrate after etching the porous Si and also a root-mean-square
of surface roughness in a 50 .mu.m square area comparable to the
semiconductor article of Example 1 after a heat treatment in an
hydrogen atmosphere at 1,100.degree. C. for 1 hour. When a cross
section of the semiconductor article was observed through a
transmission electron microscope, it was found that no additional
crystal defects had been introduced into the Si layer and an
excellent crystallinity was maintained.
[0204] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 4
[0205] A specimen was prepared as in Example 1 except the following
anodization conditions were used.
[0206] A P.sup.+ high concentration layer with a boron
concentration of 5.times.10.sup.17 to 1.times.10.sup.20/cm.sup.3
was formed to a thickness of 16 .mu.m on the surface of a
resistance-non-specified single-crystal Si substrate by means a
diffusion method. The process of forming the P.sup.+ high
concentration layer by using a diffusion method was conducted in a
manner as described below. Firstly, an Si substrate was placed in a
furnace tube and N.sub.2 gas was introduced into a liquid diffusing
source containing BBr.sub.3 for bubbling. Then, the produced gas
was introduced into the furnace tube with carrier gas of
(N.sub.2+O.sub.2). A B.sub.2O.sub.3 layer was formed by keeping the
temperature in the furnace tube to 1,050.degree. C. for 64 hours.
Thereafter, the substrate was subjected to a so-called drive-in
diffusion process, maintaining the inside of the furnace tube to
1,150.degree. C. for 24 hours, to produce the P.sup.+ high
concentration layer.
7 First stage Current density: 7 (mA .multidot. cm.sup.-2)
Anodizing solution: HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1
Duration: 11 (min.) Thickness of first porous Si layer: 12 .mu.m
Second stage Current density: 20 (mA .multidot. cm.sup.-2)
Anodizing solution: HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1
Duration: 3 (min.) Thickness of second porous Si layer: 3 .mu.m
[0207] As a result of using different current densities, the
porosity of the first porous Si layer was lower than that of the
second porous Si layer.
[0208] A semiconductor article was produced by following the
process as described in Example 1. The bonded wafers were then
separated into two wafers along the second porous Si layer.
[0209] In this example, the film thickness of the formed
single-crystal Si layer showed a uniformity of 201 nm.+-.4 nm. The
root-mean-square of surface roughness in a 50 .mu.m square area of
the obtained semiconductor article was about 0.2 nm after a heat
treatment in an hydrogen atmosphere at 1,100.degree. C. for 1 hour.
When a cross section of the semiconductor article was observed
through a transmission electron microscope, it was found that no
additional crystal defects had been introduced into the Si layer
and an excellent crystallinity was maintained.
[0210] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 5
[0211] A semiconductor article was prepared as in Example 1 except
that the following conditions were used.
[0212] 1) epitaxial Si layer (thickness): 2.05 .mu.m
[0213] 2) thermal oxide film on epitaxial Si layer: 0.1 .mu.m
[0214] 3) second article: Si substrate carrying 1.9 .mu.m SiO.sub.2
layer on the surface
[0215] 4) bonding: The surfaces of two articles were exposed to
nitrogen plasma (to improve the bonding strength), put together
into contact and annealed at 400.degree. C. for 10 hours.
[0216] In this example, a single-crystal Si layer was formed to a
thickness of about 2 .mu.m on the silicon oxide film to produce a
finished semiconductor article.
[0217] The film thickness of the formed single-crystal Si layer
showed a uniformity of 2.00 nm.+-.0.04 .mu.m. The root-mean-square
of surface roughness in a 50 .mu.m square area of the obtained
semiconductor article was about 0.2 nm after a heat treatment in an
hydrogen atmosphere at 1,100.degree. C. for 1 hour. When a cross
section of the semiconductor article was observed through a
transmission electron microscope, it was found that no additional
crystal defects had been introduced into the Si layer and an
excellent crystallinity was maintained.
[0218] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 6
[0219] A semiconductor article was prepared as in Example 1 except
that the following conditions were used.
[0220] 1) second article: quartz substrate
[0221] 2) bonding: The surfaces of two articles were exposed to
nitrogen plasma, put together into contact and annealed at
200.degree. C. for 24 hours.
[0222] 3) thermal treatment in hydrogen: The bonded articles were
then heat-treated in hydrogen at 900.degree. C. for 2 hours. The
surface roughness was evaluated through an atomic force microscope
to find that the root-mean-square of surface roughness in a 50
.mu.m square area of the obtained semiconductor article was about
0.2 nm, which was comparable to commercially available Si
wafers.
[0223] The film thickness of the formed single-crystal Si layer
showed a uniformity of 2.01 nm.+-.0.04 nm, which was same as its
counterpart of Example 1. When a cross section of the semiconductor
article was observed through a transmission electron microscope, it
was found that no additional crystal defects had been introduced
into the Si layer and an excellent crystallinity was
maintained.
[0224] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 7
[0225] A P.sup.+ high concentration layer with a boron
concentration of 5.times.10.sup.17 to 1.times.10.sup.20/cm.sup.3
was formed to a thickness of 10 .mu.m on the surface of a
resistance-non-specified single-crystal Si substrate by means a
diffusion method. The process of forming the P.sup.+ high
concentration layer by using a diffusion method was conducted in a
manner as described below. Firstly, an Si substrate was placed in a
furnace tube and N.sub.2 gas was introduced into a liquid diffusing
source containing BBr.sub.3 for bubbling. Then, the produced gas
was introduced into the furnace tube with carrier gas of
(N.sub.2+O.sub.2). A B.sub.2O.sub.3 layer was formed by keeping the
temperature in the furnace tube to 1,050.degree. C. for 64 hours.
Thereafter, the substrate was subjected to a so-called drive-in
diffusion process, maintaining the inside of the furnace tube to
1,150.degree. C. for 24 hours, to produce the P.sup.+ high
concentration layer. After removing the coat film, the layer was
anodized in an HF solution from the side of the high density
surface.
8 Current density: 7 (mA .multidot. cm.sup.-2) Anodizing solution:
HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1 Duration: 7 (min.)
Thickness of first porous Si layer: 8 .mu.m
[0226] The substrate was then oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour. As a result of the oxidation, the inner
walls of the pores of the porous Si layer were covered by a thermal
oxide film. Then, single-crystal GaAs was made to epitaxially grow
up to 1 .mu.m. on the porous Si layer by MOCVD (metal organic
chemical vapor deposition) under the following conditions.
9 Source gas: TMG / AsH.sub.3 / H.sub.2 Aas pressure: 80 Torr
Temperature: 700.degree. C.
[0227] Thus, a finished first article was prepared. The surface of
the GaAs layer was brought into close contact with the surface of
another Si substrate (second article).
[0228] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0229] Subsequently, the residual porous Si layer left on the
second article was removed by etching, using a mixture solution of
ethylenediamine+pyrocatechol+water (to a ratio of 17 ml:3 g:8 ml)
at 110.degree. C. The single-crystal GaAs was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal GaAs as etching stopper.
[0230] The rate of etching non-porous GaAs single-crystal of the
etching solution is very low so that the effect of etching the
non-porous layer and reducing the film thickness thereof (tens of
several angstroms) was practically negligible.
[0231] Thus, a single-crystal GaAs layer was formed on the silicon
substrate to a thickness of 1 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal GaAs layer was observed at 100 points distributed
over the entire surface of the article to find that it was as
uniform as 1 .mu.m.+-.29.8 nm.
[0232] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the
GaAs layer and an excellent crystallinity was maintained.
[0233] When a Si substrate having an oxide film was used as
supporting substrate, a similar GaAs layer was formed on the
insulation film.
[0234] At the same time, the porous Si left on the first article
was also removed by selective etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal Si was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal Si as etching stopper. Thus, it was
possible to reuse it in a diffusion process to be conducted on a
P.sup.+ high concentration layer as the single-crystal Si substrate
of another first article or in a bonding process as another second
article.
[0235] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0236] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0237] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 8
[0238] A P.sup.+ high concentration layer with a boron
concentration of 5.times.10.sup.17 to 1.times.10.sup.20/cm.sup.3
was formed to a thickness of 10 .mu.m on the surface of a
resistance-non-specified single-crystal Si substrate by means a
diffusion method. The process of forming the P.sup.+ high
concentration layer by using a diffusion method was conducted in a
manner as described below. Firstly, an Si substrate was placed in a
furnace tube and N.sub.2 gas was introduced into a liquid diffusing
source containing BBr.sub.3 for bubbling. Then, the produced gas
was introduced into the furnace tube with carrier gas of
(N.sub.2+O.sub.2). A B.sub.2O.sub.3 layer was formed by keeping the
temperature in the furnace tube to 1,050.degree. C. for 64 hours.
Thereafter, the substrate was subjected to a so-called drive-in
diffusion process, maintaining the inside of the furnace tube to
1,150.degree. C. for 24 hours, to produce the P.sup.+ high
concentration layer. After removing the coat film, a P.sup.+ high
concentration layer was also formed on the rear surface at the same
time. The substrate was anodized in an HF solution from the side of
the high density front surface.
10 Current density: 7 (mA .multidot. cm.sup.-2) Anodizing solution:
HF : H.sub.2O : C.sub.2H.sub.5OH = 1 : 1 : 1 Duration: 7 (min.)
Thickness of 1st porous Si layer: 8 .mu.m
[0239] The substrate was then oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour. As a result of the oxidation, the inner
walls of the pores of the porous Si layer were covered by a thermal
oxide film. Then, single-crystal InP was made to epitaxially grow
up to 1 .mu.m. on the porous Si layer by MOCVD (metal organic
chemical vapor deposition).
[0240] The surface of the InP layer was brought into close contact
with the surface of another quartz substrate (second article) and
annealed at 200.degree. C. for 10 hours.
[0241] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0242] Subsequently, the residual porous Si layer left on the
second article was removed by etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal InP was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal InP as etching stopper.
[0243] The rate of etching non-porous InP single-crystal of the
etching solution is very low so that the effect of etching the
non-porous layer and reducing the film thickness thereof (tens of
several angstroms) was practically negligible. Thus, a
single-crystal InP layer was formed on the quartz substrate to a
thickness of 1 .mu.m to produce a finished semiconductor article.
The film thickness of the formed single-crystal InP layer was
observed at 100 points distributed over the entire surface of the
article to find that it was as uniform as 1 .mu.m.+-.29.8 nm.
[0244] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the InP
layer and an excellent crystallinity was maintained.
[0245] At the same time, the porous Si left on the first article
was also removed by selective etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal Si was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal Si as etching stopper. Thus, it was
possible to reuse it in a diffusion process to be conducted on a
P.sup.+ high concentration layer as the single-crystal Si substrate
of another first article.
[0246] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0247] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0248] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 9
[0249] In this example, the both sides of a single-crystal Si
substrate were subjected to a process same as the one conducted on
a side of a single-crystal Si substrate in Example 1 to prepare a
first article and a pair second articles were bonded to the
respective sides of the first article, which was then separated
along the respective porous layers to produce a pair of
semiconductor articles simultaneously.
[0250] Each of the obtained semiconductor articles showed a
uniformity of film thickness comparable to the semiconductor
article obtained in Example 1 after etching the porous Si and also
a root-mean-square of surface roughness in a 50 .mu.m square area
comparable to the semiconductor article of Example 1 after a heat
treatment in an hydrogen atmosphere at 1,100.degree. C. for 1 hour.
When a cross section of the semiconductor article was observed
through a transmission electron microscope, it was found that no
additional crystal defects had been introduced into the Si layer
and an excellent crystallinity was maintained.
[0251] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 10
[0252] A P.sup.+ high concentration epitaxial Si layer with a boron
concentration of 5.times.10.sup.18/cm.sup.3 was formed to a
thickness of 10 .mu.m on the surface of a resistance-non-specified
single-crystal Si substrate under the following conditions.
11 Gas: SiH.sub.2Cl.sub.2/B.sub.2H.sub.6/H.sub.2 Temperature:
1,150.degree. C. Pressure: 760 Torr Growth rate: 1 .mu.m/min.
[0253] Subsequently, the substrate was anodized in an HF solution
from the side of the high density front surface surface.
12 Current density: 7 (mA .multidot. cm.sup.-2) Anodizing solution:
HF:H.sub.2O:C.sub.2H.sub.5OH = 1:1:1 Duration: 7 (min.) Thickness
of 1st porous Si layer: 8 .mu.m
[0254] The substrate was then oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour. As a result of the oxidation, the inner
walls of the pores of the porous Si layer were covered by a thermal
oxide film. Then, single-crystal Si was made to epitaxially gow at
a rate of 0.3 .mu.m/min. on the porous Si layer by CVD (chemical
vapor deposition) under the following conditions. Prior to the
epitaxial growth process, the surface of the porous Si layer was
heat-treated in 100%H.sub.2 at 1,080.degree. C. to fill the pores
on the surface and produce a smooth surface.
13 Source gas: SiH.sub.2Cl.sub.2/H.sub.2 Gas flow rate: 0.5/180
liter/min. Gas pressure: 80 Torr Temperature: 950.degree. C. Growth
rate: 0.3 .mu.m/min.
[0255] Then, an SiO.sub.2 layer was formed on the surface of the
epitaxially grown Si layer by thermal oxidation to produce a
finished first article. Then, the surface of the SiO.sub.2 layer
was brought into close contact with the surface of another Si
substrate (second article) and the two articles were heat-treated
at 1,000.degree. C. four 1 hour.
[0256] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0257] Subsequently, the residual porous Si layer left on the
second article was removed by selective etching, using a mixture
solution of 49% hydrofluoric acid, 30% hydrogen peroxide and water,
which was stirred constantly. The single-crystal Si was left
unetched, whereas the porous Si was totally removed by the
selective etching, utilizing the single-crystal Si as etching
stopper.
[0258] The rate R1 of etching non-porous Si single-crystal of the
etching solution is very low and the ratio relative to the rate R2
of etching a porous layer is as small as more than 10-5 so that the
effect of etching the non-porous layer and reducing the film
thickness thereof (tens of several angstroms) was practically
negligible.
[0259] Thus, a single-crystal Si layer was formed on the silicon
oxide film to a thickness of 0.2 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal Si layer was observed at 100 points distributed over
the entire surface of the article to find that it was as uniform as
201 nm.+-.4 nm.
[0260] Additionally, the obtained semiconductor article was heat
treated in hydrogen at 1,100.degree. C. for 1 hour. The surface
roughness was evaluated through an atomic force microscope to find
that the root-mean-square of surface roughness in a 50 .mu.m square
area was about 0.2 nm, which was comparable to that of commercially
available Si wafers.
[0261] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the Si
layer and an excellent crystallinity was maintained.
[0262] Similar results were obtained when no oxide film was formed
on the epitaxial Si layer. Further, similar results were obtained
when an oxide film was formed on the second article.
[0263] At the same time, the porous Si left on the first article
was also removed by selective etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal Si was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal Si as etching stopper. Thus, it was
possible to reuse it in an epitaxial growth process to form on a
P.sup.+ high concentration layer as the single-crystal Si substrate
of another first article or in a bonding process as another second
article.
[0264] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0265] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0266] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
EXAMPLE 11
[0267] An SiO.sub.2 layer was formed on the surface of a
resistance-non-specified single-crystal Si substrate. The SiO.sub.2
layer was used as a surface protector film in the subsequent ion
implantation process for preventing any possible surface roughness
from taking place. Then, B.sup.+ ions were implanted by in an ion
implantation process conducted under the following conditions.
[0268] Energy: 200 keV
[0269] Dose: 1.times.10.sup.16 cm.sup.-2
[0270] The substrate was then heat-treated at 1,150.degree. C. for
24 hours to heal the damages caused by the ion implantation and
diffuse boron ions. As a result, a doped layer was formed to a
thickness of 10 .mu.m on the surface of substrate with boron
concentration of 5.times.10.sup.18/cm.sup.3. After removing the
surface SiO.sub.2 layer, the substrate was anodized in an HF
solution from the side of the high density front surface under the
following anodizing conditions.
14 Current density: 7 (mA .multidot. cm.sup.-2) Anodizing solution:
HF:H.sub.2O:C.sub.2H.sub.5OH = 1:1:1 Duration: 7 (min.) Thickness
of 1st porous Si layer: 8 .mu.m
[0271] The substrate was then oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour. As a result of the oxidation, the inner
walls of the pores of the porous Si layer were covered by a thermal
oxide film. Then, single-crystal Si was made to epitaxially grow at
a rate of 0.3 .mu.m/min. on the porous Si layer by CVD (chemical
vapor deposition) under the following conditions. As the surface of
the porous Si layer was exposed to H.sub.2 in a pre-epitaxial
growth step, the pores on the surface were filled to produce a
smooth surface.
15 Source gas: SiH.sub.2Cl.sub.2/H.sub.2 Gas flow rate: 0.5/180
liter/min. Gas pressure: 80 Torr Temperature: 950.degree. C. Growth
rate: 0.3 .mu.m/min.
[0272] Then, an SiO.sub.2 layer was formed on the surface of the
epitaxially grown Si layer by thermal oxidation to produce a
finished first article.
[0273] Then, the surface of the SiO.sub.2 layer was brought into
close contact with the surface of another Si substrate (second
article) and the two articles were heat-treated at 1,000.degree. C.
for 1 hour.
[0274] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer.
[0275] Subsequently, the residual porous Si layer left on the
second article was removed by selective etching, using a mixture
solution of 49% hydrofluoric acid, 30% hydrogen peroxide and water,
which was stirred constantly. The single-crystal Si was left
unetched, whereas the porous Si was totally removed by the
selective etching, utilizing the single-crystal Si as etching
stopper.
[0276] The rate R1 of etching non-porous Si single-crystal of the
etching solution is very low and the ratio relative to the rate R2
of etching a porous layer is as small as more than 10.sup.-5 so
that the effect of etching the non-porous layer and reducing the
film thickness thereof (tens of several angstroms) was practically
negligible.
[0277] Thus, a single-crystal Si layer was formed on the silicon
oxide film to a thickness of 0.2 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal Si layer was observed at 100 points distributed over
the entire surface of the article to find that it was as uniform as
201 nm.+-.4 nm.
[0278] Additionally, the obtained semiconductor article was heat
treated in hydrogen at 1,100.degree. C. for 1 hour. The surface
roughness was evaluated through an atomic force microscope to find
that the root-mean-square of surface roughness in a 50 .mu.m square
area was about 0.2 nm, which was comparable to that of commercially
available Si wafers.
[0279] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the Si
layer and an excellent crystallinity was maintained.
[0280] Similar results were obtained when no oxide film was formed
on the epitaxial Si layer. Further, similar results were obtained
when an oxide film was formed on the second article.
[0281] At the same time, the porous Si left on the first article
was also removed by selective etching, using a mixture solution of
49% hydrofluoric acid, 30% hydrogen peroxide and water, which was
stirred constantly. The single-crystal Si was left unetched,
whereas the porous Si was totally removed by the selective etching,
utilizing the single-crystal Si as etching stopper. Thus, it was
possible to reuse it in a implantation process form a P.sup.+ high
concentration layer as the single-crystal Si substrate of another
first article or in a bonding process as another second
article.
[0282] The micro-roughness on the surface of the single-crystal Si
substrate attributable to micro-pores may be removed by
heat-treating the substrate in hydrogen at 1,100.degree. C. for 1
hour before reusing it. However, such a smoothing process may not
be necessary if the substrate is reused as the Si substrate of
another first article because it is subjected to a
surface-smoothing process when the pores of the porous Si layer
exposed to the surface are sealed during a pre-baking operation
conducted in hydrogen in advance to an epitaxial growth
process.
[0283] The above heat treatment in hydrogen may be replaced by an
operation of smoothing the micro-roughness attributable to
micro-pores, using a surface touch-polish technique.
[0284] When the Si substrate of the first article and the Si
substrate treated by hydrogen were observed for the
surface-roughness both in a micro-region and over a large area
after removing the porous Si, results similar to those of Example 1
were obtained.
[0285] For each of the above examples, the CVD process used for the
epitaxial growth can be replaced by MBE, sputtering, liquid phase
growth or some other appropriate technique. Additionally, the
solution used for selectively etching the porous Si is not limited
to a mixture solution of 49% hydrofluoric acid, 30% hydrogen
peroxide and water as described above and it may be replaced by
hydrofluoric acid, a solution of hydrofluoric acid to which alcohol
is added, a solution of hydrofluoric acid to which alcohol and
hydrogen peroxide are added, a buffered hydrofluoric acid solution
with or without alcohol or hydrogen peroxide added thereto, a
buffered hydrofluoric acid solution to which alcohol and hydrogen
peroxide are added or a solution of a mixture of hydrofluoric acid,
nitric acid and acetic acid because of the tremendously large pore
surface area of the porous Si layer.
[0286] Additionally, the use of a water jet stream in the above
examples for separating bonded articles may be replaced by a
mechanical process using compression, tension or shearing force, a
process of expanding the porous Si layer from the periphery by
oxidation and applying internal pressure to the porous Si layer, a
process of pulsatively heating the porous Si layer and applying
thermal stress to the porous Si layer or a process of softening the
porous Si layer. For separating the wafers by oxidation, thermal
oxidation at 1,000.degree. C. is feasible. For separating the
wafers by heat, irradiation of CO.sub.2 laser pulse with an output
level of 500 to 1,000 W will be recommended. As for separating the
wafers by an electric current, a pulse current of 10 to 100 A may
preferably be used.
[0287] For the purpose of the invention, any of the other steps may
be modified appropriately without departing from scope of the
invention.
EXAMPLE 12
[0288] A P.sup.+ layer was formed to a thickness of 10 .mu.m by
epitaxial growth with a boron concentration of
5.times.10.sup.18/cm.sup.3 on the surface of a p-type
single-crystal Si substrate under the following epitaxial growth
conditions.
16 Source gas: SiHCl.sub.3/H.sub.2/B.sub.2H.sub.6 Gas flow rate: 10
g/min./45 slm/ 60 sccm (1%) Gas pressure: 760 Torr Temperature:
1,100.degree. C. Growth rate: 3.3 .mu.m/min.
[0289] Then, the substrate was subsequently subjected to an
anodization process conducted under the following anodizing
conditions to produce a porous layer comprising two thin layers
having different porosities.
17 First stage Current density: 7 (mA .multidot. cm.sup.-2)
Anodizing solution: HF:H.sub.2O:C.sub.2H.su- b.5OH = 1:1:1
Duration: 5 (min.) Thickness of first porous Si layer: 6 .mu.m
Second stage Current density: 30 (mA .multidot. cm.sup.-2)
Anodizing solution: HF:H.sub.2O:C.sub.2H.su- b.5OH = 1:1:1
Duration: 100 (sec.) Thickness of second porous Si layer: 3
.mu.m
[0290] As a result of using different current densities, the
porosity of the first porous Si layer was lower than that of the
second porous Si layer.
[0291] Then, the substrate was oxidized in an oxygen atmosphere at
400.degree. C. for 1 hour to cover the inner wall of the pores of
the porous Si layer with a thermal oxide film. Subsequently, after
removing the thermal oxide film from the surface of the porous
layer by means of an HF solution, single-crystal Si was made to
epitaxially grow at a rate of 0.3 .mu.m/min. on the porous Si layer
by CVD under the conditions as described below. As the surface of
the porous Si layer was heat-treated at 1,000.degree. C., the pores
of the surface were filled to produce a smooth surface.
18 Source gas: SiH.sub.2Cl.sub.2/H.sub.2 Gas flow rate: 0.5/180
liter/min. Gas pressure: 80 Torr Temperature: 950.degree. C Growth
rate: 0.3 .mu.m/min.
[0292] Then, an SiO.sub.2 layer was formed to a thickness of 200 nm
on the surface of the epitaxial Si layer by thermal oxidation to
produce a finished first article.
[0293] Then, the surface of the SiO.sub.2 layer was brought into
close contact with the Si surface of another Si substrate (second
article) and the two articles were heat-treated at 1,000.degree. C.
four 1 hour.
[0294] When a water jet having a diameter of 0.2 mm was injected
onto a beveled gap along the edge of the bonded wafers, they were
separated into two wafers along the porous Si layer having the
higher porosity.
[0295] Subsequently, the residual porous Si layer having the lower
porosity and left on the second article was removed by selective
etching, using a mixture solution of 49% hydrofluoric acid, 30%
hydrogen peroxide and water, which was stirred constantly. The
transferred single-crystal Si was left unetched, whereas the porous
Si was totally removed by the selective etching, utilizing the
single-crystal Si layer as etching stopper.
[0296] Thus, a single-crystal Si layer was formed on the silicon
dioxide film to a thickness of 0.2 .mu.m to produce a finished
semiconductor article. The film thickness of the formed
single-crystal Si layer was observed at 100 points distributed over
the entire surface of the article to find that it was as uniform as
201 nm.+-.4 nm.
[0297] Additionally, the obtained semiconductor article was heat
treated in 100% hydrogen at 1,100.degree. C. for 1 hour. The
surface roughness was evaluated through an atomic force microscope
to find that the root-mean-square of surface roughness in a 50
.mu.m square area was about 0.2 nm, which was comparable to that of
commercially available Si wafers.
[0298] When a cross section of the semiconductor article was
observed through a transmission electron microscope, it was found
that no additional crystal defects had been introduced into the Si
layer and an excellent crystallinity was maintained.
[0299] At the same time, the porous Si having the higher porosity
and left on the single-crystal Si substrate was also removed by
selective etching, using a mixture solution of 49% hydrofluoric
acid, 30% hydrogen peroxide and water, which was stirred
constantly. The single-crystal Si was left unetched, whereas the
porous Si was totally removed by the selective etching, utilizing
the epitaxially grown P.sup.+ type doped layer as etching
stopper.
[0300] As the P type single-crystal Si substrate carried thereon
the epitaxially grown P.sup.+ type doped layer that had not been
turned to a porous state and was about 1 .mu.m thick, it was
subjected to another epitaxial growth process under the same
conditions to produce an additional P.sup.+ type layer (boron
concentration: 5.times.10.sup.18/cm.sup.3) to a thickness of about
9 .mu.m to make the total thickness of the overall P.sup.+ layer on
the P.sup.+ type single-crystal Si substrate 10 .mu.m, which was
same as the thickness of the first P.sup.+ layer. Thus, by
repeating a same process, a second SOI wafer was obtained.
[0301] As for the surface roughness of the residual P.sup.+ layer
on the first Si substrate after removing the porous layer was less
than 10 nm in a micro-region of a 50 .mu.m square area and the
surface was visually mirror-smooth under fluorescent light over a
large area, or the entire surface area of the wafer.
EXAMPLE 13
[0302] A semiconductor article was prepared as in Example 12 except
the following anodizing conditions were used.
[0303] A P.sup.+ layer was formed to a thickness of 16 .mu.m by
epitaxial growth with a boron concentration of
5.times.10.sup.18/cm.sup.3 on the surface of a P type
single-crystal Si substrate as in Example 12.
19 First stage Current density: 7 (mA .multidot. cm.sup.-2)
Anodizing solution: HF:H.sub.2O:C.sub.2H.su- b.5OH = 1:1:1
Duration: 11 (min.) Thickness of first porous Si layer: 12 .mu.m
Second stage Current density: 20 (mA .multidot. cm.sup.-2)
Anodizing solution: HF:H.sub.2O:C.sub.2H.sub.5OH = 1:1:1 Duration:
3 (min.) Thickness of second porous Si layer: 3 .mu.m
[0304] As a result of using different current densities, the
porosity of the first porous Si layer was lower than that of the
second porous Si layer.
[0305] Subsequently, a semiconductor article was prepared by way of
epitaxial growth, bonding and separation as in Example 12.
[0306] The film thickness of the single-crystal Si layer obtained
in this example was found to be as uniform as 201 nm.+-.4 .mu.m
after the etching operation. After heat-treating the obtained
semiconductor article in hydrogen at 1,100.degree. C. for 1 hour,
the surface roughness of the semiconductor article was evaluated to
find that the root-mean-square of surface roughness in a 50 .mu.m
square area was about 0.2 nm. When a cross section of the
semiconductor article was observed through a transmission electron
microscope, it was found that no additional crystal defects had
been introduced into the Si layer and an excellent crystallinity
was maintained.
[0307] As the P type single-crystal Si substrate carried thereon
the epitaxially grown P type doped layer that had not been turned
to a porous state and was about 1 .mu.m thick, it was subjected to
another epitaxial growth process under the same conditions to
produce an additional P.sup.+ type layer (boron concentration:
5.times.10.sup.18/cm.sup.3) to a thickness of about 9 .mu.m to make
the total thickness of the overall P layer on the P type
single-crystal Si substrate 10 .mu.m, which was same as the
thickness of the first P.sup.+ layer. Thus, by repeating a same
process, a second SOI wafer was obtained.
[0308] As described above in detail, according to the invention,
there is provided a method of manufacturing a semiconductor article
that is substantially free from undulations on the interface of the
porous layer and the substrate and can be separated from a counter
substrate reliably with an enhanced degree of reproducibility. With
a method according to the invention, semiconductor articles can be
manufactured at low cost.
* * * * *