U.S. patent application number 09/982623 was filed with the patent office on 2002-04-25 for multiband portable radio terminal.
Invention is credited to Takagi, Kotaro.
Application Number | 20020049075 09/982623 |
Document ID | / |
Family ID | 18799188 |
Filed Date | 2002-04-25 |
United States Patent
Application |
20020049075 |
Kind Code |
A1 |
Takagi, Kotaro |
April 25, 2002 |
Multiband portable radio terminal
Abstract
The output of a transmitting voltage-controlled oscillator
generated in an offset PLL is used as a signal source for a
variable frequency input side of an image removing mixer for
generating a local oscillation signal for GSM/DCS reception. A
signal obtained by dividing an IF frequency generated by a
transmission intermediate frequency (IF) PLL used for the offset
PLL for generating a transmission frequency signal is employed for
the other input of the image removing mixer. A desired frequency is
thereby generated before the mixers of a demodulator.
Inventors: |
Takagi, Kotaro; (Kanagawa,
JP) |
Correspondence
Address: |
FROMMER LAWRENCE & HAUG LLP
745 FIFTH AVENUE
NEW YORK
NY
10151
US
|
Family ID: |
18799188 |
Appl. No.: |
09/982623 |
Filed: |
October 18, 2001 |
Current U.S.
Class: |
455/553.1 |
Current CPC
Class: |
H04B 1/406 20130101;
H04B 1/005 20130101 |
Class at
Publication: |
455/553 |
International
Class: |
H04B 001/26 |
Foreign Application Data
Date |
Code |
Application Number |
Oct 20, 2000 |
JP |
P2000-320989 |
Claims
What is claimed is:
1. A multiband portable radio terminal compatible with a plurality
of different communication methods and carrying out communication
in a plurality of different frequency bands for the communication
methods, said multiband portable radio terminal comprising: means
for producing a signal of an intermediate frequency for
transmission; first signal generating means for generating a first
signal having a reference frequency for transmission for each of
said plurality of communication methods; second signal generating
means for generating a second signal on the basis of said signal of
the intermediate frequency for transmission; and third signal
generating means for generating a signal of a local oscillation
frequency for reception by subjecting said first signal and said
second signal to predetermined arithmetic; wherein said local
oscillation frequency for reception is equal to a received
frequency corresponding to one of said plurality of communication
methods.
2. A multiband portable radio terminal as claimed in claim 1,
wherein said third signal generating means forms a single image
removing mixer, and said first signal generating means is a signal
source for a first variable frequency input side of the image
removing mixer.
3. A multiband portable radio terminal as claimed in claim 2,
wherein said second signal generating means generates said second
signal by dividing the frequency of said signal of the intermediate
frequency for transmission used by said first signal generating
means to generate a signal of a transmission frequency, and said
second signal generating means is a signal source for a second
variable frequency input side of said image removing mixer.
4. A multiband portable radio terminal as claimed in claim 3,
wherein said intermediate frequency for transmission and a value of
said frequency division are set such that frequency of said second
signal obtained by dividing said intermediate frequency for
transmission becomes equal to a difference between said
transmission frequency and said received frequency.
5. A multiband portable radio terminal as claimed in claim 3,
wherein each of said first signal and said second signal is formed
by signals orthogonal to each other, and as said predetermined
arithmetic, said third signal generating means takes in the
orthogonal signals from said first variable frequency input side
and said second variable frequency input side for multiplication,
and then adds results of the multiplication together to thereby
generate said signal of the local oscillation frequency for
reception.
6. A multiband portable radio terminal as claimed in claim 4,
further comprising: fourth signal generating means for generating a
fourth signal by forming a channel phase-locked loop for each of
said plurality of communication methods; means for multiplying said
first signal and said fourth signal together; and means for
outputting a phase error signal by comparing the phases of a signal
obtained by said multiplication and a predetermined fixed frequency
signal; wherein said first signal generating means forms an offset
phase-locked loop, and the offset phase-locked loop is pulled into
synchronism on the basis of said phase error signal to converge a
system of the phase-locked loop by reversing polarity of said phase
error signal depending on whether said multiband portable radio
terminal is in a first communication mode or in a second
communication mode among said plurality of communication methods so
that when said multiband portable radio terminal is in said first
communication mode, a difference frequency obtained by subtracting
said reference frequency for transmission from frequency of said
fourth signal becomes equal to said fixed frequency, whereas when
said multiband portable radio terminal is in said second
communication mode, a difference frequency obtained by subtracting
the frequency of said fourth signal from said reference frequency
for transmission becomes equal to said fixed frequency.
7. A multiband portable radio terminal as claimed in claim 3,
wherein a buffer amplifier is inserted in a signal path between
said first signal generating means and said image removing
mixer.
8. A multiband portable radio terminal as claimed in claim 7,
wherein when said multiband portable radio terminal is in a period
of transmission, bias power to said buffer amplifier is turned
off.
9. A multiband portable radio terminal as claimed in claim 6,
wherein said plurality of communication methods include a time
division multiple access (TDMA) method and a code division multiple
access (CDMA) method.
10. A multiband portable radio terminal as claimed in claim 9,
wherein said first communication mode is a GSM (Global System for
Mobile Communication) employing a communication form of said TDMA
method.
11. A multiband portable radio terminal as claimed in claim 9,
wherein said second communication mode is a DCS (Digital Cellular
System) employing a communication form of said TDMA method.
Description
BACKGROUND OF THE INVENTION
[0001] The present invention relates to a multiband portable radio
terminal compatible with various mobile communication systems such
as GSM/DCS/UMTS, for example.
[0002] Conventionally, examples using a direct conversion (DCR)
method have been proposed to reduce circuit scale of a radio (RF)
unit in a small portable radio terminal. The DCR contributes to
miniaturization of a portable terminal, as described below, when
used in the portable terminal for communication systems having two
different methods and different frequency bands such as GSM (Global
System for Mobile Communication)/DCS (Digital Cellular System)/UMTS
(Universal Mobile Telecommunications System) to be introduced in
the future.
[0003] FIGS. 4A and 4B are block diagrams showing a comparison
between a heterodyne reception method (FIG. 4A) and a direct
conversion reception (DCR) method (FIG. 4B). An apparatus adopting
the heterodyne reception method requires image removing filters
(band-pass filters) 14 and 15 for avoiding so-called image
interference caused by converting a received frequency f.sub.RF
into an intermediate frequency f.sub.IF. The apparatus is
inevitably large as compared with an apparatus employing the DCR
method which apparatus does not require the image removing
filters.
[0004] When circuit integration of a receiving unit is considered,
components forming an analog front-end chip 12 in the heterodyne
reception method as shown in FIG. 4A can be distributed into an RF
chip 17 and a baseband chip 18 in the DCR method as shown in FIG.
4B. Therefore, the DCR method can reduce increase in chip area in
integrating the components into integrated circuits (ICs).
[0005] However, when a direct-current (DC) offset component
produced by DCR is outputted in a receiver-detected output (that
is, baseband (BB) signal), a narrow-band digital modulation method
used in the GSM and the DCS makes it impossible to use a circuit
for controlling the DC offset by DC feedback. This is because such
a controlling circuit cuts off low frequencies, thus resulting in a
loss of part of the demodulated signal data. The DC offset is
caused by a received signal frequency and a local oscillation
frequency being equal to each other in DCR.
[0006] FIG. 5 is a diagram of assistance in explaining a mechanism
of DC offset occurrence in DCR. Since a received RF signal and a
local oscillation signal in a DCR receiving circuit have the same
frequency (f.sub.RF=f.sub.LO), an I and a Q baseband signal 25 and
26 orthogonal to each other are obtained as outputs.
[0007] At the same time, however, the signal of the local
oscillation frequency f.sub.LO leaks to a circuit in a different
section along a path as indicated by a broken line in FIG. 5, and
then mixed with the received RF signal because of nonlinearity of
the circuits (this is referred to as self-mixing). As a result, a
DC component is superimposed on the baseband (BB) I/Q output. The
DC component is an undesired component for baseband data, and may
be considered equivalent to noise.
[0008] Leakage paths of the local oscillation signal include
various modes such for example as the local oscillation signal
being routed through a substrate forming the receiving chip and
then another circuit block to a received signal input section, the
signal being routed on a printed board mounted with the chip, a
signal coming into an antenna 21 via space being mixed with the
received signal, or a combination of these.
[0009] Moreover, when the DC offset component is too significant,
the offset is superimposed on DC bias voltage of the circuit and
consequently its operating point is shifted to the power or ground
potential. This may cause malfunction.
[0010] For such reasons, examples in which DCR is put to practical
use are very few and substantially limited to systems that do not
require demodulation of a DC component, that is, systems that
employ a modulation method enabling DC offset compensation by DC
feedback as mentioned earlier. Thus, in order to realize DCR in
systems using narrow-band modulation such as GSM and DCS, measures
to prevent the routing of the local oscillation signal to the RF
input as described above are essential.
[0011] Incidentally, for the latest technical trend and the like of
the direct conversion reception (DCR), see a paper "A Novel
Approach to DCR receivers for TDMA Applications" (MWE '99), for
example.
[0012] FIG. 6 is a block diagram showing an example of a
configuration, according to a related art, for obtaining a local
oscillation frequency for DCR from an offset oscillation frequency
using an image removing mixer. In this example shown in FIG. 6, a
frequency offset is provided for the local oscillation frequency,
and a frequency required for DCR is obtained by a regenerative
frequency divider immediately before a quadrature demodulator.
[0013] A channel PLL loop unit 34 in the configuration shown in
FIG. 6 generates a signal of a channel frequency used in GSM/DCS
mode. Specifically, the channel PLL loop unit 34 outputs a signal
of an oscillation frequency shown in a frame 39 in FIG. 6 as a
transmission and reception reference oscillation signal for GSM/DCS
mode. The transmission and reception reference oscillation signals
are sent to an offset PLL loop unit 35 and a regenerative frequency
divider block 33, which will be described later.
[0014] A fixed PLL loop unit 36 generates an IF frequency signal of
760 MHz (2*f.sub.IF=760 MHz), and then supplies the signal to a
quadrature modulator (GSM/DCS) 37. The quadrature modulator
(GSM/DCS) 37 converts the IF frequency signal of 760 MHz from the
fixed PLL loop unit 36 into IF frequency signals of 380 MHz
orthogonal to each other, and then supplies the IF frequency
signals to mixers 37-2 and 37-3.
[0015] The mixers 37-2 and 37-3 mix the thus converted IF frequency
signals with an I and a Q baseband signal from a baseband
processing unit not shown in the figure, thereby performing
quadrature modulation. Then, the modulated signal is supplied to a
phase comparator 35a within the offset PLL loop unit 35.
[0016] The phase comparator 35a compares the phase of an output
from a low-pass filter 35b with the phase of the quadrature
modulated signal of 380 MHz inputted from the quadrature modulator
37. Voltage-controlled oscillators VCOs 35-4 and 35-3 generate an
oscillation frequency f.sub.TX.sub..sub.--.sub.D for DCS
transmission and an oscillation frequency
f.sub.TX.sub..sub.--.sub.G for GSM transmission, respectively, on
the basis of a result of the comparison.
[0017] In the meantime, the regenerative frequency divider block 33
divides the frequency of the reference oscillation signal from the
channel PLL loop unit 34. Specifically, a signal divided in
frequency into 4/3
((4/3).times.f.sub.fLO.sub..sub.--.sub.RX.sub..sub.--.sub.D) is
sent to an LNA+quadrature demodulator (DCS) 31, and a signal
divided in frequency into 2/3
((2/3).times.f.sub.fLO.sub..sub.--.sub.RX.sub..sub.--.- sub.G) is
sent to an LNA+quadrature demodulator (GSM) 32.
[0018] Thus, in the example of the configuration, according to the
related art, shown in FIG. 6, a local oscillation signal appears
only in the output of the regenerative frequency divider 33, and
therefore the routing as shown with reference to FIG. 5 can be
prevented.
[0019] However, in multi-slot mode, which is a service to be newly
started in the GSM system, the speed of switching between
transmission and reception needs to be increased more than that of
the method according to the related art. The switching between
transmission and reception in the method, according to the related
art, shown in FIG. 6 is limited by time required for convergence of
the PLL (phase-locked loop) (also referred to as settling
time).
[0020] The multi-slot mode will be briefly described in the
following. FIGS. 7A, 7B, and 7C show an example of timing of
switching between transmission and reception required in multi-slot
mode. In this example, four slots are used for reception and one
slot is used for transmission. While usual GSM/DCS uses one slot
for each of the transmission and reception, the multi-slot mode
allows use of a plurality of slots of TDMA (time division multiple
access), as shown in FIGS. 7A, 7B, and 7C, for purposes of
downloading a large amount of data.
[0021] A period indicated as "Tadj" in FIG. 7A is a time period
required for measuring power of a received signal from an adjacent
base station. The time period is determined primarily by baseband
processing algorithm and processing speed of a chip used (in many
cases, digital signal processor (DSP)), and generally represents a
time corresponding to about one slot. During this time period, the
receiving system needs to switch to a frequency of the adjacent
base station, that is, another channel rather than to a frequency
emitted by a camping base station. A method of calculating the time
will be described with reference to FIGS. 7A, 7B, and 7C.
[0022] According to GSM standards (ETSI), an interval between the
period of reception and the period of transmission in the above
case needs to be within two slots. The standards also require that
a base station in a service area with a maximum radius of 30 Km be
assumed. Therefore, the terminal needs to make a transmission in
timing advanced by a time required for round-trip radio propagation
for about 60 Km, that is, a time of:
(30.times.10.sup.3[m].times.2)/(3.times.10.sup.8[m/sec]).apprxeq.232.6
[.mu.sec]=63 bits (length of one bit.apprxeq.3.6923 [.mu.sec])
[0023] This is referred to as timing advance and corresponds to a
time indicated as "Tadv" in FIG. 7B.
[0024] Also, the following relations hold in FIGS. 7A, 7B, and
7C:
[0025] T1=T2=(two slots-Tadv-Tadj)/2
[0026] T3=one slot+Tadv
[0027] Thus, the time required for switching from RX to TX can be
calculated approximately as:
[0028] (two-slot
time-Tadj-Tadv)/2=(577.times.2-577-232.6)/2.apprxeq.170
[.mu.sec]
[0029] This represents a high speed as compared with a
specification, according to the related art, of about 500
[.mu.sec]. Therefore it is extremely difficult to realize the high
speed by the circuit configuration shown in FIG. 6.
SUMMARY OF THE INVENTION
[0030] The present invention has been made in view of the above
problems, and it is accordingly an object of the present invention
to provide a multiband portable radio terminal that is compatible
with GSM/DCS multi-slot mode and can avoid the problem of a DC
offset in the direct conversion reception (DCR) method.
[0031] It is another object of the present invention to provide a
multiband portable radio terminal that is compatible with the above
multi-slot mode and makes it possible to reduce the scale of a
circuit necessary for avoiding the problem of a DC offset and thus
reduce chip size when realizing an integrated circuit (IC).
[0032] In order to achieve the above objects, according to the
present invention, there is provided a multiband portable radio
terminal compatible with a plurality of different communication
methods and carrying out communication in a plurality of different
frequency bands for the communication methods, the multiband
portable radio terminal comprising: means for producing a signal of
an intermediate frequency for transmission; first signal generating
means for generating a first signal having a reference frequency
for transmission for each of the plurality of communication
methods; second signal generating means for generating a second
signal on the basis of the signal of the intermediate frequency for
transmission; and third signal generating means for generating a
signal of a local oscillation frequency for reception by subjecting
the first signal and the second signal to predetermined arithmetic;
wherein the local oscillation frequency for reception is equal to a
received frequency corresponding to one of the plurality of
communication methods.
[0033] Thus, by subjecting the first signal and the second signal
to predetermined arithmetic and thereby generating the signal of
the local oscillation frequency for reception equal to the
frequency of a received signal, the third signal generating means
functions to control occurrence of a DC offset.
[0034] Preferably, in the multiband portable radio terminal
according to the present invention, the third signal generating
means forms a single image removing mixer, while the first signal
generating means is a signal source for a first variable frequency
input side of the image removing mixer.
[0035] In addition, preferably, the second signal generating means
generates the second signal by dividing the frequency of the signal
of the intermediate frequency for transmission used by the first
signal generating means to generate a signal of a transmission
frequency, and the second signal generating means is a signal
source for a second variable frequency input side of the image
removing mixer.
[0036] Thus, since the single image removing mixer is used and the
output of a transmitting voltage-controlled oscillator (VCO) is
used for one input of the single image removing mixer, it is
possible not only to reduce circuit scale but also to eliminate the
need for changing the frequency of a VCO between a period of
transmission and a period of reception. Therefore, time required
for switching between transmission and reception is not subject to
settling time of a channel PLL.
BRIEF DESCRIPTION OF THE DRAWINGS
[0037] FIG. 1 is a block diagram showing general configuration of a
communication terminal according to an embodiment of the present
invention;
[0038] FIG. 2 is a block diagram showing details of configuration
of an RF receiving processing unit of the terminal according to the
embodiment of the present invention;
[0039] FIG. 3 is a block diagram showing details of configuration
of an RF transmitting processing unit of the terminal according to
the embodiment of the present invention;
[0040] FIGS. 4A and 4B show a comparison between heterodyne
reception and direct conversion reception (DCR);
[0041] FIG. 5 is a diagram of assistance in explaining a mechanism
of DC offset occurrence in DCR;
[0042] FIG. 6 is a block diagram showing an example of a
configuration, according to a related art, for obtaining a local
oscillation frequency for DCR from an offset oscillation frequency;
and
[0043] FIGS. 7A, 7B, and 7C are diagrams showing an example of
timing of switching between transmission and reception required in
multi-slot mode.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0044] Preferred embodiments of the present invention will
hereinafter be described in detail with reference to the
accompanying drawings. FIG. 1 is a block diagram showing general
configuration of a communication terminal according to an
embodiment of the present invention. The terminal shown in FIG. 1
is a multiband portable telephone apparatus (multiband portable
radio terminal) that operates in three modes: GSM (also referred to
as Pan-European digital cellular telephone system) mode, DCS mode,
and UMTS (WCDMA) mode. Thus, the terminal can be used as a
multiband system terminal compatible with both services of a TDMA
system and a CDMA system.
[0045] An RF signal received by an antenna 511 of the terminal
shown in FIG. 1 is passed through a signal path formed by filters
(band-pass filters) and switches (S/W) switched according to the
above-mentioned modes, and then inputted to an RF receiving
processing unit 501 that functions as a received signal processing
unit. Details of configuration and concrete operation of the RF
receiving processing unit 501 will be described later.
[0046] A receiving baseband processing unit A (551) and a receiving
baseband processing unit B (552) are arranged for GSM/DCS and UMTS,
respectively, in a stage succeeding the RF receiving processing
unit 501. The receiving baseband processing unit A (551) and the
receiving baseband processing unit B (552) subject quadrature
baseband signals (an I and a Q signal) generated by the RF
receiving processing unit 501 to predetermined digital baseband
processing. Specifically, the receiving baseband processing units A
and B have an A/D converter or the like for subjecting the I and Q
signals to analog/digital (A/D) conversion to thereby generate IQ
digital data having a constant bit rate.
[0047] As in the receiving system, a transmitting system is
provided with a transmitting baseband processing unit C (553) and a
transmitting baseband processing unit D (554) for GSM/DCS and UMTS,
respectively. The transmitting baseband processing units are
supplied with IQ digital data having a constant data rate which
data is integrated by a digital signal processor (DSP) 565, which
will be described later.
[0048] The data is subjected to digital/analog (D/A) conversion by
the transmitting baseband processing units C and D, and then
inputted to an RF transmitting processing unit 502 as transmitting
baseband signals (I and Q signals). Details of configuration and
operation of the RF transmitting processing unit 502 will be
described later with reference to another drawing.
[0049] After being subjected to quadrature modulation and frequency
conversion, which will be described later, by the RF transmitting
processing unit 502, the signals are subjected to power
amplification by power amplifiers (PA) to obtain required
transmitting power, and then emitted from the antenna 511 via
filters and switches switched according to the above-mentioned
modes.
[0050] A VC-TCXO 535 is a variable-frequency temperature-controlled
crystal oscillator, and in this case, the VC-TCXO 535 generates a
reference frequency (13.00 MHz) required for transmitting and
receiving processing to be described below.
[0051] The DSP 565 connected to a data bus 591 performs processing
such as removing effects of fading, determining the type of a
signal received, de-interleaving, error correction, and appropriate
decoding processing. Compressed audio data is decompressed and
decoded by the DSP 565, and then subjected to digital/analog (D/A)
conversion by an audio D/A 561 according to a predetermined audio
sampling rate. The D/A-converted analog signal is emitted as sound
from a speaker not shown in the figure.
[0052] On the other hand, voice of a terminal user or the like
converted into an analog audio signal by a microphone not shown in
the figure is subjected to signal amplification by a microphone
amplifier not shown in the figure, and then subjected to A/D
conversion by an audio A/D 562 at an appropriate sampling rate to
be thereby digitized. The thus digitized signal is encoded and
compressed by the DSP 565.
[0053] The DSP 565 integrates digital data inputted from a data I/F
unit not shown in the figure into appropriate blocks, and
integrates the audio encoded data and communication data into the
IQ digital data having a constant data rate. The thus integrated
signal is the transmitting baseband signals (I and Q signals)
described above.
[0054] A CPU bus 595 is connected with a central processing unit
(CPU) 571 for controlling the whole of the terminal (including
ON/OFF control of a voltage-controlled oscillator to be described
later), a read-only memory (ROM) 572 and the like. The ROM 572
stores a program, and the like, to be executed by the CPU 571. A
random access memory (RAM) 573 is used to store data and the like
during calculation as required while the CPU 571 is executing a
program, and to temporarily store data when the data is moved
between a receiving unit and a transmitting unit.
[0055] Incidentally, an EEPROM, or an electrically erasable memory,
may be provided to the CPU bus 595 to store setting parameters of
setting conditions immediately before turning off the terminal, for
example, so that even after the terminal is turned off, the same
settings as before can be obtained when the terminal is turned on
the next time.
[0056] General flow of a signal in the receiving system of the
terminal will hereinafter be described in more detail with
reference to FIGS. 1 and 2. FIG. 2 shows details of internal
configuration of the RF receiving processing unit 501 shown in FIG.
1, and terminal reference letters a, b, c, . . . in FIG. 2
represent connections to the RF signal input stage mentioned above,
the receiving baseband processing units 551 and 552, and the RF
transmitting processing unit 502.
[0057] A received RF signal is inputted to a radio-frequency switch
(S/W) 512 via the antenna 511 shown in FIG. 1. The switch 512
selects signal paths depending on whether the receiver (terminal)
is in GSM/DCS system mode or UMTS (WCDMA) system mode.
[0058] The received signal is fed to a radio-frequency switch 513
when the terminal is in GSM or DCS mode, and fed to a duplexer 516
when the terminal is in UMTS mode. The GSM/DCS signal is further
routed to a GSM path or a DCS path by the switch 513.
[0059] More specifically, the received RF signal is fed to a
radio-frequency switch 514 when the terminal is in GSM mode, and is
fed to a radio-frequency switch 515 when the terminal is in DCS
mode. The radio-frequency switches 514 and 515 change paths for
transmission/reception.
[0060] A case where the terminal is in GSM mode will be described
below. During a period of received slots Rx shown in FIGS. 7A, 7B,
and 7C while the terminal is in GSM mode, the input RF signal is
fed to a variable gain low noise amplifier 601 in FIG. 2 via a
band-pass filter 521. During a transmitting slot period, an output
of a power amplifier (PA) 528 in FIG. 1 is fed through an isolator
525 and a band-pass filter 524 to a radio-frequency switch 514 in a
direction opposite from that of the receiving period.
[0061] The received signal is amplified by the variable gain low
noise amplifier 601, and then inputted to a quadrature demodulator
comprising frequency mixers 603 and 604 and a polyphase filter 605
to be multiplied by a local oscillation frequency. The variable
gain low noise amplifier 601 performs processing such as necessary
band limitation and automatic gain control (AGC) so that the
received signal is at a proper level. The polyphase filter 605 has
a function of creating local oscillation signals orthogonal to each
other.
[0062] In this case, direct conversion is realized by rendering the
local oscillation frequency equal to the received RF frequency.
Specifically, the local oscillation frequency f.sub.LO is
f.sub.Lo=f.sub.VCO.sub..sub.-- -.sub.GSM-f.sub.IF=925 to 960 MHz.
Thus, I/Q quadrature baseband (BB) signals are obtained from
outputs of the frequency mixers 603 and 604.
[0063] The BB signals are passed through variable gain amplifiers
606 and 607 and low-pass filters 608 and 609 to remove an
interfering signal in a band other than that of the working
frequencies, such as an adjacent channel. Thereafter, the BB
signals are sent to the receiving baseband processing unit A (551),
which is a baseband digital processing circuit, as shown in FIG.
1.
[0064] The variable gain low noise amplifier 601 and the variable
gain amplifiers 606 and 607 are controlled for digital processing
in the receiving baseband processing unit such that signal
amplitude of the A/D converter inputs is constant. This enables an
input dynamic range of the A/D converter to be kept constant at all
times.
[0065] The same processing as that of GSM is performed in a DCS
signal path. Specifically, the received signal is amplified by a
variable gain low noise amplifier 602, and the signal after the
amplification is inputted to a quadrature demodulator comprising
frequency mixers 611 and 612 and a polyphase filter 613. BB signals
obtained by multiplying the signal by a local oscillation frequency
in the quadrature demodulator are passed through the variable gain
amplifiers 606 and 607 and the low-pass filters 608 and 609 as in
the case of GSM, and thereafter the BB signals are sent to the
receiving baseband processing unit.
[0066] In UMTS mode, on the other hand, the received RF signal is
separated from a transmitting signal by the duplexer 516, and then
fed to a variable gain low noise amplifier 642 in FIG. 2. At the
same time, the contiguous transmitting signal is fed toward the
radio-frequency switch 512 via the duplexer 516. Unlike the cases
of GSM/DCS described above, a high-speed switch is not used because
WCDMA is a continuous transmission and reception system. Therefore,
such arrangement is inevitably used because of characteristics of
the system.
[0067] As in the case of GSM/DCS, the received RF signal in UMTS
mode is amplified by a variable gain low noise amplifier (in this
case the amplifier 642), and then fed to a quadrature demodulator
comprising frequency mixers 631 and 632 and a polyphase filter 633.
As a result, a baseband (BB) I/Q signal is obtained as output of
the frequency mixers 631 and 632. These signals are then inputted
via low-pass filters 622 and 624 to variable gain amplifiers 643
and 644 to be controlled to a constant amplitude. Thereafter, the
signals controlled in amplitude are sent to an A/D converter (not
shown) included in the receiving baseband processing unit B (552)
in a succeeding stage.
[0068] UMTS mode is different from GSM/DCS mode in that in UMTS
mode, DC feedback is obtained by DC amplifiers 621 and 623 from the
outputs of the circuits comprising the low-pass filters and the
variable gain amplifiers. This is because the band of a WCDMA
signal is 2 MHz, which is sufficiently broader than 200 KHz of
GSM/DCS, and therefore information included in the signal is not
lost very much even when low frequencies are removed by the DC
feedback.
[0069] Generally, cutoff frequencies in a low band are about 2 KHz.
In GSM/DCS, loss of 2 KHz of low frequencies renders normal
reception impossible. This indicates that in a WCDMA system, DC
offset canceling can be realized by a relatively simple circuit as
shown in FIG. 2, but the DC offset canceling is difficult in
GSM/DCS.
[0070] Thus, in UMTS mode, no offset frequency for reducing a DC
offset is used, and a voltage-controlled oscillator 653 can be
oscillated at an oscillation frequency equal to the frequency of
the received RF signal (2110 to 2170 MHz).
[0071] The transmitting system of the terminal will next be
described by following flow of a signal therein. FIG. 3 shows
details of configuration of the RF transmitting processing unit 502
shown in FIG. 1, and terminal reference letters d, e, f, . . . in
FIG. 3 represent connections to the RF signal transmitting stage,
the transmitting baseband processing units 553 and 554, and the RF
receiving processing unit 501.
[0072] When the terminal is in GSM (DCS) mode, an I/Q signal is
sent from the transmitting baseband processing unit C (553) to the
RF transmitting processing unit 502. Specifically, the I and Q
signals are fed to a quadrature modulator comprising frequency
mixers 703 and 704 and a frequency divider 705 via low-pass filters
701 and 702 shown in FIG. 3.
[0073] The frequency divider 705 is supplied with a signal obtained
by dividing a signal from a fixed PLL 710 (for generating a fixed
frequency of 720 MHz in GSM and a fixed frequency of 760 MHz in
DCS) by means of a frequency divider 715. Thus, two signals
orthogonal to each other and having a frequency of 360 MHz (in GSM)
(380 MHz in DCS) are obtained as outputs of the frequency divider
705.
[0074] Consequently, an IF signal of 360 MHz (380 MHz) resulting
from quadrature modulation with baseband (BB) signals is obtained
from an output of the above-mentioned quadrature modulator. The IF
signal is sent to a phase comparator (PFD) 725 via a low-pass
filter 720 and a radio-frequency amplifier 721.
[0075] During GSM mode, a voltage-controlled oscillator 741 for GSM
is operating (ON), while other voltage-controlled oscillators 742
and 743 are stopped (OFF). During DCS mode, the voltage-controlled
oscillator 742 for DCS is ON, while the other voltage-controlled
oscillators 741 and 743 are OFF. An output from the
voltage-controlled oscillator 741, for example, is multiplied by a
frequency mixer 727 by a signal from a channel PLL
voltage-controlled oscillator 652 for GSM shown in FIG. 2.
[0076] When a channel PLL 651 is controlled such that the
oscillation frequency for GSM/DCS of the voltage-controlled
oscillator 652 in this case is
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM=1240 to 1275
MHz
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.DCS=1330 to 1405 MHz
(1)
[0077] then frequencies representing a sum of and a difference
between the f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM
(f.sub.CH.sub..sub.--.sub- .TX.sub..sub.--.sub.DCS) and the
oscillation frequency f.sub.TX.sub..sub.--.sub.GSM=880 to 915 MHz
(f.sub.TX.sub..sub.--.sub.DCS- =1710 to 1785 MHz) of the
voltage-controlled oscillator 741 are obtained as output from the
frequency mixer 727.
[0078] Thus, a signal having frequencies of
.vertline.f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM.+-.f.sub.TX.sub.-
.sub.--.sub.GSM.vertline.
.vertline.f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.DCS.+-.f.sub.TX.sub.-
.sub.--.sub.DCS.vertline. (2)
[0079] is fed to a low-pass filter 726.
[0080] When the cutoff frequency of the low-pass filter 726 is
appropriately selected, the higher of the two frequencies is
removed, and only the frequency of
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM-f.sub.TX.sub..sub.--.sub.G-
SM
f.sub.TX.sub..sub.--.sub.DCS-f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.D-
CS (3)
[0081] is inputted to the phase comparator 725.
[0082] The phase comparator 725 compares the signal having the
frequency of the above (3) with the above-mentioned IF signal
having a frequency of 360 MHz (GSM) (380 MHz (DCS)), and then
outputs a resulting phase error to a loop filter 731. The loop
filter 731 integrates the inputted phase error component to convert
into a DC voltage, and then applies the DC voltage to a control
terminal of the voltage-controlled oscillator 741 (GSM)
(voltage-controlled oscillator 742 in DCS).
[0083] In the thus formed loop, the frequencies of the two input
signals of the phase comparator converge to be equal to each other,
and consequently:
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM-f.sub.TX.sub..sub.--.sub.G-
SM=360 MHz
f.sub.TX.sub..sub.--.sub.DCS-f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.D-
CS=380 MHz (4)
[0084] When polarity of the phase comparator 725 in GSM and DCS is
set such that the left side of the above (4) becomes a positive
value, the system of an offset PLL 750 (a part enclosed by a dotted
line in FIG. 3) converges. However, it is to be noted that when the
polarity of the phase comparator 725 is reversed, the system
diverges and therefore the frequency of the voltage-controlled
oscillator 741 (GSM) (voltage-controlled oscillator 742 in DCS)
will not be fixed. Incidentally, the polarity of the phase
comparator 725 is set according to a polarity control signal from
the CPU 571 mentioned above.
[0085] When the equations (1) are substituted into the equations
(4), the following is obtained:
f.sub.TX.sub..sub.--.sub.GSM=f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.G-
SM-360 MHz=880 to 915 MHz
f.sub.TX.sub..sub.--.sub.DCS=f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.D-
CS+380 MHz=1710 to 1785 MHz (5)
[0086] Thus, the oscillation frequency of the voltage-controlled
oscillator 741 (GSM) (voltage-controlled oscillator 742 in DCS)
becomes equal to the transmission frequency of GSM (DCS).
[0087] Incidentally, for effecting GMSK (Gaussian-filtered Minimum
Shift Keying) modulation used in GSM/DCS, constants of the loop
filter need to have a cutoff frequency sufficiently higher than the
modulation rate.
[0088] In UMTS mode, on the other hand, the same operation as in
GSM/DCS is performed. In this case, since the frequency to be
created by the channel PLL is relatively close to that of DCS, the
same voltage-controlled oscillator can be used. The operation in
UMTS mode will be described below.
[0089] In UMTS mode, the modulator comprising the low-pass filters
701 and 702, the frequency mixers 703 and 704, and the frequency
divider 705 in FIG. 3 is not used as a modulator. For example, by
turning off the frequency mixer 704 and adding Vbias and 0 V to I
channel differential input, the frequency mixer 703 operates as a
cascaded amplifier.
[0090] In UMTS mode, a signal generated by the fixed PLL 710 is
divided into 1/4 via the frequency divider 715 and the frequency
divider 705. The signal of 190 MHz after the frequency division is
fed to the phase comparator 725 via the frequency mixer 703, the
low-pass filter 720, and the radio-frequency amplifier 721. The
signal of 190 MHz is a non-modulated signal, unlike that in GSM/DCS
mode
[0091] During UMTS mode, the voltage-controlled oscillator 743 for
UMTS is ON, while the other voltage-controlled oscillators 741 and
742 are OFF. An output from the voltage-controlled oscillator 743
is multiplied by the frequency mixer 727 by a signal from the
channel PLL voltage-controlled oscillator 653 for UMTS (see FIG.
2).
[0092] When the channel PLL 651 is controlled such that the
oscillation frequency of the voltage-controlled oscillator 653 in
this case is
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.UMTS=2110 to 2170 MHz
(6)
[0093] then frequencies representing a sum of and a difference
between the f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.UMTS and
the oscillation frequency f.sub.TX.sub..sub.--.sub.UMTS=1920 to
1980 MHz of the voltage-controlled oscillator 743 are obtained as
output from the frequency mixer 727.
[0094] Thus, a signal having frequencies of
.vertline.f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.UMTS.+-.f.sub.TX.sub-
..sub.--.sub.UMTS.vertline. (7)
[0095] is fed to the low-pass filter 726. When the cutoff frequency
of the low-pass filter 726 is appropriately selected, the higher of
the two frequencies is removed, and only the frequency of
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.UMTS-f.sub.TX.sub..sub.--.sub.-
UMTS (8)
[0096] is obtained.
[0097] The thus obtained signal is inputted to the phase comparator
725. The phase comparator 725 compares the inputted signal with the
above-mentioned IF signal (signal having a frequency of 190 MHz),
and then outputs a resulting phase error to a loop filter 732. The
loop filter 732 integrates the phase error component to convert
into a DC voltage. The voltage is applied to a control terminal of
the voltage-controlled oscillator 743.
[0098] In the thus formed loop, the frequencies of the two input
signals of the phase comparator 725 converge to be equal to each
other, and consequently:
f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.GSM-f.sub.TX.sub..sub.--.sub.U-
MTS=190 MHz (9)
[0099] When the equation (6) is substituted into the equation (9),
the following is obtained:
f.sub.TX.sub..sub.--.sub.UMTS=f.sub.CH.sub..sub.--.sub.TX.sub..sub.--UMTS--
190 MHz=1920 to 1980 MHz (10)
[0100] Thus, the oscillation frequency of the voltage-controlled
oscillator 743 becomes equal to the transmission frequency of
UMTS.
[0101] In UMTS mode, the output signal from the voltage-controlled
oscillator 743 is inputted to a polyphase filter 754 via a variable
gain amplifier 753. The polyphase filter 754 forms a UMTS (WCDMA)
quadrature modulation unit in conjunction with frequency mixers 761
and 762. Thus, an I and a Q baseband signal sent from the baseband
processing unit 554 to the frequency mixers 761 and 762 via
low-pass filters 751 and 752 are mixed by the frequency mixers 761
and 762 with signals orthogonal to each other outputted from the
polyphase filter 754.
[0102] A signal resulting from such quadrature modulation is
inputted to a power amplifier (PA) 530 via a variable gain
amplifier 781 and a band-pass filter 533. Then, an output from the
power amplifier 530 is fed through an isolator 527 to the duplexer
516.
[0103] Generation of local oscillation frequency for reception will
next be described. As described above, in UMTS (or WCDMA), a DC
offset compensating circuit can be realized by an analog circuit.
Therefore, even when a local oscillation frequency signal leaks to
the input side of the variable gain low noise amplifier 642 (FIG.
2), for example a transmission line connected to the duplexer 516,
a compensating circuit formed by the DC amplifiers 621 and 623 can
remove a DC offset. Thus, it is not necessary to set the
oscillation frequency of the voltage-controlled oscillator 653 to a
frequency different from that of a received RF signal.
[0104] As expressed by the equation (6), the oscillation frequency
of the voltage-controlled oscillator 653 is equal to received
frequency in a UMTS band:
f.sub.RX.sub..sub.--.sub.UMTS=f.sub.CH.sub..sub.--.sub.RX.sub..sub.--.sub.-
UMTS=f.sub.CH.sub..sub.--.sub.TX.sub..sub.--.sub.UMTS=2110 to 2170
MHz
[0105] In GSM (DCS), on the other hand, a DC offset needs to be
reduced as much as possible, and hence the voltage-controlled
oscillator 652 needs to be oscillated at a frequency different from
received frequency. Thus, the oscillation frequency of the
voltage-controlled oscillator 652 during slot reception is set to
the same frequency as in transmission (TX).
[0106] Specifically, the oscillation frequency of the
voltage-controlled oscillator 652 is set as follows:
f.sub.CH.sub..sub.--.sub.RX.sub..sub.--.sub.GSM=f.sub.CH.sub..sub.--.sub.T-
X.sub..sub.--.sub.GSM=1240 to 1275 MHz
f.sub.CH.sub..sub.--.sub.RX.sub..sub.--.sub.DCS=f.sub.CH.sub..sub.--.sub.T-
X.sub..sub.--.sub.DCS=1330 to 1405 MHz
[0107] As shown by the equations (5), the frequency obtained by
this signal and the transmitting offset PLL system is equal to the
transmission frequency of GSM (DCS):
f.sub.TX.sub..sub.--.sub.GSM=880 to 915 MHz
f.sub.TX.sub..sub.--.sub.DCS=1710 to 1785 MHz (11)
[0108] During a period of reception in GSM (DCS) (arrangements for
DCS will hereinafter be indicated with parentheses), the power
amplifier 528 (power amplifier 529) is turned off, and an
oscillation signal of the transmitting voltage-controlled
oscillator 741 (voltage-controlled oscillator 742) is inputted to a
polyphase filter 655 (polyphase filter 656) via a buffer amplifier
665 in FIG. 2.
[0109] The filters separate the signal inputted thereto into two
signals orthogonal to each other. The signals are inputted to
frequency mixers 661 and 662 via a buffer amplifier 657 (buffer
amplifier 659) and a buffer amplifier 658 (buffer amplifier 660),
respectively.
[0110] In the meantime, a fixed signal of 720 MHz (760 MHz)
generated by the fixed PLL 710 and a voltage-controlled oscillator
712 in FIG. 3 is divided in frequency into 1/2 by the frequency
divider 715 (1/1 frequency divider in this case) and the frequency
divider 705, and then inputted to a frequency divider 641 in FIG.
2. The frequency divider 641 further divides the frequency of the
signal into 1/8 (1/4), thereby generating signals of 45 MHz (95
MHz) orthogonal to each other. Then, the signals are each fed to
the other input terminal of the frequency mixer 661 and the
frequency mixer 662.
[0111] When the four signals (the output signals from the buffer
amplifiers 657 to 660 and the output signals from the frequency
divider 641) are in a phase relation as shown in FIG. 2, the
following signals appear in outputs of the frequency mixers 661 and
662, respectively.
2.multidot.sin .omega..sub.TX.sub..sub.--.sub.GSM.multidot.cos
.omega..sub.IF=sin
(.omega..sub.TX.sub..sub.--.sub.GSM+.omega..sub.IF)+si- n
(.omega..sub.TX.sub..sub.--.sub.GSM-.omega..sub.IF) (12a)
2.multidot.sin .omega..sub.TX.sub..sub.--.sub.DCS.multidot.cos
.omega..sub.IF=sin
(.omega..sub.TX.sub..sub.--.sub.DCS+.omega..sub.IF)+si- n
(.omega..sub.TX.sub..sub.--.sub.DCS-.omega..sub.IF) (12b)
2.multidot.cos .omega..sub.TX.sub..sub.--.sub.GSM.multidot.sin
.omega..sub.IF=sin
(.omega..sub.TX.sub..sub.--.sub.GSM+.omega..sub.IF)-si- n
(.omega..sub.TX.sub..sub.--.sub.GSM-.omega..sub.IF) (13a)
2.multidot.cos .omega..sub.TX.sub..sub.--.sub.DCS.multidot.sin
.omega..sub.IF=sin
(.omega..sub.TX.sub..sub.--.sub.DCS+.omega..sub.IF)-si- n
(.omega..sub.TX.sub..sub.--.sub.DCS-.omega..sub.IF) (13b)
[0112] When the signals (the outputs of the two frequency mixers
661 and 662) expressed by these equations are added to each other
by an adder 663 in the next stage ((12a)+(13a) and (12b)+(13b) are
determined from the above equations), only the following signals
are extracted.
sin (.omega..sub.TX.sub..sub.--.sub.GSM+.omega..sub.IF)
sin (.omega..sub.TX.sub..sub.--.sub.DCS+.omega..sub.IF) (14)
[0113] Thus, the following frequencies are obtained:
f.sub.TX.sub..sub.--.sub.GSM+f.sub.IF
f.sub.TX.sub..sub.--.sub.DCS+f.sub.IF (15)
[0114] where f.sub.IF is the output of the frequency divider 641
and is 45 MHz (95 MHz).
[0115] A circuit (part 670 enclosed by a dotted line in FIG. 2)
formed by the polyphase filter 655 (656), the frequency mixers 661
and 662 and the like described above can extract only one of the
two frequencies generated in frequency mixing, and therefore is
referred to as an image removing mixer.
[0116] Thus, from the equations (11) and the equations (15),
f.sub.CH.sub..sub.--.sub.RX.sub..sub.--.sub.GSM+f.sub.IF=(880+45)
to (915+45) MHz=925 to 960 MHz (16a)
f.sub.CH.sub..sub.--.sub.RX.sub..sub.--.sub.DCS+f.sub.IF=(1710+95)
to (1785+95) MHz=1805 to 1880 MHz (16b)
[0117] Hence, the frequency equal to received frequency of GSM
(DCS) is obtained.
[0118] The signals are fed to the polyphase filter 605 (polyphase
filter 613) via a radio-frequency amplifier 664. Then, direct
quadrature demodulation for GSM is performed by the quadrature
demodulator comprising the frequency mixers 603 and 604 and the
polyphase filter 605. Direct quadrature demodulation for DCS is
performed by the quadrature demodulator comprising the frequency
mixers 611 and 612 and the polyphase filter 613.
[0119] Thus, by feeding a frequency different from the received RF
frequency until immediately before local oscillation input to the
DCR demodulator and generating a desired frequency before the
mixers of the demodulator, the terminal avoids leakage of the local
oscillation signal having the same frequency as that of the
received RF signal to other circuit blocks as much as possible.
[0120] In order to deal with multi-slot mode as an additional
function of GSM/DCS, the output of a transmitting VCO is used for
one input of the image removing mixer used for generating the local
oscillation signal for reception, thereby eliminating the need for
control to change the frequency of a VCO between a period of
transmission and a period of reception.
[0121] When the circuit configurations shown in FIGS. 1 to 3 are
viewed from a standpoint of circuit integration (integration into
an IC), each of the circuit blocks shown in FIG. 2 and FIG. 3 can
be integrated into an IC except for part of the loop filters. Thus,
the circuit blocks in FIG. 2 are integrated into a receiving system
IC, and the circuit blocks in FIG. 3 are integrated into a
transmitting system IC.
[0122] As described above, according to the present embodiment, the
output of a transmitting voltage-controlled oscillator (VCO) is
used for one input of the single image removing mixer for
generating the local oscillation signal for GSM/DCS reception,
thereby eliminating the need for changing the frequency of a
voltage-controlled oscillator between a period of transmission and
a period of reception, that is, eliminating the need for the
switching of the channel PLL (phase-locked loop). As a result, time
required for switching between transmission and reception and time
required for the switching of frequency in handover between GSM and
DCS are not subject to settling time of the channel PLL. Therefore,
the terminal is readily compatible with multi-slot mode as a
communication terminal.
[0123] In addition, in order to obtain the local oscillation
frequencies for GSM and DCS reception, a single image removing
mixer is used to generate the two receiving local oscillation
frequencies. Therefore, it is possible to avoid a DC offset without
extremely increasing circuit scale when integrating the
transmitting and receiving RF blocks into ICs.
[0124] Furthermore, a signal obtained by dividing an IF frequency
generated by the transmission intermediate frequency (IF) PLL used
for the offset PLL for generating a transmission frequency signal
is employed for the other input of the image removing mixer,
thereby reducing increase in the number of parts and simplifying
configuration of the transmitting and receiving circuits.
[0125] Conventionally (in a configuration example, according to the
related art, shown in FIG. 6, for example), a fractional L type PLL
is used as the channel PLL, thus resulting in a disadvantage of
expanded circuit scale. On the other hand, a general PLL can be
used as the channel PLL in the terminal according to the foregoing
embodiment. This also provides an effect of reducing increase in
circuit scale when integrating the channel PLL into an IC.
[0126] In addition, by feeding a frequency different from the
received RF frequency until immediately before local oscillation
input to the DCR demodulator and generating a desired frequency
before the mixers of the demodulator, it is possible to avoid
mixing of an undesired signal component from the image removing
mixer circuit into the transmission system circuit.
[0127] The present invention is not limited to the embodiment
described above, and is susceptible of various modifications
without departing from the spirit of the present invention. For
example, when the multiband portable radio terminal is in a period
of transmission, bias power to the buffer amplifier 665 may be
controlled to be turned off. This makes it possible to avoid mixing
of an undesired signal component from the image removing mixer 670
into the transmission system circuit.
* * * * *