U.S. patent application number 08/975716 was filed with the patent office on 2002-04-11 for reproducing apparatus capable of controlling amplitude and phase characteristics of reproduced signals.
Invention is credited to KOBAYASHI, KIWAMU, NAITOH, TATSUYA.
Application Number | 20020041458 08/975716 |
Document ID | / |
Family ID | 17053568 |
Filed Date | 2002-04-11 |
United States Patent
Application |
20020041458 |
Kind Code |
A1 |
KOBAYASHI, KIWAMU ; et
al. |
April 11, 2002 |
REPRODUCING APPARATUS CAPABLE OF CONTROLLING AMPLITUDE AND PHASE
CHARACTERISTICS OF REPRODUCED SIGNALS
Abstract
In a reproducing apparatus, an equalizing system including a
plurality of elements to be controlled is arranged to have its
equalizing characteristic simply variable by controlling, with a
single parameter, the plurality of elements to be controlled.
Further, circuit characteristics of the equalizing system which are
based on resonance frequencies and quality factors (Q) are
controlled by controlling the resonance frequencies and the quality
factors (Q) through the control performed with the single parameter
over the plurality of elements to be controlled.
Inventors: |
KOBAYASHI, KIWAMU;
(KANAGAWA-KEN, JP) ; NAITOH, TATSUYA; (TOKYO,
JP) |
Correspondence
Address: |
FITZPATRICK CELLA HARPER & SCINTO
30 ROCKEFELLER PLAZA
NEW YORK
NY
10112
US
|
Family ID: |
17053568 |
Appl. No.: |
08/975716 |
Filed: |
November 21, 1997 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
08975716 |
Nov 21, 1997 |
|
|
|
08534168 |
Sep 26, 1995 |
|
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Current U.S.
Class: |
360/65 ;
G9B/20.01; G9B/5.015; G9B/5.032 |
Current CPC
Class: |
G11B 20/10009 20130101;
G11B 5/0086 20130101; G11B 5/035 20130101; G11B 20/10046
20130101 |
Class at
Publication: |
360/65 |
International
Class: |
G11B 005/035 |
Foreign Application Data
Date |
Code |
Application Number |
Oct 4, 1994 |
JP |
HEI 06-240039 |
Claims
What is claimed is:
1. A reproducing apparatus comprising: a) reproducing means for
reproducing a signal; b) equalizing means, having a plurality of
controllable elements, for equalizing the signal reproduced by the
reproducing means; and c) control means for controlling an
equalizing characteristic of said equalizing means by controlling,
with a single parameter, the plurality of controllable elements of
said equalizing means.
2. An apparatus according to claim 1, wherein said equalizing means
includes a circuit having a resonance frequency and a quality
factor (Q) which are controllable, and wherein said control means
controls the resonance frequency and the quality factor (Q) by
using said parameter.
3. An apparatus according to claim 2, wherein said equalizing means
further includes a plurality of circuits having respective
different resonance frequencies and respective different quality
factors (Q), and wherein said control means controls the resonance
frequencies and the quality factors (Q) b using said parameter.
4. An apparatus according to claim 1, wherein said equalizing means
includes amplitude equalizing means for controlling an amplitude of
the reproduced signal and phase equalizing means for controlling a
phase of the reproduced signal and wherein said control means
controls said amplitude equalizing means and said phase equalizing
means by using said parameter.
5. An apparatus according to claim 4, wherein said amplitude
equalizing means includes a circuit for emphasizing a low frequency
component of the reproduced signal.
6. An apparatus according to claim 4, wherein said reproducing
means reproduces a signal from a recording medium, and wherein said
control means further controls an equalizing characteristic of sad
phase equalizing means according to a kind of the recording
medium.
7. An apparatus according to claim 1, further comprising error
detecting means for detecting errors included in the reproduced
signal, wherein said control means determines a value of said
parameter according to an output of sail error detecting means.
8. An apparatus according to claim 7, wherein said control means
determines of said parameter in such a way as to cause a count
value obtained by counting the output of said error detecting means
for a predetermined period of time to become smaller.
9. A signal processing device comprising: a) processing means for
processing an input signal, said process means including a
processing circuit having a plurality of elements to be controlled;
and b) control means for controlling a resonance frequency and a
quality factor Q) of said processing circuit by controlling, with a
single parameter, the plurality of elements to be controlled.
10. A device according to claim 9, wherein said processing means
controls amplitude of the input signal.
11. A device according to claim 9 wherein said processing means
controls a phase of the input signal.
12. A signal processing device comprising: a) processing means for
processing an input signal, said processing means including a
plurality of processing circuits having respective elements to be
controlled; and b) means for controlling at least one of a
resonance frequency and a quality factor (Q) of each of said plural
of processing circuits by controlling, with a single parameter, the
elements to be controlled of said plurality of processing
circuits.
13. A device according to claim 12, wherein said plurality of
processing circuits have respective different resonance frequencies
and respective different quality factors (Q).
14. A device according to claim 12, wherein each of said plurality
of processing circuits has a plurality of elements to be
controlled, and wherein said control means controls, with said
parameter, said plurality of elements to be controlled.
15. A device according to claim 12, wherein said plurality of
processing circuits includes a circuit for emphasizing a low
frequency component of the input signal and a circuit for
emphasizing high frequency component of the input signal.
16. A device according to claim 12, wherein said plurality of
processing circuits include a circuit for controlling a phase of
the input signal.
17. A device according to claim 12, wherein said processing means
equalizes the input signal, and wherein said control means controls
an equalizing characteristic of said processing means by
controlling the elements to be controlled of said plurality of
processing circuits.
18. A device according to claim 12, wherein said plurality of
processing circuits include an integrating circuit, n steps of
second-order low-pass filters (n being an integer not less than 1),
and n steps of second-order low-pass filters each having a
transmission zero point.
19. A device according to claim 12, wherein said plurality of
processing circuits include n steps of phase shift filters of m-th
order (n and m each being an integer not less than 1).
20. A reproducing apparatus comprising: a) reproducing means for
reproducing a signal from a recording medium; and :b) equalizing
means for equalizing the reproduced signal, said equalizing means
including an integral equalizing circuit, n steps of second-order
low-pass filters (n being an integer not less than 1) each having a
resonance frequency and a quality factor (Q) controllable, and n
steps of second-order low-pass filters each having a resonance
frequency and a quality factor (Q) controllable and each having a
transmission zero point.
21. An apparatus according to claim 20, wherein said equalizing
means includes a second-order phase shift filter having a quality
factor (Q) controllable.
22. An apparatus according to claim 20, wherein said equalizing
means includes n steps of first-order phase shift filters having
respective different cutoff frequencies.
23. An apparatus to claim 20, further comprising control means for
varying an equalizing characteristic of said equalizing means by
controlling, with a single parameter, at least one of the resonance
frequency and the quality factor (Q) of each of said second-order
low-pass filters and said second-order low-pass filters each having
a transmission zero point.
24. An apparatus according to claim 23, wherein said equalizing
means includes a second-order phase shift filter having a quality
factor (Q) controllable, and wherein said control means controls
also the quality factor (Q) of said phase shift filter with said
single parameter.
25. An apparatus according to claim 24, wherein said control means
controls the quality factor (Q) of said phase shift filter
according to kind of the recording medium.
26. An apparatus according to claim 20, further comprising data
detecting means for restoring a signal outputted from said
equalizing means to a form of digital data.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] This invention relates to a reproducing apparatus and more
particularly to a reproduction equalizing process for a digital
signal reproduced from a recording medium.
[0003] 2. Description of the Related Art
[0004] In transmitting signals, it has generally been practiced to
carry out an equalizing process, on the signal receiving side, to
compensate for any loss for obtaining good signals by controlling
the frequency characteristic of signal resulting from a
transmission system.
[0005] Known transmitting apparatuses of the kind mentioned above
include, for example, a digital VTR which records and reproduces a
video signal in the form of a digital signal on and from a magnetic
tape and is also arranged to perform an equalizing process on
reproduced signals.
[0006] A magnetic recording/reproducing apparatus such as the
digital VTR has such a transmission characteristic that the signal
transmitted deteriorates in low and high frequency domains. The
deterioration in the low frequency domain is attributable to a
differential characteristic which is intrinsic to an induction coil
type magnetic head and also a low-band cutoff characteristic of a
rotary transformer. The deterioration in the high frequency domain
is caused by a loss resulting from the wavelength dependency of the
recording medium, a core loss of the magnetic headland a spacing
loss between the magnetic head and the recording medium.
[0007] In the case of the digital VTR or a digital data recorder,
if the deterioration of such characteristics is excessive, there
arises some waveform distortion such as intersymbol interference or
the like, which greatly deteriorates the transmission
characteristic.
[0008] In view of the above, digital VTRs have been arranged to use
a waveform equalizing circuit to make the reproduced signal have an
adequate waveform by compensating for signal deterioration
resulting from the above-stated factors. FIG. 1 shows in a block
diagram the arrangement of the conventional digital VTR.
[0009] Referring to FIG. 1, a signal reproduced from a tape T by a
head 1 is supplied via a rotary transformer 2 to a preamplifier 3
to be amplified there. The amplified reproduced signal is supplied
to an integrating circuit 4. The integrating circuit 4 processes
the signal to compensate mainly for deterioration of the low
frequency domain of the signal. The signal thus compensated is
supplied to an amplitude equalizer 5 to be compensated for
deterioration of the high frequency domain. The signal is then
supplied to a phase equalizer 6.
[0010] The phase equalizer 6 processes the signal from the
amplitude equalizer 5 to make compensation for a phase deviation of
a whole circuit resulting from magnetic recording and reproducing
characteristics and the characteristic of the circuit. A signal 7
is thus obtained as an output of the phase equalizer 6. The signal
7 is supplied to a circuit of a subsequent stage. The circuit of
the subsequent stage then restores the signal 7 to its original
state of digital data.
[0011] Generally, the frequency characteristic of each of the
integrating circuit 4, the amplitude equalizer 5 and the phase
equalizer 6 is arranged to be controllable. A desired frequency
characteristic can be obtained by adjusting a plurality of control
points within each of these circuits according to the state of the
reproduced signal and the kind of the magnetic tape in use.
[0012] In the case of the VTR of the above-stated kind, however, it
is hardly possible to adequately adjust the frequency
characteristic of the integrating circuit and those of the
equalizers since the plurality of adjusting points are affected by
each other. In other words, in individually adjusting the plurality
of adjusting parts for each of these circuits, after the frequency
characteristic is controlled and adjusted to an optimum
characteristic for one adjusting part, the characteristic of this
part would be affected by the adjustment made for another adjusting
part, thereby necessitating readjustment.
[0013] Therefore, according to the arrangement of the conventional
digital VTR, the frequency characteristic either cannot be adjusted
as desired or necessitates much time and labor for adjustment.
SUMMARY OF THE INVENTION
[0014] This invention is directed to the solution of the problem of
the prior art mentioned above.
[0015] It is, therefore, an object of this invention to provide an
apparatus which is arranged to be capable of obtaining an optimum
equalizing characteristic through a simple control.
[0016] To attain this object, a reproducing apparatus arranged
according to this invention is provided with reproducing means for
reproducing a signal, equalizing means, having a plurality of
controllable elements, for equalizing the signal reproduced by the
reproducing means, and control means for controlling an equalizing
characteristic of the equalizing means by controlling, with a
single parameter, the plurality of controllable elements of the
equalizing means.
[0017] It is another object of this invention to provide an
apparatus arranged to control and optimize characteristics of
circuits resulting from a resonance frequency and a quality factor
(Q).
[0018] These and other objects and features of this invention will
become apparent from the following detailed description of
embodiments thereof taken in connection with the accompanying
drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0019] FIG. 1 is a block diagram of the arrangement of the
conventional digital VTR.
[0020] FIG. 2 is a block diagram of the arrangement of a digital
VTR arranged as an embodiment of this invention.
[0021] FIG. 3 shows transfer functions of circuits included in the
embodiment of this invention.
[0022] FIG. 4 shows the frequency control characteristic of an
integral equalizing circuit shown in FIG. 2.
[0023] FIG. 5 shows the frequency control characteristic of an LPF
shown in FIG. 2.
[0024] FIG. 6 shows the frequency control characteristic of another
LPF which is also shown in FIG. 2 and arranged to have a
transmission zero point.
[0025] FIG. 7 shows the frequency control characteristic of an
amplitude equalizing system shown in FIG. 2.
[0026] FIG. 8 shows the delay characteristic of a phase shift
filter shown in FIG. 2.
[0027] FIG. 9 shows the delay characteristic of each step of the
phase shift filter shown in FIG. 2.
[0028] FIG. 10 is a block diagram of the arrangement of a
reproduction system of the digital VTR which is the embodiment of
this invention.
[0029] FIG. 11 shows a relationship in the embodiment of this
invention between control signals (CTL) and electromagnetic
Conversion characteristics.
[0030] FIG. 12 shows the characteristic of a delay equalizing
system shown in FIG. 2.
[0031] FIG. 13 shows the delay characteristic of a phase shift
filter of a first stage shown in FIG. 2.
[0032] FIG. 14 shows how the resonance frequency of the integral
equalizing circuit shown in FIG. 2 is controlled.
[0033] FIG. 15, shows how the resonance frequency of the LPF shown
in FIG. 2 is controlled.
[0034] FIG. 16 shows how the quality factors (Q) of the LPF shown
in FIG. 2 are controlled.
[0035] FIG. 17 shows how the quality factor of a phase shift filter
of a first stage shown in FIG. 2 is controlled.
[0036] FIG. 18 shows how the quality factor of a phase shift filter
of a second stage of FIG. 2 is controlled.
[0037] FIG. 19 shows how the quality factor of a phase shift filter
of a third stage of FIG. 2 is controlled.
[0038] FIG. 20 is a circuit diagram showing the details of the
amplitude equalizing system shown in FIG. 2.
[0039] FIG. 21 is a circuit diagram showing the details of a delay
equalizing system shown in FIG. 2.
[0040] FIG. 22 shows by way of example the arrangement of inductors
included in the circuits of FIGS. 20 and 21.
[0041] FIG. 23 shows another example of arrangement of inductors
included in the circuits of FIGS. 20 and 21.
[0042] FIG. 24 shows a further example of arrangement of inductors
included in the circuits of FIGS. 20 and 21.
[0043] FIG. 25 shows by way of example the arrangement of a
second-order phase shift filter.
[0044] FIG. 26 shows another example of arrangement of the
second-order phase shift filter.
[0045] FIG. 27 shows by way of example arrangement of a first-order
phase shift filter.
[0046] FIG. 28 shows another example of arrangement of the
first-order phase shift filter.
[0047] FIG. 29 shows the arrangement of a gm filter usable for the
embodiment of this invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0048] The following describes an embodiment of this invention in
detail with reference to the drawings.
[0049] In the case of the embodiment, this invention is applied to
a digital VTR. FIG. 2 is a block diagram of the arrangement of a
reproduction system of the digital VTR.
[0050] Referring to FIG. 2, a signal reproduced from a tape T by a
head 1 is supplied via a rotary transformer 2 to a preamplifier 3.
The preamplifier 3 amplifies the reproduced signal up to a
predetermined level and then supplies the amplified signal to an
integral equalizing circuit 8. The integral equalizing circuit 8
compensates for a differential characteristic of the reproduced
signal and then supplies the compensated signal to a second-order
low-pass filter (hereinafter referred to as LPF) 9. The
second-order LPF 9 and another second-order LPF 10 which has a
transmission zero point are arranged to compensate for a high
frequency component of the reproduced signal and to attenuate, at
the same time, an unnecessary low frequency component of the
reproduced signal.
[0051] The integral equalizing circuit 8 and the LPFs 9 and 10
respectively have transfer characteristics which are shown in FIG.
3. A part (a) of FIG. 3 shows the transfer characteristic of the
integral equalizing circuit 8 and parts (b) and (c) show the
transfer characteristics of the LPFs 9 and 10, respectively. In
FIG. 3, a symbol 6 denotes a resonance frequency of the applicable
circuit and Q denotes a quality factor.
[0052] The frequency characteristics of these circuits 8, 9 and 10
are shown by full lines in FIGS. 4, 5 and 6, respectively. As
apparent from FIGS. 4, 5 and 6, the integral equalizing circuit 8
compensates for a loss in the low frequency component of the
reproduced signal, while the LPFs 9 and 10 compensate for
deterioration of the high frequency component. FIG. 7 shows a
frequency characteristic obtained with the integral equalizing
circuit 8 and the LPFs 9 and 10 considered by the lump.
[0053] The reproduced signal outputted from the LPF 10 is supplied
to a second-order phase shift filter 11. In the case of this
particular embodiment, other phase shift filters 12 and 13 are
likewise arranged in two steps. The phase shift filters 11, 12 and
13 are thus arranged stepwise, in a total of three steps, to make
compensations for differences of a phase characteristic varying
with the recording medium and also for the phase characteristics of
the LPFs 9 and 10.
[0054] The transfer function of the phase shift filter of this kind
(second-order) is shown at a part (d) in FIG. 3. The phase shift
filter of this kind generally has a delay characteristic which is
shown in FIG. 8.
[0055] Referring to FIG. 8, the amount of delay of a band in the
neighborhood of a resonance frequency co .omega..sub.2D increases
accordingly as a value Q2D of the phase shift filter of this kind
is larger. The amount of delay of a low frequency band, on the
other hand, increases H accordingly as the value Q.sub.2D is
smaller. In the case of this embodiment, the phase shift filters
11, 12 and 13 are arranged to share with each other an action of
making compensating for a phase deviation of the signal of each
frequency band in a manner as shown in FIG. 9.
[0056] More specifically, the phase shift filters 12 and 13 are
arranged to make the value Q.sub.2D relatively large in such a way
as to have a maximum amount of delay in the neighborhood of the
resonance frequency. The phase shift filter 11 is arranged to make
the value Q.sub.2D relatively small in such a way as to increase
the amount of delay of the low frequency band. Further, the phase
shift filter 11 is arranged on a theoretical basis to have its
resonance frequency .omega..sub.2D set at a frequency higher than
that of the phase shift filter 13.
[0057] The reproduced signal is processed to equalize the amplitude
and the phase thereof by the above-stated circuits 8 to 13. The
signal thus processed is outputted through a terminal 14 to a
circuit of a subsequent stage. The characteristics of the circuits
8 to 13 are arranged to be controlled by a control signal CTL1. Of
these circuits, the phase shift filter 11 is arranged to have its
characteristic controlled not only by the control Signal CTL1 but
also by another control signal CTL2. Further, the integral
equalizing circuit 8, the second-order LPFs 9 and 10 and the
second-order phase shift filters 11, 12 and 13 jointly form a
waveform equalizing circuit 17.
[0058] Control over the frequency characteristics of the equalizing
circuits arranged as described above is next described as follows:
FIG. 10 shows in a block diagram the arrangement of the whole
reproduction system of the digital VTR which includes the
equalizing circuits of FIG. 2. Referring to FIG. 10, the reproduced
signal is amplified to a predetermined level by the preamplifier 3
as mentioned in the foregoing. The waveform of the amplified signal
is converted by the waveform equalizing circuit 17 into a waveform
suited for reproduction. The circuits shown in FIG. 2 are used for
the waveform equalizing circuit 17 as mentioned in the foregoing.
The signal which has been waveform-equalized by the waveform
equalizing circuit 17 is supplied to a detecting circuit 18.
[0059] The detecting circuit 18 restores the waveform-equalized
reproduced signal to its original digital data and supplies it to
an error correcting circuit 19. In other words, although the signal
reproduced by the head 1 is a digital signal, the reproduced signal
has a waveform the amplitude of which continuously varies in an
analogous manner. The signal outputted from the waveform equalizing
circuit 17 has its amplitude vary also in an analogous manner. The
detecting circuit 18 is, therefore, arranged to restore the
reproduced signal to an original form of a digital signal
consisting of "1" and "0". The error correcting circuit 19 is
arranged to correct any code error taking place during the process
of transmission of the reproduced signal and to generate an error
flag for any uncorrectable data if there is any data that is not
correctable. The error flags thus generated are supplied to a
control circuit 23.
[0060] The waveform equalizing circuit 17 varies its circuit
characteristic under the control of the control signals CTL1 and
CTL2 as mentioned above. The values of the control signals CTL1 and
CTL2 are set beforehand and are stored respectively in storage
circuits 26 and 27. The control signals CTL1 and CTL2 are supplied
to the waveform equalizing circuit 17 according to instructions
given from the control circuit 23. More specifically, the control
circuit 23 sends information on selection addresses to the storage
circuits 26 and 27 to cause them to output values according to the
selection addresses.
[0061] According to this method of control, the control value is
selected in the following manner: The error flags are counted for a
predetermined period of time and the control value is set in such a
way as to minimize the count value thus obtained. To the control
circuit 23 is inputted also information on replacement of one
cassette with another. The control value is set every time the
cassette is replaced with another cassette.
[0062] The values of the control signals CTL1 and CTL2 which are
parameters for control over the waveform equalizing circuit 17 are
determined as follows:
[0063] The amplitude transmitting characteristic of the magnetic
recording/reproducing system is first proximately expressed by a
formula (1) as follows: 1 Vout = V 1 1 exp ( 2 d / ) = V 1 ' f exp
( 2 fd / v ) ( 1 )
[0064] wherein .lambda. represents recording wavelength [.mu.m]; f
frequency [Hz]; V relative velocity [.mu.m/s]; V, V' reference
levels [V]; and d decrease [.mu.m].
[0065] The formula (1) above is based on the concept of proximately
replacing, with exponential functions, all the adverse effects of
losses of varied kinds relative to the recording wavelength. In the
formula (1), "d" is a parameter indicative of a decrease in the
frequency characteristic in the magnetic recording/reproducing
system. In other words, the frequency characteristic increases
accordingly as the parameter d is smaller.
[0066] In the case of this embodiment, the parameter d is
considered to vary with the kind of the recording medium, the lapse
of time, a difference in recording mode of the recording apparatus,
etc. On this concept, a parameter Ad is defined by a formula (2) as
follows:
d=d.sub.0+.DELTA.d.ident.d.sub.0+CTL1... (2)
[0067] In the case of this embodiment, the parameter d is used as a
control parameter (signal) CTL1. FIG. 11 shows how the control
waveform of the control parameter CTL1 varies in relation to
changes of the electromagnetic conversion characteristic in the
embodiment.
[0068] Another control signal CTL2 is next described. In the case
of this embodiment, the control signal CTL2 is defined as a
parameter representing a difference of phase characteristic
resulting from the kind and the manufacturing method of the
recording medium to be used. The control signal CTL2 is arranged to
be a parameter of a binary value to be used in selecting the
conditions of the phase shift filter 11.
[0069] The details of control to be performed over the
characteristic of the waveform equalizing circuit 17 by using the
control signals CTL1 and CTL2 are next described as follows: In the
case of the embodiment, the amplitude equalizing process shown at
the first half portion in FIG. 2 is first controlled with the
control signal CTL1. Then, to compensate for the phase
characteristic resulting from the control over the first half
portion, the delay equalizing process shown at the latter half
portion in FIG. 2 is controlled also with the control signal
CTL1.
[0070] The control signal CTL2 is used for control over the first
step of the delay equalizing process only, i.e., only for the phase
shift filter 11. As mentioned above, the control by the control
signal CTL2 is performed for selecting the condition which varies
according to the kind and the method of manufacture of the medium
in use.
[0071] Each of the circuits is controlled as follows:
[0072] The integral equalizing circuit 8 is controlled by the
control signal CTLI as shown in FIG. 4. The second-order LPFs 9 and
10 are controlled by the control signal CTL1 as shown in FIGS. 5
and 6. Then, the amplitude equalizing system as a whole is
controlled by the control signal CTL1 in a manner as shown in FIG.
7. Further, the delay equalizing system as a whole is controlled by
the control signal CTL1 as shown in FIG. 12 and also controlled by
the other control signal CTL2 as shown in FIG. 13.
[0073] In the case of this embodiment, the control functions are
set beforehand for the resonance frequency .omega. and Q the
quality factor Q. The characteristics of the applicable circuits
are controlled by varying the values of .omega. and Q by the
control signal CTL1 on the basis of the control functions set
beforehand. The details of the control are as shown in FIGS. 14 to
19.
[0074] FIG. 14 shows how the resonance frequency of the integral
equalizing circuit 8 changes. As shown, the resonance frequency is
controlled linearly as in relation to the control signal CTL1. FIG.
15 shows how the resonance frequencies of the LPFs 9 and 10 change.
FIG. 16 shows the changes of the quality factor Q of the LPFs 9 and
10. The resonance frequency and the quality factor Q of each of the
LPFs 9 and 10 are linearly controlled in relation to the control
signal CTL1.
[0075] FIG. 17 shows how the resonance frequency of the phase shift
filter 11 changes. The phase shift filter 11 is controlled linearly
in relation to the control signal CTL1 and selectively by the
control signal CTL2. FIGS. 18 and 19 respectively show how the
phase shift filters 12 and 13 change. As shown, they are controlled
linearly in relation to the control signal CTL1 Further, the
resonance frequency of each circuit of the delay equalizing system
is arranged to be unvarying.
[0076] According to the arrangement of this embodiment, as
described above, the characteristic of each circuit can be
univocally determined for a single parameter as shown in FIGS. 7
and 12. A desired equalizing Characteristic, therefore, can be very
simply obtained by just varying a single parameter. The quality of
the reproduced signal thus can be prevented from deteriorating.
[0077] The details of the amplitude equalizing system and the delay
equalizing system mentioned above are as shown in FIGS. 20 and 21.
In the case of the embodiment, each of the equalizing circuits is
composed of an LC filter. FIG. 20 shows the arrangement of the
amplitude equalizing system. FIG. 21 shows the arrangement of the
delay equalizing system.
[0078] Control over the resonance frequency of the integral
equalizing circuit shown at the part (a) of FIG. 3 is performed by
controlling an element CO shown in FIG. 20 with the control signal
CTL1. Control over the resonance frequency and the quality factor Q
of the LPF shown at the part (b) of FIG. 3 is performed by
controlling elements R1 and L1 shown in FIG. 20 with the control
signal CTL1. Control over the resonance frequency and the quality
factor Q of the LPF shown at the part (c) of FIG. 3 is performed by
controlling elements R2 and L2 shown in FIG. 20 with the control
signal CTL1.
[0079] The quality factor Q of the phase shift filter shown at the
part (d) of FIG. 3 is controlled by controlling elements R3 to R6
shown in FIG. 21 with the control signal CTL1. Further, the
characteristic of the phase shift filter 11 is selected by
switching the position of a switch SW1 shown in FIG. 21 with the
control signal CTL2.
[0080] For control over the inductance of each circuit, it is
preferable to use a simulated inductor on account of the easiness
of the control and reduction in size of the circuit. Further, with
respect to an adjustable resistor, it is preferable to use an
electronic volume. FIGS. 22, 23 and 24 show the arrangement of some
of simulated inductors used in general.
[0081] FIG. 22 shows a simulated inductor using a gyrator. FIG. 23
shows a simulated inductor using a GIC (generalized immittance
converter) active filter. FIG. 24 shows a simplified type simulated
inductor using an operational amplifier.
[0082] FIGS. 25 and 26 show some other examples of arrangement of
the second-order phase shift filter.
[0083] While second-order phase shift filters are used in the
embodiment described above, it is possible to use first-order phase
shift filters according to this invention. FIGS. 27 and 28 show
some examples of the arrangement of the first-order phase shift
filters. In a case where the first-order phase shift filters are
used, the cutoff frequency of the phase shift filter of one step is
arranged to differ from that of the phase shift filter of another
step.
[0084] FIG. 29 shows by way of example the arrangement of a gm
filter which is usable as a part of each circuit of the amplitude
equalizing system shown in FIG. 2.
[0085] In using the circuit of FIG. 29, the embodiment is arranged
to be capable of controlling the resonance frequency and the
quality factor Q of the second-order LPF obtained, for example,
with a terminal 102 used as an input terminal and a terminal 105 as
an output terminal, by controlling a reference current source 101
with the control signal CTL1.
[0086] While this invention is applied to a digital VTR in the case
of the embodiment described, this invention is not limited to
digital VTRs. The same advantageous effect is attainable by
applying this invention to any other apparatus as long as it is
arranged to control the frequency characteristic of a signal
reproduced from a recording medium other than a tape.
[0087] In accordance with the arrangement of this invention, as
apparent from the foregoing description, an equalizing
characteristic can be very simply changed by controlling a
plurality of controlled elements of an equalizing means with a
single parameter.
[0088] Therefore, an optimum equalizing characteristic an be
obtained through a simple process, and the reproduced signal can be
prevented from deteriorating.
[0089] With the resonance frequency and the quality factor Q
controlled by controlling a plurality of controlled elements of
circuits with a single parameter, the circuit characteristic based
on the resonance frequency and the quality factor Q can be
controlled in a very simple manner.
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