U.S. patent application number 09/916185 was filed with the patent office on 2002-02-21 for low consumption converter directly connectable to the mains.
This patent application is currently assigned to STMicroelectronics S.r.l.. Invention is credited to Adragna, Claudio, Gattavari, Giuseppe.
Application Number | 20020021576 09/916185 |
Document ID | / |
Family ID | 8175425 |
Filed Date | 2002-02-21 |
United States Patent
Application |
20020021576 |
Kind Code |
A1 |
Gattavari, Giuseppe ; et
al. |
February 21, 2002 |
Low consumption converter directly connectable to the mains
Abstract
A converter that is directly connectable to an AC power source
(e.g., the mains) includes a rectifier stage for rectifying a
network voltage, a power factor correction pre-regulating circuit
supplied with the rectified network voltage for producing a DC
voltage of a predetermined nominal value on an output node, and a
DC-DC converter. The DC-DC converter may be supplied on an input
node thereof with the DC voltage of the predetermined nominal value
for producing a regulated DC voltage on an output node thereof. The
DC-DC converter may use a clock whose frequency is selected between
at least one low and one high value by a selection signal.
Furthermore, the converter may also include a stand-by circuit for
producing the selection signal based upon the current delivered to
the load.
Inventors: |
Gattavari, Giuseppe; (Busto
Arsizio, IT) ; Adragna, Claudio; (Monza, IT) |
Correspondence
Address: |
ALLEN, DYER, DOPPELT, MILBRATH & GILCHRIST P.A.
1401 CITRUS CENTER 255 SOUTH ORANGE AVENUE
P.O. BOX 3791
ORLANDO
FL
32802-3791
US
|
Assignee: |
STMicroelectronics S.r.l.
Agrate Brianza
IT
|
Family ID: |
8175425 |
Appl. No.: |
09/916185 |
Filed: |
July 26, 2001 |
Current U.S.
Class: |
363/89 |
Current CPC
Class: |
H02M 1/007 20210501;
H02J 9/007 20200101; Y02B 70/30 20130101; H02M 1/4225 20130101;
H02M 1/0032 20210501; Y02B 70/10 20130101; Y02P 80/10 20151101;
Y04S 20/20 20130101 |
Class at
Publication: |
363/89 |
International
Class: |
H02M 005/42 |
Foreign Application Data
Date |
Code |
Application Number |
Jul 28, 2000 |
EP |
00830540.1 |
Claims
That which is claimed is:
1. A converter directly connectable to the mains comprising a
rectifier stage of the network voltage, a power factor correction
pre-regulating circuit (L6561) supplied with the rectified network
voltage (Vcc) and producing a DC voltage of a certain nominal value
on an output node (GD), a DC-DC converter (L5991} supplied on an
input node (Vc) with said DC voltage of a certain nominal value and
producing a regulated DC voltage on an output node (OUT), said
DC-DC converter using a clock whose frequency is selected between
at least a low and a high value by a selection signal (ST-BY), a
stand-by circuit (STAND-BY) producing said selection signal (ST-BY)
in function of the current delivered to the load, characterized in
that it comprises a control circuit comprising a comparator input
with said selection signal (ST-BY) and generating a disabling
signal of said power factor correction pre-regulating circuit
(L6561) as long as said selection signal (ST-BY) assumes a value
corresponding to the low frequency value of said clock.
2. The converter of claim 1, wherein said power factor correction
pre-regulating circuit (L6561) comprises a correction circuit that
receives at an input (INV) a signal representing the desired
nominal DC voltage and produces a correction signal, a power device
driver (DRIVER) supplied with the rectified network voltage (Vcc)
and receiving as input an enabling signal and said correction
signal, producing said nominal DC voltage on said output node (GD)
as long as said enabling signal is disabled, an enabling circuit
(DISABLE) producing said enabling signal when the voltage on a
control node (ZCD) is null, characterized in that said control
circuit further comprises a switch driven by said disabling signal
electrically isolating or coupling to a reference voltage said
control node (ZCD).
3. The converter according to claim 1 wherein said control circuit
comprises a switch driven by said disabling signal electrically
connecting to or disconnecting from said rectified network voltage
(Vcc) said power factor correction pre-regulating circuit (L6561).
Description
FIELD OF THE INVENTION
[0001] The present invention relates to the field of electronic
circuits, and, more particularly, to converters, adapters, battery
chargers and similar circuits. Specifically, the invention relates
to a low consumption converter directly connectable to the mains or
an AC power source.
BACKGROUND OF THE INVENTION
[0002] Power supplies typically include a DC-DC converter coupled
to an AC power source (e.g., the mains) through one or more stages.
In a pulse width modulation (PWM) switching converter, a square
wave drives the control terminal of a power switch and determines
whether it is conductive or not conductive. The output voltage is
increased by increasing the duration of the phase of conduction of
the switch, and decreased by increasing the duration of the phase
during which there is no conduction. Thus, the output voltage is
controlled by varying the duty cycle of the driving square
wave.
[0003] When the power switch is a MOS transistor, a non-negligible
amount of power is spent to periodically charge the gate of the
switching transistor. Power dissipation increases with an increase
in the switching frequency and noticeably affects the overall
efficiency of the converter. In particular, such a power
dissipation lowers the efficiency of the converter, which is
particularly true when the load is relatively small. For this
reason, typical prior art devices provide for a lowered switching
frequency when supplying a relatively small load.
[0004] In the following description reference will be made to a two
stage converter, as illustrated in FIG. 1, because of its far
greater diffusion than other types of converters. Yet, the
following considerations are equally applicable to a converter with
a number of stages greater than two.
[0005] As illustrated in FIG. 1, a two stage converter may include
a rectifier coupled to an AC power source, a power factor
correction pre-regulating circuit PFC supplied with the rectified
voltage and producing a DC voltage of a certain nominal value.
Further, a DC-DC converter is input with the nominal DC voltage and
controls a load. The DC-DC converter may be based on a control
scheme of any suitable kind (e.g., PWM, quasi resonant, resonant,
etc.).
[0006] A well known solution to reduce energy consumption under
relatively small or null load conditions includes reducing the
switching frequency of the switches of the PFC stage or of the
DC-DC stages, separately. Even if the energy savings that can be
obtained thereby is not negligible, the energy consumption remains
conspicuously large in the case of systems that remain in a
stand-by state or supply a relatively small load for a long
time.
[0007] Several converters which attempt to address this problem are
known in the art. Such converters show enhanced performance in
terms of energy savings because, under conditions of relatively
small load, the PFC pre-regulating circuit is automatically set to
a low consumption (quiescent) condition. On the contrary, when the
load increases the PFC resumes its normal functioning. This
provides for an increased output power requisite.
[0008] By turning off the PFC, the voltage on the bulk capacitor Co
that couples the PFC to the converter drops from the level of the
regulated voltage to the lower rectified and filtered network
voltage. Considering the fact that the leakage current of the
capacitor increases as the applied voltage increases approximately
according to the following formula:
I.sub.leak.ltoreq.0.02*C(.mu.F)*V.sub.R(V)+15 .mu.A,
[0009] the turning off of the PFC reduces capacitor losses.
Moreover, lowering the voltage on the capacitor Co and the voltage
supplied to the converter reduces the switching losses of the
converter and the PFC.
[0010] U.S. Pat. No. 5,903,138 discloses a two-stage switching
regulator that operates in one of four functioning modes, selected
according to load conditions. A drawback of this regulator is the
fact that it requires a relatively complicated logic circuit for
switching from one functioning mode to another. Moreover, such a
regulator may change its functioning mode even if the load remains
constant, and it may cause the generation of electric noise at
audible frequencies.
[0011] U.S. Pat. No. 5,726,871 discloses a power supply circuit for
a video display capable of reducing power consumption. To this end,
the functioning of its power factor correction is controlled by an
external microcomputer depending on functioning conditions of the
video display.
[0012] Furthermore, U.S. Pat. No. 5,960,207 discloses a power
supply including a power factor correction and a controller that
disables the power factor correction when the power supply is
operating in a low power mode. Monitoring of the load is carried
out in the secondary circuit of the power supply which is isolated
from the primary circuit according to safety rules. Therefore, the
control command produced by the controller for disabling the power
factor correction must be transmitted to the primary circuit of the
power supply using a device appropriate to keep such an isolation,
such as an optoelectronic switching coupler.
SUMMARY OF THE INVENTION
[0013] In view of the foregoing background, it is therefore an
object of the invention to provide a converter directly connectable
to an AC power source (e.g., the mains) that allows a significant
reduction of power dissipation by turning off its PFC when the load
is smaller than a certain threshold, substantially avoiding the
risk of generating electrical noise at audible frequencies.
[0014] It is another object of the invention to provide such a
converter which has a relatively simple control circuit and that
may be realized in an integrated form.
[0015] This and other objects, features, and advantages in
accordance with the present invention are provided by a converter
that is directly connectable to the mains that includes a rectifier
stage for rectifying a network voltage and a power factor
correction pre-regulating circuit supplied with the rectified
network voltage for producing a DC voltage of a certain nominal
value on an output node. The converter further includes a DC-DC
converter supplied on an input node thereof with the DC voltage of
the nominal value for producing a regulated DC voltage on an output
node thereof. The DC-DC converter may use a clock whose frequency
is selected between at least one low and one high value by a
selection signal. A standby circuit may also be included for
producing the selection signal based upon the current delivered to
the load.
[0016] One advantageous feature of the converter of the invention
is that it may include a control circuit having a comparator for
receiving the selection signal and generating a disabling signal
for the power factor correction pre-regulating circuit. The
disabling signal is generated so long as the selection signal
assumes a value corresponding to the low frequency value of the
driving clock.
[0017] The power factor correction pre-regulating circuit may
include a correction circuit that receives at an input thereof a
signal representing the desired nominal DC voltage and produces a
correction signal, and a power device driver that is supplied with
the rectified network voltage and receives as inputs an enabling
signal and the correction signal. The power device driver produces
the nominal DC voltage on an output node thereof so long as the
enabling signal is disabled. The power factor correction
pre-regulating circuit may also include an enabling circuit for
producing the enabling signal when the voltage on a control node is
zero. Moreover, the power factor correction may be turned on or off
by electrically isolating or coupling the control node to a
reference voltage using a switch driven by the disabling
signal.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The various aspects and advantages of the invention will
become more evident through a detailed description of the invention
with reference to the attached drawings, in which:
[0019] FIG. 1 is a schematic block diagram of a two stage converter
according to the present invention;
[0020] FIG. 2 is a schematic block diagram illustrating two
possible embodiments of the invention;
[0021] FIG. 3 is a schematic block diagram of the prior art L6561
PFC pre-regulating circuit shown in FIG. 2; and
[0022] FIG. 4 is a schematic block diagram of the prior art L5991
DC-DC converter shown in FIG. 2.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] A converter according to the invention may be realized with
a common DC-DC converter, a power factor correction pre-regulating
circuit, and a control circuit for controlling the functioning of
the PFC of the converter. Typically, DC-DC converters function at a
clock frequency selectable between at least one low and one high
value. The low frequency is used in small load conditions for
reducing the power consumption. The DC-DC converter selects the
clock frequency by providing a selection signal, which depends on
the load conditions, to its oscillator.
[0024] The control circuit of the converter of the present
invention may be realized in integrated form relatively easily and
without using external devices, such as optoelectronic switching
couplers, because it utilizes the selection signal for disabling
the PFC. Two possible embodiments of the invention which
conveniently use commercially available components (i.e., an L6561
PFC pre-regulating circuit and an L5991 DC-DC converter, both
manufactured by STMicroelectronics S.r.l., assignee of the present
invention), are shown in FIG. 2. Schematic block diagrams of the
L6561 and L5991 devices are illustratively shown in FIGS. 3 and 4,
respectively.
[0025] The L6561 device includes a correction circuit supplied with
the rectified network voltage Vcc and by a power device driver
DRIVER. The correction circuit receives at an input INV a signal
representing the desired nominal DC voltage produced by the PFC and
generates a correction signal. The power device driver DRIVER is
supplied with the voltage Vcc and produces a DC voltage of a
certain nominal value, adjusted as a function of the correction
signal, on an output node GD. The L6561 device also includes an
enabling circuit DISABLE that disables the power device driver
DRIVER when the voltage on the control node ZCD is zero. In this
case, the PFC may be turned off simply by grounding the node ZCD.
This can be done using the control circuit illustrated in FIG. 2a
and connected between the two commercially available devices.
[0026] The transistor 1a, as is the case with the transistor 2a, is
coupled to a Zener diode and acts as a comparator. This comparator
produces, on the base of transistor 1b (2b), a zero
collector-emitter voltage when the voltage on the node ST-BY is
greater than or equal to 5V, and a voltage suitable to set the
transistor 1b (2b) in a conduction state on ST-BY when a voltage
lower than 5V is present. This collector-emitter voltage is the
disabling signal. The transistor 1b is a switch driven by the
disabling signal that isolates or grounds the node ZCD of the L6561
device.
[0027] An alternative way of turning off the L6561 device includes
disconnecting it from the supply line in the way shown in FIG. 2b.
In this second embodiment the switch 2b driven by the disabling
signal couples the L6561 device to the rectified network voltage
Vcc. The commercial L5991 device, whose block diagram is shown in
FIG. 4, has a logic circuit regulating the PWM driving signal which
receives on the input node ISEN a signal representing the current
delivered to the load. On the node DC it receives a signal
representing the desired duty-cycle, and on the node RCT it
receives a clock signal provided by an external oscillator. The
load is coupled to the output nodes OUT and PGND.
[0028] The L5991 device also has a stand-by circuit STAND-BY
producing a selection signal on the node ST-BY. This reduces the
frequency of the external oscillator that generates the clock
signal whenever the load drops below a certain pre-established
threshold. Even when the PFC is in a low consumption mode, the
L5991 device works at a certain frequency which does not vary in as
much as the load does not overcome the pre-established threshold.
Working at an established frequency, the risk of generating noise
at acoustic frequencies is prevented, or at least noticeably
reduced.
[0029] Such a stand-by circuit is typically present in several
other commercially available converters for reducing the switching
losses when the load is relatively small. The improved converter of
the invention can be relatively easily realized by inputting the
selection signal, which is already generated by such commercially
available converters, to any one of the two control circuits of
FIG. 2.
* * * * *