U.S. patent application number 09/860769 was filed with the patent office on 2001-12-27 for method for fabricating semiconductor device.
Invention is credited to Kim, Jeong Ho, Kim, Yu Chang.
Application Number | 20010055843 09/860769 |
Document ID | / |
Family ID | 19669994 |
Filed Date | 2001-12-27 |
United States Patent
Application |
20010055843 |
Kind Code |
A1 |
Kim, Jeong Ho ; et
al. |
December 27, 2001 |
Method for fabricating semiconductor device
Abstract
The present invention discloses a method for fabricating a
semiconductor device. In particular, methods of the present
invention produces a contact plug which is larger than the presumed
contact region. As a result, the acceptable process error margin
for misalignment is increased, and the property and the yield of
semiconductor devices are improved.
Inventors: |
Kim, Jeong Ho; (Kyoungki-do,
KR) ; Kim, Yu Chang; (Kyoungki-do, KR) |
Correspondence
Address: |
Pillsbury Winthrop LLP
Intellectual Property Group
Ninth Floor
1100 New York Avenue, NW.
Washington
DC
20005-3918
US
|
Family ID: |
19669994 |
Appl. No.: |
09/860769 |
Filed: |
May 21, 2001 |
Current U.S.
Class: |
438/201 ;
257/E21.251; 257/E21.253; 257/E21.255; 257/E21.314; 257/E21.507;
257/E21.59 |
Current CPC
Class: |
H01L 21/31111 20130101;
H01L 21/31133 20130101; H01L 21/32139 20130101; H01L 21/31122
20130101; H01L 21/76897 20130101; H01L 21/76895 20130101 |
Class at
Publication: |
438/201 |
International
Class: |
H01L 021/8238 |
Foreign Application Data
Date |
Code |
Application Number |
May 24, 2000 |
KR |
2000-28009 |
Claims
What is claimed is:
1. A method for fabricating a semiconductor device, comprising the
steps of: producing a semiconductor substrate comprising a MOSFET
and a device isolation film; forming a conductive material layer on
said semiconductor substrate; forming a metallic film on said
conductive layer, wherein said metallic film is a metal oxide or a
metal nitride film; forming a photoresist film mask on said
metallic film for protecting a presumed region of a bit line
contact plug and a storage electrode contact plug; producing an
intermediate mask comprising said metallic film using said
photoresist film mask; producing a contact plug mask by coating a
polymer comprising a metal on side walls of said intermediate mask;
producing a bit line contact plug and a storage electrode contact
plug from said conductive material layer using said contact plug
mask; and removing said contact plug mask.
2. The method of claim 1, wherein said metallic film is selected
from the group consisting of Al.sub.2O.sub.3, Ta.sub.2O.sub.5, and
TiN.
3. The method of claim 2, wherein said metallic film is
Al.sub.2O.sub.3 and said polymer comprises Al.
4. The method of claim 3, wherein said step of producing said
intermediate mask comprises etching said metallic film using a gas
mixture comprising: (i) a fluorine containing gas; (ii) a halogen
gas or a halogen containing gas; (iii) oxygen or oxygen containing
gas; and (iv) an inert gas.
5. The method of claim 4, wherein said fluorine containing gas is
selected from the group consisting of CF.sub.4, C.sub.2F.sub.4,
C.sub.3F.sub.6, C.sub.3F.sub.8, C.sub.4F.sub.6, C.sub.4F.sub.8,
C.sub.5F.sub.8, CHF.sub.3, CH.sub.2F.sub.2, CH.sub.3F, NF.sub.3 and
SF.sub.6.
6. The method of claim 4, wherein said halogen gas or said halogen
containing gas is selected from the group consisting of Cl.sub.2,
BCl.sub.3 and HBr.
7. The method of claim 4, wherein said oxygen containing gas is
selected from the group consisting of CO.sub.2, NO and
NO.sub.2.
8. The method of claim 4, wherein said inert gas is selected from
the group consisting of He, Ne, Ar and Xe.
9. The method of claim 2, wherein said metallic film is
Ta.sub.2O.sub.5 film and said polymer comprises Ta.
10. The method of claim 9, wherein said step of producing said
intermediate mask comprises etching said metallic film using a gas
mixture comprising: (i) a fluorine containing gas; (ii) a halogen
gas or a halogen containing gas; (iii) oxygen or oxygen containing
gas; and (iv) an inert gas.
11. The method of claim 2, wherein said metallic film is TiN film
and said polymer comprises Ti.
12. The method of claim 11, wherein said step of producing said
intermediate mask comprises etching said metallic film using a gas
mixture comprising: (i) a halogen gas or a halogen containing gas;
(ii) oxygen or oxygen containing gas; and (iii) an inert gas.
13. The method of claim 1, wherein said conductive material is
selected from the group consisting of a polysilicon, tungsten and
Ti/TiN.
14. A method for fabricating a semiconductor device, comprising the
steps of: forming a semiconductor substrate comprising a MOSFET and
a device isolation film; forming a conductive material layer on
said semiconductor substrate; forming an Al.sub.2O.sub.3 film on
said conductive material layer; forming a photoresist film mask on
said conductive material layer for protecting a presumed region of
a bit line contact plug and a storage electrode contact plug;
producing an intermediate mask by etching said Al.sub.2O.sub.3 film
using said photoresist film mask; producing a contact plug mask by
coating a polymer comprising Al on the side walls of said
intermediate mask; producing a bit line contact plug and a storage
electrode contact plug by etching said conductive material layer
using said contact plug mask; and removing said contact plug
mask.
15. The method of claim 14, wherein said step of producing said
intermediate mask comprises etching said Al.sub.2O.sub.3 film using
a gas mixture comprising: (i) a fluorine containing gas; (ii) a
halogen gas or a halogen containing gas; (iii) oxygen or oxygen
containing gas; and (iv) an inert gas.
16. The method of claim 15, wherein said fluorine containing gas is
selected from the group consisting of CF.sub.4, C.sub.2F.sub.4,
C.sub.3F.sub.6, C.sub.3F.sub.8, C.sub.4F.sub.6, C.sub.4F.sub.8,
C.sub.5F.sub.8, CHF.sub.3, CH.sub.2F.sub.2, CH.sub.3F, NF.sub.3 and
SF.sub.6; said halogen gas or said halogen containing gas is
selected from the group consisting of Cl.sub.2, BCl.sub.3 and HBr;
said oxygen containing gas is selected from the group consisting of
CO.sub.2, NO and NO.sub.2; and said inert gas is selected from the
group consisting of He, Ne, Ar and Xe.
17. The method of claim 14, wherein said conductive material is
selected from the group consisting of a polysilicon, tungsten and
Ti/TiN.
18. The method of claim 14, wherein said polymer is removed using a
mixed solution of HF/NH.sub.4F/DI or
H.sub.2SO.sub.4/H.sub.2O.sub.2/DI.
19. The method of claim 14, wherein said Al.sub.2O.sub.3 film is
removed using a mixed solution of
H.sub.2SO.sub.4/H.sub.2O.sub.2/DI.
Description
FIELD OF THE INVENTION
[0001] The present invention relates to a method for fabricating a
semiconductor device. In particular, the present invention relates
to a method for preventing or significantly reducing the incidents
of damaging active regions of a semiconductor substrate comprising
a contact plug due to misalignment during its fabrication.
BACKGROUND OF THE INVENTION
[0002] Developments in techniques for forming a fine pattern on a
semiconductor substrate have led to an increased use of highly
integrated semiconductor devices. To form a semiconductor with a
fine pattern requires a photoresist film mask with a
correspondingly miniaturized pattern for etching and/or ion
implantation.
[0003] In general, the resolution (R) of a photoresist film pattern
is proportional to the light wavelength (.lambda.) and the process
variable (k) of a micro exposure device. The resolution, however,
is inversely proportional to the numerical aperture (NA) of the
light exposure device, i.e., R=k.times..lambda./NA. Thus, one can
improve the resolution (i.e., reduce the value of R) by decreasing
the light wavelength, for example, the resolution of G-line
(.lambda.=436 nm) and i-line (.lambda.=365 nm) micro exposure
devices are about 0.5 .mu.m and 0.3 .mu.m, respectively. A
photoresist film pattern below 0.3 .mu.m typically requires a deep
ultraviolet (DUV) light exposure device which generates a small
wavelength length, for example, a KrF laser (248 nm) or an ArF
laser (193 nm).
[0004] Other methods for improving the photoresist pattern
resolution include using a phase shift mask as a photo mask; using
a contrast enhancement layer (CEL) method to form a thin film to
enhance an image contrast on a wafer; using a tri-layer resist
(TLR) method which positions an intermediate layer, such as a spin
on glass (SOG) film, between two photoresist films; and using a
silylation method to selectively implant a silicon into the upper
portion of a photoresist film.
[0005] In a highly integrated semiconductor device, typically the
size of a contact hole connecting the upper and lower conductive
interconnections and the space between the contact hole and the
adjacent interconnection are smaller relative to a less integrated
semiconductor device. In addition, the aspect ratio of the contact
hole in a highly integrated semiconductor device is typically
higher than a less integrated semiconductor device. Thus, a highly
integrated semiconductor device having a multi-layer conductive
interconnection requires a precise mask alignment during its
fabrication process, which reduces the process margin, i.e.,
acceptable error limit. Therefore, to maintain a space between
contact holes, in conventional processes masks are formed with
consideration to misalignment tolerance, lens distortion in the
exposure process, critical dimension variation in the mask
formation and photoetching processes, and mask registrations.
[0006] A self aligned contact (SAC) method has also been used in a
contact hole formation process to overcome some of the
disadvantages of lithography processes. The SAC method typically
uses a polysilicon, a nitride, or an oxide nitride material as an
etch barrier film. Of these, a nitride material is most often used
as an etch barrier film.
[0007] In a conventional SAC method, a substructure, for example, a
device isolation insulation film, a gate insulation film, and a
metal-oxide semiconductor field effect transistor (MOSFET)
comprising a gate electrode overlapped with a mask oxide film
pattern and source/drain regions, is formed on a semiconductor
substrate, and an etch barrier film and an interlayer insulation
film comprising an oxide are formed over the substructure. A
photoresist film pattern of a storage electrode contact and/or a
bit line contact is formed by exposing the interlayer insulation
film. The resulting interlayer insulation film is dry-etched to
expose the etch barrier film. And a contact hole is produced by
etching the etch barrier film.
[0008] Unfortunately, if the design rule is small, active regions
of the semiconductor substrate are exposed during the SAC method
due to a resolution deficiency of the lithography process and/or
misalignment of the mask. Generally, the photoresist film mask,
which is used to protect a presumed contact plug region, cannot
cover the entire exposed active regions, and thus the active
regions are damaged during the etching process.
[0009] One can overcome this limitation by using a sufficiently
large photoresist film mask to cover the entire active regions of
the semiconductor substrate, and increasing the resulting contact
plug size by depositing a polymer. However, particles are generated
during the polymer depositing process. These particles deteriorate
the yield and the operation property of the device. Thus, a
cleaning process is often required to maintain the usefulness of
the system resulting in increased cost and time.
SUMMARY OF THE INVENTION
[0010] Accordingly, it is an object of the present invention to
provide a method for fabricating a semiconductor device which can
prevent or significantly reduce active regions of a semiconductor
substrate from being damaged due to misalignment during a contact
plug formation process.
[0011] One aspect of the present invention provides a method for
fabricating a semiconductor device, comprising the steps of:
[0012] producing a semiconductor substrate comprising a MOSFET and
a device isolation film;
[0013] forming a conductive material layer on said semiconductor
substrate;
[0014] forming a metallic film on said conductive layer, wherein
said metallic film is a metal oxide or a metal nitride film;
[0015] forming a photoresist film mask on said metallic film for
protecting a presumed region of a bit line contact plug and a
storage electrode contact plug;
[0016] producing an intermediate mask (e.g., combined elements of
23b and 25 of FIG. 2B) comprising said metallic film using said
photoresist film mask;
[0017] producing a contact plug mask (e.g., combined elements of
23b, 25 and 27 of FIG. 2C) by coating a polymer comprising a metal
on side walls of said intermediate mask;
[0018] producing a bit line contact plug and a storage electrode
contact plug from said conductive material layer using said contact
plug mask; and
[0019] removing said contact plug mask.
[0020] Preferably, the metallic film is selected from the group
consisting of Al.sub.2O.sub.3, Ta.sub.2O.sub.5, and TiN. In one
particular embodiment of the present invention, the polymer which
is used to coat the side walls of the intermediate mask comprises a
corresponding metal. For example, when the metallic film is
Al.sub.2O.sub.5, Ta.sub.2O.sub.5 or TiN, the polymer comprises Al,
Ta or Ti, respectively.
[0021] Preferably, when the metallic film is Al.sub.2O.sub.5 or
Ta.sub.2O.sub.5, the intermediate mask producing step comprises
etching the metallic film using a gas mixture comprising:
[0022] (i) a fluorine containing gas;
[0023] (ii) a halogen gas or a halogen containing gas;
[0024] (iii) oxygen or oxygen containing gas; and
[0025] (iv) an inert gas.
[0026] Preferably, when the metallic film is TiN, the intermediate
mask producing step comprises etching the metallic film using a gas
mixture comprising:
[0027] (i) a halogen gas or a halogen containing gas;
[0028] (ii) oxygen or oxygen containing gas; and
[0029] (iii) an inert gas.
[0030] Preferably, the fluorine containing gas is selected from the
group consisting of CF.sub.4, C.sub.2F.sub.4, C.sub.3F.sub.6,
C.sub.3F.sub.8, C.sub.4F.sub.6, C.sub.4F.sub.8, C.sub.5F.sub.8,
CHF.sub.3, CH.sub.2F.sub.2, CH.sub.3F, NF.sub.3 and SF.sub.6.
[0031] Preferably, the halogen gas is Cl.sub.2.
[0032] Preferably, the halogen containing gas is selected from the
group consisting of BCl.sub.3 and HBr.
[0033] Preferably, the oxygen containing gas is selected from the
group consisting of CO.sub.2, NO and NO.sub.2.
[0034] Preferably, the inert gas is selected from the group
consisting of He, Ne, Ar and Xe.
[0035] Preferably, the conductive material is selected from the
group consisting of a polysilicon, tungsten and Ti/TiN.
[0036] Another aspect of the present invention provides a method
for fabricating a semiconductor device, comprising the steps
of:
[0037] forming a semiconductor substrate comprising a MOSFET and a
device isolation film;
[0038] forming a conductive material layer on said semiconductor
substrate;
[0039] forming an Al.sub.2O.sub.3 film on said conductive material
layer;
[0040] forming a photoresist film mask on said conductive material
layer for protecting a presumed region of a bit line contact plug
and a storage electrode contact plug;
[0041] producing an intermediate mask by etching said
Al.sub.2O.sub.3 film using said photoresist film mask;
[0042] producing a contact plug mask by coating a polymer
comprising Al on the side walls of said intermediate mask;
[0043] producing a bit line contact plug and a storage electrode
contact plug by etching said conductive material layer using said
contact plug mask; and
[0044] removing said contact plug mask.
[0045] Preferably, the polymer comprising Al is removed using a
mixed solution of HF/NH.sub.4F/DI or
H.sub.2SO.sub.4/H.sub.2O.sub.2/DI. DI means "de-ionized water".
[0046] Preferably, the Al.sub.2O.sub.3 film is removed using a
mixed solution of H.sub.2SO.sub.4/H.sub.2O.sub.2/DI.
BRIEF DESCRIPTION OF THE DRAWINGS
[0047] FIG. 1 is a layout diagram illustrating a method for
fabricating a semiconductor device in accordance with the present
invention; and
[0048] FIGS. 2A through 2D are cross-sectional diagrams
illustrating the method for fabricating the semiconductor device,
taken along line A-A' in FIG. 1.
DETAILED DESCRIPTION OF THE INVENTION
[0049] The present invention will be described with regard to the
accompanying drawings which do not constitute limitations on the
scope thereof but assist in illustrating various features of the
invention. Like numbers in the drawings represent like
elements.
[0050] As shown in FIG. 1, gate electrodes 15 are formed at a
predetermined interval, active regions 12 are formed between the
gate electrodes 15, and a photoresist film pattern (i.e., mask) 25
is formed to protect a presumed region of bit line and storage
electrode contacts in subsequent processes.
[0051] As illustrated in FIG. 2A, a device isolation film 13 is
formed at a presumed device isolation region of the semiconductor
substrate 11. A gate insulation film (not shown) is formed over the
resultant structure. A conductive layer for the gate electrode (not
shown) and a mask insulation film (not shown) are formed on the
gate insulation film. The structure is then etched using a gate
electrode mask (not shown) to produce a mask comprising the gate
electrode and mask insulation film, elements 15 and 17 in FIG. 2A,
respectively. An insulation film is formed over the resultant
structure and etched to form an insulation film spacer 19 at the
side walls of the gate electrode 15 and the mask insulation film
17.
[0052] Although not illustrated, a lightly doped impurity is
ion-implanted into the semiconductor substrate 11 at both sides of
the insulation film spacer 19, thereby forming active, i.e.,
source/drain, regions (not shown). A conductive layer 21a is formed
over the resultant structure. An Al.sub.2O.sub.3 film 23a is formed
on the conductive layer 21a at a substantially predetermined
thickness. Preferably, the conductive layer 21a consists of a
material selected from the group consisting of a polysilicon,
tungsten and Ti/TiN film. Instead of an Al.sub.2O.sub.3 film,
Ta.sub.2O.sub.5 film or TiN film can be used as the metallic film
23a.
[0053] The photoresist film mask 25, which is used to protect a
presumed region of a bit line contact plug and a storage electrode
contact plug, is formed on the Al.sub.2O.sub.3 film 23a. And the
photoresist film mask 25 is used to form an Al.sub.2O.sub.3 mask
23b by etching the Al.sub.2O.sub.3 film. The polymer 27 comprising
Al is formed at the side walls of the photoresist film mask 25,
thereby producing the photoresist film mask 25, which is wider than
the contact plug region.
[0054] The Al.sub.2O.sub.3 film 23a can be etched using a mixed gas
which comprises each of (i) a fluorine containing gas, (ii) a
halogen gas or a halogen containing gas, (iii) oxygen (O.sub.2) or
an oxygen containing gas and (iv) an inert gas. Preferably, the
fluorine containing gas is selected from the group consisting of
CF.sub.4, C.sub.2F.sub.4, C.sub.3F.sub.6, C.sub.3F.sub.8,
C.sub.4F.sub.6, C.sub.4F.sub.8, C.sub.5F.sub.8, CHF.sub.3,
CH.sub.2F.sub.2, CH.sub.3F, NF.sub.3 and SF.sub.6. Preferably, the
halogen gas is Cl.sub.2. Preferably, the halogen containing gas is
selected from the group consisting of BCl.sub.3 and HBr.
Preferably, the oxygen containing gas is selected from the group
consisting of CO.sub.2, NO and NO.sub.2. Preferably, the inert gas
is selected from the group consisting of He, Ne, Ar and Xe.
[0055] When the Ta.sub.2O.sub.5 film is used instead of the
Al.sub.2O.sub.3 film for element 23a, an etching process of the
Ta.sub.2O.sub.5 film is carried out by using the mixed gas
described above and the side walls of the photoresist film mask 25
is coated with a polymer comprising Ta. And when a TiN film is used
instead of the Al.sub.2O.sub.3 film for element 23a, the TiN film
can be etched using a mixed gas comprising each of (i) a halogen
gas or a halogen containing gas, (ii) oxygen or an oxygen
containing gas, and (iii) an inert gas, and coating the resulting
side walls of the mask with a polymer comprising Ti.
[0056] The conductive layer 21a is etched by using the photoresist
film pattern 25 and the polymer 27 as a mask to produce a contact
plug 21b contacting a presumed region of the bit line contact and
the storage electrode contact on the semiconductor substrate 11.
Said contact plug 21b is indicating patterned 21a.
[0057] The photoresist film mask 25, polymer 27 and Al.sub.2O.sub.3
film pattern 23b are removed. The polymer 27 can be removed using a
mixed solution of strong acid, such as HF/NH.sub.4F/DI or
H.sub.2SO.sub.4/H.sub.2O.sub.2/DI. The Al.sub.2O.sub.3 film pattern
23b can be removed using a mixed solution of
H.sub.2SO.sub.4/H.sub.2O.sub.2/D- I. The present method prevents
the mask insulation film pattern 17 and insulation film spacers 19
from being damaged (refer to FIG. 2D).
[0058] An interlayer insulation film (not shown) is formed over the
resultant structure in the subsequent process. An etching process
is performed to form a contact hole exposing the presumed region of
a bit line and/or the storage electrode on the contact plug
21b.
[0059] Preferably, the interlayer insulation film comprises a
material which can be etched easily relative to the mask insulation
film pattern 17 and the insulation film spacers 19. Preferably, the
interlayer insulation film is etched using a fluorocarbon gas which
is capable of generating a large amount of polymers, such as
C.sub.2F.sub.6, C.sub.2F.sub.4, C.sub.3F.sub.6, C.sub.3F.sub.8,
C.sub.4F.sub.6, C.sub.4F.sub.8, C.sub.5F.sub.8, C.sub.5F.sub.10 or
C.sub.2HF.sub.5. Alternatively, the etching process can also be
carried out using a gas mixture comprising (i) the fluorocarbon
gas, and (ii) hydrogen (H.sub.2) or a hydrogen containing gas, such
as CHF.sub.3, CH.sub.3F, CH.sub.2F.sub.2, CH.sub.2, CH.sub.4, and
C.sub.2H.sub.4. An inert gas such as He, Ne, Ar or Xe can be added
to the fluorocarbon gas and the gas mixture, which can improve
plasma stability and sputtering effects and reduces or eliminates
an etch stop phenomenon, thereby significantly improving the
etching process reproducibility.
[0060] Still alternatively, the interlayer insulation film can be
etched using a C.sub.xH.sub.yF.sub.z gas (where x.gtoreq.2,
y.gtoreq.2, z.gtoreq.2). This gas provides a high etching selection
ratio difference between the mask insulation film pattern 17 and
the insulation film spacers 19. The etching can also be carried out
by utilizing a mixture of gas comprising a C.sub.xH.sub.yF.sub.z
gas and an inert gas, which are described above.
[0061] Methods of the present invention produces the contact plug
that is larger than the presumed contact region. As a result, the
acceptable process error margin for misalignment is increased, and
the property and yield of semiconductor devices are improved.
[0062] As the present invention may be embodied in several forms
without departing from the spirit or essential characteristics
thereof, it should also be understood that the above-described
embodiment is not limited by any of the details of the foregoing
description, unless otherwise specified, but rather should be
construed broadly within its spirit and scope as defined in the
appended claims, and therefore all changes and modifications that
fall within the meets and bounds of the claims, or equivalents of
such meets and bounds are therefore intended to be embraced by the
appended claims.
* * * * *