U.S. patent application number 09/407298 was filed with the patent office on 2001-11-15 for photoelectric conversion device.
Invention is credited to UENO, ISAMU.
Application Number | 20010040634 09/407298 |
Document ID | / |
Family ID | 12557995 |
Filed Date | 2001-11-15 |
United States Patent
Application |
20010040634 |
Kind Code |
A1 |
UENO, ISAMU |
November 15, 2001 |
PHOTOELECTRIC CONVERSION DEVICE
Abstract
This invention provides an element having a skimming charge
transfer function in an X-Y address type photoelectric conversion
device using, e.g., a CMOS sensor, and a photoelectric conversion
device, which accumulates photoelectric signal charges produced by
a photoelectric conversion element in a control electrode (gate) of
a MOS transistor so as to obtain a signal with a high S/N ratio by
removing signal components produced by background radiation without
using any CCD as an accumulation means of skimming charges, has a
skimming electrode for transferring skimming charges of those
produced by the photoelectric conversion element, an n.sup.+-type
region for accumulating the transferred skimming charges, a MOS
transistor for reading out potential changes caused by the skimming
charges, and a circuit for automatically controlling the amount of
skimming charges to be transferred.
Inventors: |
UENO, ISAMU; (HADANO-SHI,
JP) |
Correspondence
Address: |
FITZPATRICK CELLA HARPER & SCINTO
30 ROCKEFELLER PLAZA
NEW YORK
NY
10112
US
|
Family ID: |
12557995 |
Appl. No.: |
09/407298 |
Filed: |
September 29, 1999 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
09407298 |
Sep 29, 1999 |
|
|
|
08805968 |
Feb 25, 1997 |
|
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Current U.S.
Class: |
348/303 ;
348/230.1; 348/241; 348/308; 348/E3.018; 348/E3.021 |
Current CPC
Class: |
H04N 5/37452 20130101;
H04N 5/3592 20130101; H04N 5/359 20130101; H04N 5/374 20130101 |
Class at
Publication: |
348/303 ;
348/308; 348/230; 348/241 |
International
Class: |
H04N 005/235; H04N
003/14 |
Foreign Application Data
Date |
Code |
Application Number |
Feb 27, 1996 |
JP |
8-39614 |
Claims
What is claimed is:
1. A photoelectric conversion device for accumulating photoelectric
signal charges produced by photoelectric conversion means in a
control electrode, comprising: means for transferring skimming
charges of the charges produced by said photoelectric conversion
means; means for accumulating the transferred skimming charges;
means for reading out a potential change caused by the skimming
charges; and means for automatically controlling an amount of
skimming charges to be transferred.
2. A device according to claim 1, further comprising: photoelectric
conversion means consisting of a first diffusion layer which is
formed on a semiconductor substrate of one conductivity type and is
doped with an impurity of a conductivity type opposite to the one
conductivity type; a transfer electrode for transferring
photoelectric charges produced by said photoelectric conversion
means; an accumulation electrode for accumulating the transferred
photoelectric charges; a skimming electrode for transferring
skimming charges of the accumulated photoelectric charges; a second
diffusion layer of the opposite conductivity type for accumulating
the skimming charges; means, connected to said second diffusion
layer, for outputting a potential change caused by the skimming
charges onto an output line; and means for resetting charges which
remain after the skimming charges are transferred.
3. A device according to claim 1, wherein said means for
automatically controlling the amount of skimming charges to be
transferred comprises: means for detecting a maximum signal of the
skimming charges; and means for comparing the maximum signal of the
skimming charges with an appropriate signal level, controlling a
skimming voltage to increase the amount of skimming charges when
the maximum signal of the skimming charges is smaller than the
appropriate signal level, and controlling the skimming voltage to
decrease the amount of skimming charges when the maximum signal of
the skimming charges is larger than the appropriate signal
level.
4. A device according to claim 3, further comprising means for
monitoring pixel voltages during an accumulation period of charges
by said photoelectric conversion means, and automatically setting
the skimming voltage.
5. A device according to claim 1, wherein control of the amount of
skimming charges is performed in units of blocks each including a
plurality of pixels, each of which has said photoelectric
conversion means.
6. A device according to claim 1, further comprising output means
having a MOS inverting amplifier circuit.
7. A device according to claim 2, further comprising a single
electrode which serves as said transfer electrode, said
accumulation electrode, and said skimming electrode.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a photoelectric conversion
device, for example, to one-dimensional or two-dimensional
photoelectric conversion devices for reading images in a video
camera, X-ray imaging apparatus, infrared ray imaging apparatus,
and the like and, more particularly, to a photoelectric conversion
device using a skimming charge transfer scheme.
[0003] 2. Related Background Art
[0004] Conventionally, CCDs are popularly used as imaging devices
of video cameras, digital cameras, and the like, and such image
reading device uses a "charge skimming transfer scheme" disclosed
in, e.g., IEEE trans. Electron. vol. ED-29, p. 3, 1982 and Japanese
Patent Publication No. 7-48826.
[0005] FIG. 13 shows an infrared ray imaging apparatus using the
conventional charge skimming transfer scheme described in Japanese
Patent Publication No. 7-48826. FIGS. 12A and 12B show changes in
charge amount before and after charge skimming transfer, and FIGS.
11A to 11C show the input circuit of a charge skimming transfer
type infrared ray imaging element.
[0006] FIGS. 11A to 11C and FIG. 13 illustrate a photodiode 101, a
silicon CCD 102, infrared rays 104, an output circuit 105, an input
gate electrode 110, an accumulation electrode 111, a skimming
electrode 112, a CCD electrode 113, an overflow drain 114, an
overflow electrode 115, and a skimming voltage input terminal
119.
[0007] In FIGS. 12A and 12B, charges 116 are produced due to
background radiation, charges 117 are ascribed to radiation from a
signal source, and charges are skimmed at a skimming level 118.
[0008] The operation of the charge skimming transfer type infrared
ray imaging element with the above arrangement will be described
below with reference to the drawings.
[0009] (1) As shown in FIG. 11A, infrared rays 104 are converted
into photocurrents by the photodiode 101, and the photocurrents are
input to and accumulated in a portion beneath the accumulation
electrode 111 via the input gate electrode 110.
[0010] (2) Upon completion of accumulation, as shown in FIG. 11B, a
pulse signal is applied to the skimming electrode 112 to change the
height of the potential well to transfer some accumulated charges
to a portion underneath the CCD electrode 113. The amount of
charges to be transferred is controlled by the pulse signal (to be
referred to as a skimming voltage hereinafter) to be applied to the
skimming electrode 112.
[0011] (3) Thereafter, as shown in FIG. 11C, charges remaining in
the portion beneath the accumulation electrode 111 are ejected to
the overflow drain 114 via the overflow electrode 115.
[0012] When charge skimming transfer is performed, as described
above, since DC components 116 produced by the background radiation
can be removed, as shown in FIGS. 12A and 12B, contrast can be
emphasized, and the amount of charges to be transferred to the
portion beneath the CCD electrode 113 can be reduced.
[0013] Charges transferred to the portion below the CCD electrode
113 are sequentially transferred by the CCD 102 in the same manner
as in a case wherein the charge skimming transfer scheme is not
adopted, and are output to an external circuit via the output
circuit 105.
[0014] As described above, in the conventional photoelectric
conversion device, when the number of photons of background
radiation is extremely larger than the number of photons radiated
by the signal source, the obtained signal has low contrast, and
such problem cannot be solved by merely extending the accumulation
time of the silicon CCD. In the above-mentioned prior art, this
problem is solved by performing skimming charge transfer. However,
since the skimming voltage is calculated and generated by an
external circuit on the basis of the signal voltages of the
respective pixels, other problems such as a long processing time,
high cost of the entire system, and the like are posed.
[0015] On the other hand, an X-Y address type photoelectric
conversion device, which uses a CMOS sensor or the like in place of
the CCD and comprises a charge skimming transfer means, has not
reached practical application level yet.
SUMMARY OF THE INVENTION
[0016] It is an object of the present invention to provide an
element comprising a skimming charge transfer function in an X-Y
address type photoelectric conversion device using, e.g., a CMOS
sensor and having excellent characteristics.
[0017] It is another object of the present invention to obtain a
signal with a high S/N ratio by removing signal components produced
by background radiation without using any CCD as a skimming charge
accumulation means.
[0018] According to one aspect of the present invention, a
photoelectric conversion device for accumulating photoelectric
signal charges produced by photoelectric conversion means in a
control electrode, comprises:
[0019] means for transferring skimming charges of the charges
produced by the photoelectric conversion means;
[0020] means for accumulating the transferred skimming charges;
[0021] means for reading out a potential change caused by the
skimming charges; and
[0022] means for automatically controlling an amount of skimming
charges to be transferred.
[0023] According to another aspect of the present invention, the
photoelectric conversion device further comprises:
[0024] photoelectric conversion means consisting of a first
diffusion layer which is formed on a semiconductor substrate of one
conductivity type and is doped with an impurity of a conductivity
type opposite to the one conductivity type;
[0025] a transfer electrode for transferring photoelectric charges
produced by the photoelectric conversion means;
[0026] an accumulation electrode for accumulating the transferred
photoelectric charges;
[0027] a skimming electrode for transferring skimming charges of
the accumulated photoelectric charges;
[0028] a second diffusion layer of the opposite conductivity type
for accumulating the skimming charges;
[0029] means, connected to the second diffusion layer, for
outputting a potential change caused by the skimming charges onto
an output line; and
[0030] means for resetting charges which remain after the skimming
charges are transferred.
[0031] According to still another aspect of the present invention,
the photoelectric conversion device comprises means for reading out
all skimming charge signals in pixels having the photoelectric
conversion means, and controlling the skimming amount by a skimming
voltage corresponding to a maximum voltage of the readout skimming
charge signals.
[0032] The photoelectric conversion device of the present invention
also comprises means for monitoring pixel voltages during an
accumulation period of charges by the photoelectric conversion
means, and automatically setting the skimming voltage.
[0033] According to an embodiment of the present invention, when a
MOS transistor is used as a skimming charge accumulation means in
place of a CCD which is used in the conventional device, a charge
skimming transfer type photoelectric conversion device which can
remove background signal components as in the conventional device,
and can still provide a signal having a high S/N ratio and, hence,
high contrast can be realized.
[0034] According to another embodiment of the present invention,
since the skimming voltage can be automatically controlled in real
time, an optimal skimming charge amount can be easily obtained.
[0035] Other objects and features of the present invention will
become apparent from the following description of the embodiments
taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0036] FIGS. 1A to 1C are circuit diagrams showing a circuit for
one pixel and a skimming charge transfer scheme according to the
first embodiment of the present invention;
[0037] FIG. 2 is a circuit diagram of the first embodiment of the
present invention;
[0038] FIG. 3 is a timing chart of the first embodiment of the
present invention;
[0039] FIG. 4 is a flow chart showing the operation according to
the first embodiment of the present invention;
[0040] FIG. 5 is a circuit diagram of an automatic skimming voltage
control circuit according to the first embodiment of the present
invention;
[0041] FIGS. 6A and 6B are respectively a circuit diagram and a
timing chart of a maximum value detection circuit for a pixel
signal according to the first embodiment of the present
invention;
[0042] FIG. 7 is a circuit diagram of the second embodiment of the
present invention;
[0043] FIG. 8 is a circuit diagram of the third embodiment of the
present invention;
[0044] FIG. 9 is a circuit diagram of a circuit for one pixel
according to the fourth embodiment of the present invention;
[0045] FIG. 10 is a circuit diagram of a circuit for one pixel
according to the fifth embodiment of the present invention;
[0046] FIGS. 11A to 11C are circuit diagrams for explaining the
conventional charge skimming scheme;
[0047] FIGS. 12A and 12B are graphs showing the relationship
between the skimming operation and the charge amount; and
[0048] FIG. 13 is a circuit diagram for explaining the conventional
charge skimming scheme.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0049] The preferred embodiments of the present invention will be
described in more detail hereinafter with reference to the
accompanying drawings.
[0050] FIGS. 1A to 1C show the sectional structure and peripheral
circuits of a photoelectric conversion element according to the
first embodiment of the present invention, and also illustrate the
charge skimming transfer processes.
[0051] Referring to FIGS. 1A to 1C, a photoelectric conversion
device comprises a photodiode 1, which is illustrated as a circuit
element on the circuit diagram for the sake of simplicity (however,
an actual photodiode 1 is constituted by the p-n junction between a
p-type semiconductor substrate and an n.sup.+-type diffusion layer
30; the same applies to the photodiode shown in the other figures).
The device also comprises a driver MOSFET 2 for outputting a
signal. The drain terminal of the MOSFET 2 is connected to an
output line via a selection switch 13, and a resistive load or
constant current load (not shown) is inserted in the output line.
The load element and the driver MOSFET 2 constitute an amplifier.
The device further comprises an input gate electrode 10, an
accumulation electrode 11, a skimming electrode 12, and a MOS
switch 16 for resetting the floating gate of the MOSFET 2.
[0052] Such photoelectric conversion device accumulates
photoelectric signal charges produced by a photoelectric conversion
means 1 in the control electrode (gate) of a MOS transistor 2, and
is characterized by comprising:
[0053] a skimming electrode 12 serving as means for transferring
skimming charges of those produced by the photoelectric conversion
means 1;
[0054] an n.sup.+-type region 31 serving as means for accumulating
the transferred skimming charges;
[0055] a MOS transistor 2 serving as means for reading out
potential changes caused by the skimming charges; and
[0056] means (to be described later with reference to FIG. 2) for
automatically controlling the amount of skimming charges to be
transferred.
[0057] Also, a photoelectric conversion device is characterized by
comprising:
[0058] photoelectric conversion means consisting of a first
diffusion layer 30 which is formed on a semiconductor substrate of
one conductivity type and is doped with an impurity of a
conductivity type opposite to the one conductivity type;
[0059] a transfer electrode 10 for transferring photoelectric
charges produced by the photoelectric conversion means;
[0060] an accumulation electrode 11 for accumulating the
transferred photoelectric charges;
[0061] a skimming electrode 12 for transferring skimming charges of
the accumulated photoelectric charges;
[0062] a second diffusion layer 31 of the opposite conductivity
type for accumulating the skimming charges;
[0063] means 2, connected to the second diffusion layer 31, for
outputting potential changes caused by the skimming charges onto an
output line; and
[0064] means 14 and 15 for resetting charges which remain after the
skimming charges are transferred.
[0065] The charge skimming transfer operation of this embodiment
will be described below with reference to the drawings.
[0066] (1) As shown in FIG. 1A, light 4 is converted into
photocurrents by the photodiode 1 as the photoelectric conversion
means, and the photocurrents are input to and accumulated in a
portion beneath the accumulation electrode 11 via the input gate
electrode 10.
[0067] (2) Upon completion of accumulation, as shown in FIG. 1B, a
pulse signal is applied to the skimming electrode 12 to change the
height of the potential well, and some accumulated charges
(skimming charges) are transferred to the n.sup.+-type diffusion
layer 31 connected to the floating gate of the MOS transistor 2.
The amount of charges to be transferred is controlled by the pulse
signal (skimming voltage) to be applied to the skimming electrode
12.
[0068] (3) Thereafter, as shown in FIG. 1C, residual charges
underneath the accumulation electrode 11 are ejected to the
overflow drain 14 via the overflow electrode 15.
[0069] When charge skimming transfer is performed, as described
above, since DC components 116 produced by the background radiation
can be removed, as shown in FIGS. 12A and 12B, contrast can be
emphasized, and a signal with a high S/N ratio can be obtained.
[0070] By appropriately repeating the operations (1) to (3), the
background signal components can be removed, and a signal with a
higher S/N ratio can be obtained.
[0071] In this embodiment, since signal charges can be
non-destructively read out, the skimming amount can be
automatically optimized by reading signals during the accumulation
period, and setting the skimming voltage based on, e.g., a voltage
corresponding to the maximum signal of skimming charges of all the
pixels.
[0072] In pixels having the photoelectric conversion means, signals
may be read out in units of pixel blocks, and the skimming amount
can be controlled by a skimming voltage corresponding to the
minimum voltage of the readout signals in units of pixel blocks.
Such control in units of clocks can be realized by controlling
scanning circuits for scanning the respective pixels to locally
scan the pixels.
[0073] FIG. 2 is a schematic circuit diagram showing a MOS linear
sensor as an example of the photoelectric conversion device of the
first embodiment described above with reference to FIGS. 1A to 1C.
FIG. 2 shows circuits for four pixels, and a dotted line portion G1
as a peripheral circuit for one pixel will be explained below. Note
that the selection switch 13 in FIGS. 1A to 1C is not shown in FIG.
2.
[0074] In FIG. 2, the circuit comprises a photodiode 1 serving as a
photoelectric conversion means, which is illustrated as a circuit
element on the circuit diagram for the sake of simplicity (however,
an actual photodiode 1 is constituted by the p-n junction between a
p-type semiconductor substrate and an n.sup.+-type diffusion layer
30; the same applies to the photodiode shown in the other figures).
The circuit also comprises a driver MOSFET 2 for outputting a
signal. The drain terminal of the MOSFET 2 is connected to an
output line, and a MOSFET 17 serving as a load resistor is inserted
in the output line. The load element 17 and the driver MOSFET 2
constitute a source-follower amplifier for each pixel. The circuit
further comprises an input gate electrode 10, an accumulation
electrode 11, a skimming electrode 12, and a MOS switch 16 for
resetting the floating gate of the MOSFET 2.
[0075] The circuit further comprises an overflow drain 14 and a
MOSFET 15 serving as an overflow control switch.
[0076] Moreover, the sensor comprises an automatic skimming voltage
control circuit 51, and a circuit 52 for detecting the maximum
value of skimming charges of each pixel.
[0077] The circuits 51 and 52 as means for automatically
controlling the skimming charge amount detect the maximum signal of
skimming charges, and compare it with a proper signal level. When
the maximum signal of the skimming charges is smaller than the
proper signal level, the means controls the skimming voltage to
increase the amount of skimming charges; otherwise, the means
controls the skimming voltage to decrease the amount of skimming
charges.
[0078] In FIG. 2, the skimming electrode 12 serves as means for
transferring skimming charges of those produced by the
photoelectric conversion means, the automatic skimming voltage
control circuit 51 and the maximum value detection circuit 52 for
detecting the maximum value of skimming charges of each pixel serve
as means for controlling the amount of skimming charges to be
transferred,
[0079] an n.sup.+-type region 31 serves as means for accumulating
the transferred skimming charges, and
[0080] the MOS switch 15 serves as means for resetting charges
which remain after the skimming charges of those produced by the
photoelectric conversion means are transferred.
[0081] FIG. 3 is a timing chart of the circuit in FIG. 2, and FIG.
4 is a flow chart showing the control scheme and operation of the
circuit in FIG. 2.
[0082] The operation of this embodiment will be briefly described
below with reference to FIGS. 3 and 4.
[0083] At time t.sub.o, pulses .phi..sub.R, .phi..sub.T, and
.phi..sub.SKM are applied to reset the residual charges in the
pixels. Upon completion of resetting (t.sub.1), accumulation of
photoelectric charges is started.
[0084] At time t.sub.2, when pulses .phi..sub.T and .phi..sub.S are
applied, and a pulse .phi..sub.SKM of an initial voltage is applied
to the skimming electrodes, skimming charges corresponding to the
applied voltage are read out to the floating gates of the
transistors 2 of the respective pixels. At this time, when pulses
.phi..sub.L and .phi..sub.TR are also applied, the source-follower
amplifiers of the respective pixels operate to read out pixel
signals to capacitors C.sub.T1 to C.sub.T4.
[0085] Thereafter, a scanning circuit 21 is operated from times
t.sub.3 to t.sub.4 to serially read out the signals from the
capacitors C.sub.T1 to C.sub.T4 to an output terminal 53, and the
circuit block 52 obtains, e.g., the maximum value of these
signals.
[0086] The circuit block 51 generates an optimal skimming voltage
.phi..sub.SKM in accordance with the obtained maximum signal
amount, and applies it to the respective pixel at time t.sub.5 to
perform skimming transfer and signal read again.
[0087] By repeating the series of operations described above, an
optimal skimming signal can be obtained.
[0088] In the above description, after skimming transfer, the
pixels continue charge accumulation without resetting the
accumulation electrodes. Alternatively, the accumulation electrode
and pixel portions may be reset in each scan and thereafter,
accumulation may be resumed.
[0089] FIG. 5 shows an example of an automatic setting circuit of a
skimming voltage during the accumulation period, which is denoted
by 51 in FIG. 2. In this circuit, an input signal (the signal
output from an output amplifier 54 in FIG. 2) is inverted and
amplified by an inverting amplifier 61, and its output voltage is
reflected in the amplitude of the pulse .phi..sub.SKM. More
specifically, as the input signal is smaller, the amplitude of the
pulse .phi..sub.SKM becomes larger to automatically increase the
amount of skimming charges to be transferred.
[0090] FIGS. 6A and 6B show an example of a circuit for detecting
the maximum value of skimming charge signals of the respective
pixels, which circuit is denoted by 52 in FIG. 2. FIG. 6A is a
circuit diagram, and FIG. 6B is a timing chart thereof. In the
circuit operation, a pulse .phi..sub.INIT changes to Hi-level to
turn on a MOS switch 71, thereby resetting a capacitor 72.
Thereafter, every time a signal is input, the input signal is
compared with a voltage in the capacitor 72. If the input signal is
lower than the voltage in the capacitor 72, a pulse OUT changes to
V.sub.CC level shown in FIG. 6B; otherwise, the pulse OUT changes
to GND level. As a consequence, a PMOS 73 is turned on, and the
input signal is written in the capacitor 72. Upon completion of a
series of operations, a pulse .phi..sub.READ changes to high-level
to turn on a MOS switch 74 so as to form a feedback loop, thereby
outputting the voltage in the capacitor 72.
[0091] FIG. 7 is a circuit diagram showing the second embodiment,
which is substantially the same as the first embodiment, except for
means for detecting a maximum value of pixels.
[0092] In FIG. 7, an NPN transistor 23 is inserted in the output
line of each pixel, and its emitter is commonly connected. With
this arrangement, when signals are read out from the respective
pixels to capacitors C.sub.1 to C.sub.4, the maximum value of the
signals can be immediately obtained.
[0093] In this case, a circuit 52' may be a simple buffer
amplifier.
[0094] FIG. 8 shows the third embodiment, which is substantially
the same as the first embodiment, except that the means for
detecting the maximum signal of pixels is replaced by means for
detecting background light.
[0095] In FIG. 8, for example, a pixel G4 enclosed in the dotted
line serves as a dummy pixel, which is arranged at a position where
no signal light is incident, and the voltage of background light is
obtained based on the output from this pixel, thereby controlling
the skimming voltage.
[0096] FIG. 9 is a circuit diagram of a photoelectric conversion
element according to the fourth embodiment of the present
invention.
[0097] This embodiment is substantially the same as the first
embodiment, except that the output amplifier in the device
described in the first embodiment is replaced by an NMOS inversion
circuit. With this arrangement, the gain can be set to be 1 or
more. Note that the same reference numerals in FIG. 9 denote the
same parts as those in FIGS. 1A to 1C, and a detailed description
thereof will be omitted.
[0098] FIG. 10 is a circuit diagram of a photoelectric conversion
element according to the fifth embodiment of the present
invention.
[0099] In this embodiment, the skimming electrode 12 alone is
arranged to also play roles of the input gate electrode and the
accumulation electrode in the above-mentioned embodiment.
[0100] After skimming charges of those produced by a photodiode are
transferred to an n.sup.+-type region 31, the residual charges are
ejected by a MOS switch 15 arranged in an n.sup.+-type region
30.
[0101] The amount of skimming charges is controlled by the skimming
electrode 12 in the same manner as in the above embodiment.
[0102] In the above embodiments, the photoelectric conversion
device which reads out a photoelectric signal by transferring it to
the gate electrode of the MOS transistor has been described. The
present invention can also be applied to other photoelectric
conversion devices such as a FGA (floating gate array device), an
AMI (amplified MOS intelligent imager), a BASIS (base-stored image
sensor), and the like.
[0103] In the above embodiments, a one-dimensional photoelectric
conversion device has been exemplified. However, the same effect
can be obtained even when the present invention is applied to a
two-dimensional photoelectric conversion device.
[0104] In the above embodiments, n-type layers are used as the
diffusion layers 30 and 31. Alternatively, an n-type semiconductor
substrate and p-type diffusion layers may be used.
[0105] As described above, according to the present invention,
since, for example, the MOS transistor is used as the accumulation
means of skimming charges in place of a CCD which is used in the
conventional device, a charge skimming transfer type photoelectric
conversion device which can remove background signal components as
in the conventional device, and can yet provide a signal with a
high S/N ratio and, hence, high contrast, can be realized.
[0106] Also, according to the present invention, since the skimming
voltage can be automatically controlled in real time, an optimal
skimming charge amount can be obtained.
[0107] Many widely different embodiments of the present invention
may be constructed without departing from the spirit and scope of
the present invention. It should be understood that the present
invention is not limited to the specific embodiments described in
the specification, except as defined in the appended claims.
* * * * *