U.S. patent application number 09/790589 was filed with the patent office on 2001-09-27 for solar cell module and method of producing the same.
Invention is credited to Iwasaki, Yukiko, Nakagawa, Katsumi, Nishida, Shoji.
Application Number | 20010023702 09/790589 |
Document ID | / |
Family ID | 15116050 |
Filed Date | 2001-09-27 |
United States Patent
Application |
20010023702 |
Kind Code |
A1 |
Nakagawa, Katsumi ; et
al. |
September 27, 2001 |
Solar cell module and method of producing the same
Abstract
The solar cell module of the present invention comprises a
plurality of unit cells connected in series, each of the unit cells
comprising in this order an electrode, a first semiconductor layer
having a first conductivity type and a second semiconductor layer
having a second conductivity type, wherein the electrode has a
region not covered with the first semiconductor layer, wherein the
second semiconductor layer has a main region and a subregion which
are separated by a groove, wherein the main region of the second
semiconductor layer in one unit cell of the unit cells is
electrically connected to the region of the electrode not covered
with the first semiconductor layer in another unit cell adjacent to
the one unit cell, and wherein the region of the electrode not
covered with the first semiconductor layer in the one unit cell is
electrically connected to the subregion of the second semiconductor
layer in the another unit cell, whereby it is possible to simplify
a step of forming a bypass diode and the present invention
therefore can provides a solar cell module with a high reliability
at a low cost.
Inventors: |
Nakagawa, Katsumi;
(Atsugi-shi, JP) ; Nishida, Shoji; (Hiratsuka-shi,
JP) ; Iwasaki, Yukiko; (Atsugi-shi, JP) |
Correspondence
Address: |
FITZPATRICK CELLA HARPER & SCINTO
30 ROCKEFELLER PLAZA
NEW YORK
NY
10112
US
|
Family ID: |
15116050 |
Appl. No.: |
09/790589 |
Filed: |
February 23, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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09790589 |
Feb 23, 2001 |
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09310953 |
May 13, 1999 |
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6248948 |
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Current U.S.
Class: |
136/244 |
Current CPC
Class: |
Y02E 10/50 20130101;
H01L 31/042 20130101; H01L 31/0504 20130101; H01L 31/0443
20141201 |
Class at
Publication: |
136/244 |
International
Class: |
H01L 025/00 |
Foreign Application Data
Date |
Code |
Application Number |
May 15, 1998 |
JP |
10-133914 |
Claims
What is claimed is:
1. A solar cell module comprising a plurality of unit cells
connected in series, each of the unit cells comprising in this
order an electrode, a first semiconductor layer having a first
conductivity type and a second semiconductor layer having a second
conductivity type, wherein the electrode has a region not covered
with the first semiconductor layer, wherein the second
semiconductor layer has a main region and a subregion which are
separated by a groove, wherein the main region of the second
semiconductor layer in one unit cell of the unit cells is
electrically connected to the region of the electrode not covered
with the first semiconductor layer in another unit cell adjacent to
the one unit cell, and wherein the region of the electrode not
covered with the first semiconductor layer in the one unit cell is
electrically connected to the subregion of the second semiconductor
layer in the another unit cell.
2. A solar cell module according to claim 1, wherein the second
semiconductor layer is a layer having a low resistance.
3. A solar cell module according to claim 1, wherein the second
semiconductor layer is a doped layer having a high dopant
density.
4. A solar cell module according to claim 1, wherein the first
semiconductor layer is a p-type semiconductor layer and the second
semiconductor layer is an n.sup.+-type semiconductor layer.
5. A solar cell module according to claim 1, wherein the first
semiconductor layer is an n-type semiconductor layer and the second
semiconductor layer is a p.sup.+-type semiconductor layer.
6. A solar cell module according to claim 1, wherein each of the
unit cells has a rectangular shape, wherein a long side direction
of the rectangular shape is arranged so as to be perpendicular to a
generating line of a curved surface represented by a cylindrical
surface or a conical surface, and wherein each of the unit cells is
connected in series in a direction of the generating line.
7. A solar cell module according to claim 1, wherein at least one
of the first semiconductor layer and the second semiconductor layer
is a single-crystalline silicon layer.
8. A solar cell module according to claim 1, wherein at least one
of the first semiconductor layer and the second semiconductor layer
is a semiconductor sheet.
9. A solar cell module comprising a plurality of unit cells
connected in series, each of the unit cells comprising in this
order an electrode, a semiconductor layer and a transparent
electrode layer, wherein the electrode has a region not covered
with the semiconductor layer, wherein the transparent electrode
layer has a main region and a subregion which are separated by a
groove, wherein the main region of the transparent electrode layer
in one unit cell of the unit cells is electrically connected to the
region of the electrode not covered with the semiconductor layer in
another unit cell adjacent to the one unit cell, and wherein the
region of the electrode not covered with the semiconductor layer in
the one unit cell is electrically connected to the subregion of the
transparent electrode layer in the another unit cell.
10. A solar cell module according to claim 9, wherein each of the
unit cells has a rectangular shape, wherein a long side direction
of the rectangular shape is arranged so as to be perpendicular to a
generating line of a curved surface represented by a cylindrical
surface or a conical surface, and wherein each of the unit cells is
connected in series in a direction of the generating line.
11. A solar cell module according to claim 9, wherein the
semiconductor layer is a semiconductor sheet.
12. A method of producing a solar cell module, which comprises the
steps of: providing a plurality of unit cells, each of the unit
cells being produced by forming a second semiconductor layer having
a second conductivity type on one surface of a first semiconductor
layer having a first conductivity type, forming a groove in the
second semiconductor layer to separate the second semiconductor
layer into a main region and a subregion, and forming an electrode
having a region not covered with the first semiconductor layer on
other surface of the first semiconductor layer; adjacently
arranging the plurality of unit cells; electrically connecting the
main region of the second semiconductor layer in one unit cell of
the unit cells to the region of the electrode not covered with the
first semiconductor layer in another unit cell adjacent to the one
unit cell; electrically connecting the region of the electrode not
covered with the first semiconductor layer in the one unit cell to
the subregion of the second semiconductor layer in the another unit
cell.
13. A method of producing a solar cell module according to claim
12, wherein the formation of the groove is conducted by laser
scribing.
14. A method of producing a solar cell module, which comprises the
steps of: providing a plurality of unit cells, each of the unit
cells being produced by forming a transparent electrode layer on
one surface of a semiconductor layer, forming a groove in the
transparent electrode layer to separate the transparent electrode
layer into a main region and a subregion, and forming an electrode
having a region not covered with the semiconductor layer on other
surface of the semiconductor layer; adjacently arranging the
plurality of unit cells; electrically connecting the main region of
the transparent electrode layer in one unit cell of the unit cells
to the region of the electrode not covered with the semiconductor
layer in another unit cell adjacent to the one unit cell;
electrically connecting the region of the electrode not covered
with the semiconductor layer in the one unit cell to the subregion
of the transparent electrode layer in the another unit cell.
15. A method of producing a solar cell module according to claim
14, wherein the formation of the groove is conducted by laser
scribing.
16. A method of producing a solar cell module, which comprises the
steps of: providing a plurality of unit cells, each of the unit
cells being produced by forming a dopant supplying layer on one
surface of a first semiconductor layer having a first conductivity
type, forming a groove in the dopant supplying layer to separate
the dopant supplying layer into a main region and a subregion,
forming a second semiconductor layer having a second conductivity
type in the one surface of the first semiconductor layer by
diffusing a dopant from the dopant supplying layer, and forming an
electrode having a region not covered with the first semiconductor
layer on other surface of the first semiconductor layer; adjacently
arranging the plurality of unit cells; electrically connecting the
main region of the second semiconductor layer in one unit cell of
the unit cells to the region of the electrode not covered with the
first semiconductor layer in another unit cell adjacent to the one
unit cell; electrically connecting the region of the electrode not
covered with the first semiconductor layer in the one unit cell to
the subregion of the second semiconductor layer in the another unit
cell.
17. A method of producing a solar cell module according to claim
16, wherein the formation of the groove is conducted by laser
scribing.
18. A method of producing a solar cell module, which comprises the
steps of: providing a plurality of unit cells, each of the unit
cells being produced by forming a first semiconductor layer having
a first conductivity type on an electrode, forming a second
semiconductor layer having a second conductivity type on the first
semiconductor layer, and forming a groove in the second
semiconductor layer to separate the second semiconductor layer into
a main region and a subregion, a portion of a surface of the
electrode being exposed; adjacently arranging the plurality of unit
cells; electrically connecting the main region of the second
semiconductor layer in one unit cell of the unit cells to the
region of the electrode not covered with the first semiconductor
layer in another unit cell adjacent to the one unit cell;
electrically connecting the region of the electrode not covered
with the first semiconductor layer in the one unit cell to the
subregion of the second semiconductor layer in the another unit
cell.
19. A method of producing a solar cell module according to claim
18, wherein the first semiconductor layer is formed so that the
portion of the surface of the electrode is exposed.
20. A method of producing a solar cell module according to claim
18, wherein after the first semiconductor layer is formed, the
portion of the surface of the electrode is exposed.
21. A method of producing a solar cell module according to claim
18, wherein the formation of the groove is conducted by laser
scribing.
22. A method of producing a solar cell module, which comprises the
steps of: providing a plurality of unit cells, each of the unit
cells being produced by forming a semiconductor layer on an
electrode, forming a transparent electrode layer on the
semiconductor layer, and forming a groove in the transparent
electrode layer to separate the transparent electrode layer into a
main region and a subregion, a portion of a surface of the
electrode being exposed; adjacently arranging the plurality of unit
cells; electrically connecting the main region of the transparent
electrode layer in one unit cell of the unit cells to the region of
the electrode not covered with the semiconductor layer in another
unit cell adjacent to the one unit cell; electrically connecting
the region of the electrode not covered with the semiconductor
layer in the one unit cell to the subregion of the transparent
electrode layer in the another unit cell.
23. A method of producing a solar cell module according to claim
22, wherein the first semiconductor layer is formed so that the
portion of the surface of the electrode is exposed.
24. A method of producing a solar cell module according to claim
22, wherein after the first semiconductor layer is formed, the
portion of the surface of the electrode is exposed.
25. A method of producing a solar cell module according to claim
22, wherein the formation of the groove is conducted by laser
scribing.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to a solar cell module and a
method of producing it, more specifically to a solar cell module
which can be produced at a low cost, which shows a smaller
degradation of the energy conversion efficiency even in a state of
a partly shaded solar cell module and which is not damaged even
when maintained in such state for a long time, and a method of
producing such solar cell module. The present invention also
relates to a solar cell module that can effectively exhibit a high
energy conversion efficiency when installed on a curved surface,
and a method of producing such solar cell module.
[0003] 2. Related Background Art
[0004] The solar cell is widely developed and is starting to be
introduced for house use, as the environmentally acceptable clean
power source. The ordinary electric appliances are usually driven
with an alternating current of 100 V. On the other hand, the output
of the solar cell is a direct current and an inverter has to be
used in order to obtain an alternating current, and in such case
the inverter cannot be operated efficiently unless the output of
the solar cell is at least 100 V. Also when the electric power is
stored in a secondary battery, the DC output can be directly used
but the secondary battery is usually used at 12 V to 24 V.
[0005] However a unit cell of a solar cell can only provide the
output voltage of 0.5 to 0.6 V, also a unit cell of an amorphous
silicon solar cell of a relatively high output voltage can only
provide the output voltage of 0.7 to 0.9 V alone, and the tandem
cell of plural junctions stacked can only provide the output
voltage of about 2 V at maximum. For this reason, the solar cell is
usually used as a module in which plural unit cells are connected
in series. Such formation of the module by series connection of the
unit cells of the solar cell also provides an advantage of reducing
the current in the module, thereby remarkably lowering the power
loss resulting from the electric resistance in the wiring part.
[0006] However, during the use of the module with the unit cells
connected in series, there may generate a situation where the shade
of a wood or a building falls on a certain unit cell of the unit
cells constituting the module, whereby only the output of the
certain unit cell extremely drops. Such situation is called
"partial shade state". In such partial shade state, the output
voltage of the entire module extremely drops, and in some cases the
shaded unit cell merely functions as a load to cause heat
generation or is damaged by a strong reverse bias voltage. In this
regard, it is already known to connect a small diode which is
called bypass diode to a solar cell element (unit cell) in parallel
and in an opposite direction thereto, thereby reducing the
influence of such partial shade state.
[0007] FIG. 4 shows the working principle of such bypass diode,
wherein unit solar cells 301 to 304 of the solar cell are connected
in series and further connected to an external load 305. In a
normal state under the irradiation with the sunlight 306, there is
generated an output voltage equal to the sum of the output voltages
of the unit cells 301 to 304 (in FIG. 4, reference character A
indicates a terminal at a negative side; and B, a terminal at a
positive side). However, when the shade of an object 307 falls, for
example, on the unit cell 303, the unit cell 303 substantially
functions as a load of an extremely high resistance, whereby the
output current of the module is reduced and the output voltage is
extremely lowered. Besides the unit cell 303 receives, in the
opposite direction, the sum of the output voltages of the unit
cells 301, 302 and 304, whereby such reverse bias voltage causes
abnormal heat generation in the unit cell 303 or damages the unit
cell 303 by the reverse electric field.
[0008] On the other hand, in the case of providing a bypass diode
303' with the unit cell 303, the unit cell 303 is short circuited,
whereby an originally intended current substantially flows in the
entire circuit and the unit cell 303 can be protected from the
reverse electric field. When the unit cell 303 functions in the
normal state, the bypass diode 303' is reversely biased, whereby
little leak current flows and the function of the module is not
affected. The bypass diodes 301' to 304' are provided for the unit
cells 301 to 304 of the solar cell, respectively, whereby the
damage by the reverse electric field is caused in a unit cell
unit.
[0009] However, such bypass diodes are required in the same number
as that of the unit cells and therefore the cost and complex wiring
step for this purpose can not be negligible. For example, the
Japanese Patent Application Laid-Open No. 3-24768 proposes that the
bypass diode is unitedly formed with the unit cell. In the prior
art, as shown in FIGS. 9, 10, 11A and 11B, n-type diffusion regions
are formed on both sides of a p-type substrate and one of such
diffusion regions is utilized as the bypass diode. In these
drawings, reference character 20 indicates a p-type silicon
substrate; 21 and 22, n-type diffusion layers; 23 and 24,
electrodes; SC, an unit cell; BD, a bypass diode; 1, 2 and 3, unit
cells; A and B, bypass diodes; C, a bypass diode; and 25, 26, 27
and 28, lead wires. Such configuration however has drawbacks of
requiring a complex series connection step and also requiring one
external diode per one module. For this reason, the above-mentioned
patent application also proposes a method of unitedly forming an
independent bypass diode in the substrate, as shown in FIGS. 12A,
12B, 13A and 13B. In these drawings, reference characters 61 and
101 indicate p-type silicon substrates; 62 and 102, n.sup.+-type
diffusion layers; 63 and 103, n-type diffusion regions; 64 and 104,
p-type diffusion layers; 65 and 105, oxide films; 66 and 106,
oxidation preventing films; 67 and 107, surface electrodes; 68 and
108, back surface electrodes; and 109, a junction short circuit
portion. This configuration certainly simplifiers the series
connection step, but requires an additional semiconductor step for
incorporating the diode into the substrate, so that this
configuration cannot reduce the total manufacturing cost of the
solar cell module.
SUMMARY OF THE INVENTION
[0010] In consideration of the foregoing, the object of the present
invention is to provide a solar cell module of a novel
configuration which is capable of minimizing the reduction of the
module output without damage in the unit cells even in the partial
shade state and also scarcely more complex in the semiconductor
step and in the series connection step in comparison with the case
without such countermeasure, and a method of producing such solar
cell module.
[0011] According to the view of the present inventors, the
structure shown in FIG. 9 is rather advantageous in the prior art
in order not to complicate the semiconductor step. Namely, the
n-type diffusion layers (one being used for the light-receiving
region, the other being used for the bypass diode) on both sides of
the p-type substrate can be prepared in one step. However, the
n-type diffusion layer for the bypass diode has to be thereafter
removed except for a necessary area. Also as pointed out in the
above-mentioned patent application, it is not easy to form the
series connection bridging the top side and the bottom side of the
substrates as shown in FIGS. 11A and 11B.
[0012] The present inventors have conceived to form the
light-receiving portion of the solar cell element and the bypass
diode on the same side of the substrate. Such configuration allows
to achieve the series connection from only one side of the
substrate. The unit cell of such structure, if prepared by a simple
method, will provide a countermeasure against the partial shade
state at the lowest cost in total.
[0013] The present invention provides a solar cell module
comprising a plurality of unit cells connected in series, each of
the unit cells comprising in this order an electrode, a first
semiconductor layer having a first conductivity type and a second
semiconductor layer having a second conductivity type, wherein the
electrode has a region not covered with the first semiconductor
layer, wherein the second semiconductor layer has a main region and
a subregion which are separated by a groove, wherein the main
region of the second semiconductor layer in one unit cell of the
unit cells is electrically connected to the region of the electrode
not covered with the first semiconductor layer in another unit cell
adjacent to the one unit cell, and wherein the region of the
electrode not covered with the first semiconductor layer in the one
unit cell is electrically connected to the subregion of the second
semiconductor layer in the another unit cell.
[0014] In the present invention, the second semiconductor layer is
preferably a layer having a low resistance.
[0015] Also, the second semiconductor layer is preferably a doped
layer having a high dopant density.
[0016] Further, it is preferable that the first semiconductor layer
is a p-type semiconductor layer and the second semiconductor layer
is an n.sup.+-type semiconductor layer, or that the first
semiconductor layer is an n-type semiconductor layer and the second
semiconductor layer is a p.sup.+-type semiconductor layer.
[0017] Still further, it is preferable that each of the unit cells
has a rectangular shape, a long side direction of the rectangular
shape is arranged so as to be perpendicular to a generating line of
a curved surface represented by a cylindrical surface or a conical
surface, and each of the unit cells is connected in series in a
direction of the generating line.
[0018] Still further, it is preferable that at least one of the
first semiconductor layer and the second semiconductor layer is a
single-crystalline silicon layer.
[0019] The first semiconductor layer is preferably a semiconductor
sheet. An electrode plate, a conductive sheet or the like is
preferably used as the electrode.
[0020] The present invention also provides a solar cell module
comprising a plurality of unit cells connected in series, each of
the unit cells comprising in this order an electrode, a
semiconductor layer and a transparent electrode layer, wherein the
electrode has a region not covered with the semiconductor layer,
wherein the transparent electrode layer has a main region and a
subregion which are separated by a groove, wherein the main region
of the transparent electrode layer in one unit cell of the unit
cells is electrically connected to the region of the electrode not
covered with the semiconductor layer in another unit cell adjacent
to the one unit cell, and wherein the region of the electrode not
covered with the semiconductor layer in the one unit cell is
electrically connected to the subregion of the transparent
electrode layer in the another unit cell.
[0021] Hereinafter, the region of the electrode not covered with
the (first) semiconductor layer is referred to as "tab" in some
cases.
[0022] The present invention also provides a method of producing a
solar cell module, which comprises the steps of:
[0023] providing a plurality of unit cells, each of the unit cells
being produced by forming a second semiconductor layer having a
second conductivity type on one surface of a first semiconductor
layer having a first conductivity type, forming a groove in the
second semiconductor layer to separate the second semiconductor
layer into a main region and a subregion, and forming an electrode
having a region not covered with the first semiconductor layer on
other surface of the first semiconductor layer;
[0024] adjacently arranging the plurality of unit cells;
[0025] electrically connecting the main region of the second
semiconductor layer in one unit cell of the unit cells to the
region of the electrode not covered with the first semiconductor
layer in another unit cell adjacent to the one unit cell;
[0026] electrically connecting the region of the electrode not
covered with the first semiconductor layer in the one unit cell to
the subregion of the second semiconductor layer in the another unit
cell.
[0027] The present invention also provides a method of producing a
solar cell module, which comprises the steps of:
[0028] providing a plurality of unit cells, each of the unit cells
being produced by forming a transparent electrode layer on one
surface of a semiconductor layer, forming a groove in the
transparent electrode layer to separate the transparent electrode
layer into a main region and a subregion, and forming an electrode
having a region not covered with the semiconductor layer on other
surface of the semiconductor layer;
[0029] adjacently arranging the plurality of unit cells;
[0030] electrically connecting the main region of the transparent
electrode layer in one unit cell of the unit cells to the region of
the electrode not covered with the semiconductor layer in another
unit cell adjacent to the one unit cell;
[0031] electrically connecting the region of the electrode not
covered with the semiconductor layer in the one unit cell to the
subregion of the transparent electrode layer in the another unit
cell.
[0032] The present invention also provides a method of producing a
solar cell module, which comprises the steps of:
[0033] providing a plurality of unit cells, each of the unit cells
being produced by forming a dopant supplying layer on one surface
of a first semiconductor layer having a first conductivity type,
forming a groove in the dopant supplying layer to separate the
dopant supplying layer into a main region and a subregion, forming
a second semiconductor layer having a second conductivity type in
the one surface of the first semiconductor layer by diffusing a
dopant from the dopant supplying layer, and forming an electrode
having a region not covered with the first semiconductor layer on
other surface of the first semiconductor layer;
[0034] adjacently arranging the plurality of unit cells;
[0035] electrically connecting the main region of the second
semiconductor layer in one unit cell of the unit cells to the
region of the electrode not covered with the first semiconductor
layer in another unit cell adjacent to the one unit cell;
[0036] electrically connecting the region of the electrode not
covered with the first semiconductor layer in the one unit cell to
the subregion of the second semiconductor layer in the another unit
cell.
[0037] The present invention also provides a method of producing a
solar cell module, which comprises the steps of:
[0038] providing a plurality of unit cells, each of the unit cells
being produced by forming a first semiconductor layer having a
first conductivity type on an electrode, forming a second
semiconductor layer having a second conductivity type on the first
semiconductor layer, and forming a groove in the second
semiconductor layer to separate the second semiconductor layer into
a main region and a subregion, a portion of a surface of the
electrode being exposed;
[0039] adjacently arranging the plurality of unit cells;
[0040] electrically connecting the main region of the second
semiconductor layer in one unit cell of the unit cells to the
region of the electrode not covered with the first semiconductor
layer in another unit cell adjacent to the one unit cell;
[0041] electrically connecting the region of the electrode not
covered with the first semiconductor layer in the one unit cell to
the subregion of the second semiconductor layer in the another unit
cell.
[0042] In the above method, it is preferable that the first
semiconductor layer is formed so that the portion of the surface of
the electrode is exposed, or that after the first semiconductor
layer is formed, the portion of the surface of the electrode is
exposed.
[0043] Further, the present invention provides a method of
producing a solar cell module, which comprises the steps of:
[0044] providing a plurality of unit cells, each of the unit cells
being produced by forming a semiconductor layer on an electrode,
forming a transparent electrode layer on the semiconductor layer,
and forming a groove in the transparent electrode layer to separate
the transparent electrode layer into a main region and a subregion,
a portion of a surface of the electrode being exposed;
[0045] adjacently arranging the plurality of unit cells;
[0046] electrically connecting the main region of the transparent
electrode layer in one unit cell of the unit cells to the region of
the electrode not covered with the semiconductor layer in another
unit cell adjacent to the one unit cell;
[0047] electrically connecting the region of the electrode not
covered with the semiconductor layer in the one unit cell to the
subregion of the transparent electrode layer in the another unit
cell.
[0048] In the above method, it is preferable that the first
semiconductor layer is formed so that the portion of the surface of
the electrode is exposed, or that after the first semiconductor
layer is formed, the portion of the surface of the electrode is
exposed.
[0049] Additionally, in the above methods of producing a solar cell
module, the formation of the groove is preferably conducted by
laser scribing.
BRIEF DESCRIPTION OF THE DRAWINGS
[0050] FIG. 1B is a top plan view showing a solar cell module
according to the example of the present invention, and FIGS. 1A and
1C are cross-sectional views taken along the line 1A-1A and the
line 1C-1C of FIG. 1B, respectively;
[0051] FIGS. 2A, 2B, 2C, 2D, 2E and 2F are cross-sectional views
showing production steps for a solar cell module according to the
example of the present invention, FIG. 2D being a cross-sectional
view taken along the line 2D-2D of FIG. 2D' which is a top plan
view of FIG. 2D, and FIG. 2F' is a bottom plan view of FIG. 2F;
[0052] FIGS. 3G, 3H and 3I are cross-sectional views showing
production steps for a solar cell module according to the example
of the present invention, FIG. 2G being a cross-sectional view
taken along the line 3G-3G of FIG. 3G' which is a top plan view of
FIG. 3G;
[0053] FIG. 4 is an equivalent circuit diagram of a solar cell
module for illustrating the reduction of the effect of the partial
shade state;
[0054] FIG. 5 is an equivalent circuit diagram of a solar cell
module according to the example of the present invention;
[0055] FIGS. 6A, 6B, 6C, 6D and 6E are cross-sectional and FIG. 6F
is a top plan view, respectively, for showing production steps for
a solar cell module according to the example of the present
invention, FIG. 6C' is a top plan view of FIG. 6C, and FIG. 6E' is
a bottom plan view of FIG. 6E;
[0056] FIGS. 7A, 7B, 7C and 7D are cross-sectional views and FIGS.
7A', 7D', 7E and 7F are top plan view, respectively, for showing
production steps for a solar cell module according to the example
of the present invention, FIG. 7A' is a top plan view of FIG. 7A,
and FIG. 7D' is a top plan view of FIG. 7D which is a
cross-sectional view taken along the line 7D-7D of FIG. 7D';
[0057] FIGS. 8A and 8B are perspective views showing completed
states of solar cell modules according to the examples of the
present invention;
[0058] FIG. 9 is a cross-sectional view showing a completed state
of a conventional solar cell module;
[0059] FIG. 10 is an equivalent circuit diagram of a conventional
solar cell module;
[0060] FIGS. 11A and 11B are a perspective view and an equivalent
circuit diagram of a conventional solar cell module;
[0061] FIGS. 12A and 12B are a top plan view and a cross-sectional
view of a conventional solar cell module; and
[0062] FIGS. 13A and 13B are a top plan view and a cross-sectional
view of a conventional solar cell module.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0063] The present invention will be described in detail by
embodiments thereof, while making reference to the attached
drawings. FIGS. 1A to 1C show one constitutional example of the
solar cell module of the present invention. In this embodiment, a
crystalline semiconductor is used, but the present invention is
applicable to the semiconductors of various forms.
[0064] FIG. 1B is a top plan view; FIG. 1A is a cross-sectional
view taken along the line 1A-1A in FIG. 1B, showing the connection
of a light-receiving portion; and FIG. 1C is a cross-sectional view
taken along the line 1C-1C in FIG. 1B, showing the connection of
bypass diodes. On a supporting substrate 105, back electrode plates
107 are adhered in predetermined positions with adhesive layers
106. The supporting substrate 105 desirably has insulating
properties, but it can also be electrically conductive provided
that it is provided with an insulating surface coating or that the
adhesive layer 106 has insulating properties. Also, when a
semiconductor substrate 109 is thin or small, the flexibility of
the module can be increased by employing a thin supporting
substrate.
[0065] The back electrode plate 107 can be shaped substantially
according to the semiconductor substrate 109 which is a (first)
semiconductor layer, but is provided, at least in a part thereof,
with portions (tabs) 107' and 107" that are not covered with the
semiconductor substrate 109. The semiconductor substrate 109 is
adhered to the back electrode plate 107 by a conductive adhesive
layer 108, but the (first) semiconductor layer may be formed by
depositing a semiconductor on the back electrode plate 107 in place
of using the semiconductor substrate. In such case, the tab is
preferably formed by masking a part of the back electrode plate 107
so as to avoid deposition of the semiconductor, or by peeling a
part of the deposited semiconductor layer so as to expose the back
electrode plate 107.
[0066] In this embodiment, the semiconductor substrate 109 is doped
so as to has an adequate n- or p-type conductivity. A doped layer
110 with a high density and having a low resistance and a
conductivity type (p.sup.+- or n.sup.+-type) opposite to that of
the semiconductor substrate 109 is formed on the surface of the
semiconductor substrate 109. The highly doped layer 110 having the
opposite conductivity type may be grown on the semiconductor
substrate 109 or may be formed in the substrate 109 by forming a
dopant supplying layer and then applying a heat treatment to
diffuse the dopant. The layer 110 of the opposite conductivity is
divided by a groove 111 into a region with larger areas 110' (main
region) and a region with smaller areas 110" (subregion). Thus the
unit cells 101 to 104 are separated into light receiving regions
101' to 104' and bypass diodes 101" to 103" (unit cell 104 is not
provided with the bypass diode as explained later). The groove is
preferably formed with laser scribing, for example, suitably
utilizing a YAG laser (preferably the second harmonic wave easily
absorbable by the semiconductor) or an excimer laser.
[0067] The layer 110 of the opposite conductivity type which is
doped with a high density shows a considerably low sheet
resistance, but there is a problem of the loss generated from such
resistance when the areas of the layer 110 increase. For this
reason, a current collecting electrode 112 is often provided. In
the following description, the current collecting electrode 112
will be explained as being composed of a low-resistance copper
wire, but the present invention is likewise applicable to a case
where the current collecting electrode 112 is composed of a metal
film formed, for example, by conductive paste printing, plating,
masked evaporation or masked sputtering. The unit cells 101 to 104
of the above-described configuration are adjacently arranged. The
current generated, for example, in the light-receiving portion 103'
is collected by the current collecting electrode 112, and is
supplied by a busbar 113 for the light-receiving portion to the tab
of the back electrode plate 107' of the adjacent unit cell 102. The
series connection is successively made in this manner.
[0068] On the other hand, the current flowing in the bypass diode
portion 103" is supplied by a busbar 113' for the bypass diode
portion to the tab of the back electrode plate 107 of the unit cell
103. The series connection is successively made in this manner but
in a direction opposite to that of the light-receiving portion. The
bypass diode should generally be shielded by a mask 116 from the
light as shown in FIG. 1C, but the busbar 113' may serve as the
mask. The bypass diode is unnecessary in the unit cell 104 at the
right hand end. In the unit cell 101 at the left hand end, the
bypass diode 101" is connected by an external line because no unit
cell is present at the left side. The equivalent circuit of the
above-described configuration is shown in FIG. 5, and is equivalent
to that in FIG. 4. The surface of each unit cell is protected by a
filler layer 114 and a surface protecting layer 115.
[0069] Since a semiconductor generally has a high refractive index
and therefore the semiconductor shows a large loss of the incident
light by surface reflection, there is often provided an
antireflection layer formed by depositing, with a thickness of
about 0.05 to about 0.08 .mu.m, a transparent dielectric material
such as titanium dioxide or zinc sulfide or a transparent
conductive material such as tin oxide, zinc oxide or ITO, having a
refractive index approximately equal to the geometrical average of
refractive indexes of the air and the semiconductor layer, though
such antireflection layer is not shown in FIGS. 1A to 1C. When a
transparent conductive material is employed, the antireflection
layer also functions as the transparent electrode layer and a
groove may be formed therein to form the light-receiving portion
and the bypass diode portion.
[0070] The solar cell module of the above-described configuration
has the following features.
[0071] (1) In contrast to a case employing a diode chip, the bypass
diode portion has the same thickness as that of the light-receiving
portion, so that the completed module is compact, has no protruded
portion and is not easily broken by the external force.
[0072] (2) Since the bypass diode is provided at the same side of
the light-receiving portion, the steps of adhesion of the unit cell
to the supporting substrate, adhesion of the current collecting
electrode and series connection and the like can be successively
executed by stacking in the order from the bottom to the top and
can therefore be easily automated.
[0073] (3) The production steps can be simplified since the bypass
diode and the light-receiving portions utilize a semiconductor
junction formed in the same step and are mutually separated
afterwards.
[0074] (4) The separation of the bypass diode can be conducted
extremely efficiently because it can be achieved by merely forming
a groove, by laser scribing or etching, in an opposite conductive
type layer (second semiconductor layer) (usually about 0.2 to about
0.5 .mu.m) or a transparent conductive material (transparent
electrode layer) (usually about 0.05 to about 0.08 .mu.m) which is
far thinner than a semiconductor substrate itself.
[0075] With the recent spreading of the application of the solar
cells, there is an increasing interest for the flexible solar cells
utilizing amorphous silicon (a-Si), thin film crystals or the like.
Because of the above-mentioned features, the present invention is
particularly effective when applied to such flexible solar cell
module.
[0076] Also, even when the module is formed with a relatively thick
semiconductor, the entire module can be made flexible by reducing
the size of each unit cell to ensure flexibility at connection
portions between the unit cells. However, the use of such smaller
unit cell increases the possibility of causing the partial shade
state and also the reverse bias voltage applied to the shaded cell,
thereby easily damaging the unit cells. Also the countermeasure
against such situation becomes difficult in cost because a larger
number of bypass diodes are required. Because of the
above-mentioned features, the present invention is applicable even
in such situation without difficulty, as explained in more details
in the following examples.
[0077] In the following there will be given detailed explanation on
the examples of the present invention, but the scope of the present
invention is as explained in the foregoing and is not limited by
these examples. Also in the attached drawings, the tabs, bypass
diodes, busbars and the like are shown in an enlarged size for the
purpose of clarity, but these components can in fact function
satisfactorily in a size far smaller than the shown size, and the
decrease of the output of the solar cell module per opening area of
the solar cell module is practically negligible.
(EXAMPLE 1)
[0078] In the present example, the present invention was applied to
a solar cell module employing a thin single-crystalline silicon
sheet obtained by peeling an epitaxial film grown on a
single-crystalline wafer by liquid phase growth from the wafer. The
steps of producing such solar cell module will be explained with
reference to FIGS. 2A to 2F' and 3G to 3I. The details of the
liquid phase growing step are described in Japanese Patent
Application Laid-Open No. 5-283722, while the details of the
peeling step of the epitaxial film are described in Japanese Patent
Application Laid-Open Nos. 5-283722 and 7-302889.
[0079] In the following there will be explained with reference to
FIGS. 2A to 2F', the details of the method of producing the solar
cell. At first a p.sup.+-type single-crystalline silicon wafer 201
with a thickness of 500 .mu.m was immersed in hydrofluoric acid
solution diluted with ethanol. A positive voltage was applied to
conduct anodization while a current was controlled under the
conditions shown in Table 1 to obtain, on the surface of the wafer,
a porous silicon layer 202 containing a plurality of micropores of
several hundred Angstroms in diameter (FIG. 2A). The current was
changed after the lapse of 2.5 minutes.
1 TABLE 1 Anodizing solution HF:H.sub.2O:C.sub.2H.sub.5OH = 1:1:1
Current density 5 mA/cm.sup.2 .fwdarw. 30 mA/cm.sup.2 Anodizing
time 2.5 min .fwdarw. 30 sec
[0080] Then the liquid phase epitaxial growth of silicon by a
gradual cooling method was conducted on the surface of the porous
layer 202. Specifically, at first, indium metal (In) was melted at
900.degree. C. in a carbon boat placed in a hydrogen stream. Under
the agitation of the melted metal, a polycrystalline silicon wafer
was dissolved in the melted metal until saturation, and the
temperature of the melted mixture solution was gradually lowered to
894.degree. C. as a solution for epitaxial growth. Then the
temperature of the atmosphere was adjusted to set the temperature
of the wafer 201 having the porous layer 202 to 1030.degree. C. in
a hydrogen stream. After annealing for 5 minutes, the temperature
was lowered until it becomes equal to the temperature of the
solution. In this step, the micropores of the porous layer 202 were
filled to obtain a thin flat seal layer 202' (FIG. 2B).
[0081] The seal layer 202' restores the single-crystallinity of the
original wafer 201, so that epitaxial growth can be executed on
such seal layer. In this state the wafer 201 was immersed in the
solution and was gradually cooled at a cooling rate of -1.0.degree.
C./min. to deposit a non-doped thin single-crystalline silicon
layer 203 (first semiconductor layer) with a thickness of 20 .mu.m,
and the wafer was then lifted from the solution. Then, In was
melted at 900.degree. C. in a separate carbon boat, then it was
saturated with Si, and Si containing 0.1 atomic % antimony (Sb) of
Si was dissolved therein. The wafer subjected to the growth of the
thin single-crystalline silicon layer 203 was immersed in thus
obtained solution to deposit an n.sup.+-type single-crystalline
silicon layer 204 (second semiconductor layer) with a thickness of
0.3 .mu.m on the single-crystalline silicon layer 203, thereby
forming a pn junction, and the wafer was lifted from the solution
(FIG. 2C).
[0082] Then the surface was scanned with the beam of a YAG laser
(second harmonic wave) to form a groove 205 on the n.sup.+-type
single-crystalline silicon layer 204 by laser scribing, thereby
separating it into a light-receiving portion 204' and a bypass
diode portion 204". The depth of the groove 205 was set to about
0.5 .mu.m which was necessary and sufficient for separating the
thin n.sup.+-type single-crystalline silicon layer 204, so that the
throughput of the laser scribing step could be improved. In this
operation, a groove was formed also in the peripheral portion of
the substrate, in order to suppress the influence of the leakage
current resulting from the incomplete junction state in such
peripheral portion (FIG. 2D). FIG. 2D' is a top plan view showing
the groove formed by laser scribing, and FIG. 2D is a
cross-sectional view taken along the line 2D-2D in FIG. 2D'. FIG.
2D' shows the positional relationship between the light-receiving
portion 204' and the bypass diode portion 204" at the right hand
corner.
[0083] Then the surface of the wafer was vacuum chucked and a
peeling force was applied from the back surface of the wafer,
thereby separating the liquid phase grown single-crystalline
silicon sheet (202', 203, 204) from the wafer at the porous layer
202 (FIG. 2E). Subsequently, an aluminum sheet with a thickness of
50 .mu.m having tabs for series connection of the light-receiving
portion and for series connection of the bypass diode is adhered to
the back surface of thus peeled single-crystalline silicon sheet by
heat fusion at 600.degree. C. to obtain a back electrode plate 206
(FIG. 2F). FIG. 2F' is a bottom plan view showing the back
electrode plate 206 corresponding to FIG. 2F. The shape of the back
electrode plate 206 was substantially the same as that of the wafer
201 and the single-crystalline silicon sheet (202', 203, 204) but
was provided with tabs 206' and 206" protruded from the
single-crystalline silicon sheet (202', 203, 204) when they were
superposed. 48 unit cells were prepared in this manner. However,
for the purpose of simplicity, the drawings show only 4 unit cells,
and also the internal structure of the unit cell is not shown in
the drawings.
[0084] Next, the connection of the unit cells is described with
reference to the cross-sectional view of FIG. 3G and the top plan
view of FIG. 3G'. FIG. 3G is a cross-sectional view taken along the
line 3G-3G of FIG. 3G'. The lower portion of the back electrode
plate 206 was adhered to a PET sheet 207 of a thickness of 200
.mu.m coated with an adhesive layer on a predetermined portion of
the surface of the PET sheet as the supporting substrate. On both
ends of the unit cell, the back electrode plate 206 was shaped so
as to form a tab 212 for positive voltage output and an opposed tab
211 for negative voltage output. 48 unit cells were superposed on
the supporting substrate 207, further copper wires 208 coated with
carbon resin were superposed on the upper portion of the unit
cells, and busbars 209' for the light-receiving portions and
busbars 209" for the bypass diodes, both busbars having a coated
conductive adhesive on the back surface thereof, were superposed
thereon in predetermined positions. In the unit cell at the left
hand end, an external bypass diode 210 is inserted between the tab
206" of the back electrode plate of this unit cell and the negative
voltage output terminal tab 211 of the module. In FIG. 3G', for the
purpose of clarity, the mutually overlapping members are shown in
somewhat displaced relationship.
[0085] In this state, the entire components were thermally pressed
in a vacuum laminator, whereby the copper wires 208, the bus bars
209' and 209" were adhered to the silicon surface. Then the
unnecessary portions of the copper wires 208 between the unit cells
were cut off by applying a blade at broken lines R-S and T-U in
FIG. 3G'. The series connection was completed in this manner.
[0086] Then, as shown in FIG. 3H, the surfaces of the unit cells
was sprayed with a solution obtained by dissolving fine powder of
titanium oxide in a solvent, and the surfaces were cured at about
150.degree. C., thereby forming a titanium dioxide film 213 with a
thickness of about 0.07 .mu.m. The titanium dioxide film 213 was
formed also between the light-receiving portion and the bypass
diode portion and between the unit cells, but it does not generate
a leakage current because of the high resistance and functions as a
semiconductor surface protecting layer to reduce a reverse current
in the light-receiving portion in the dark state.
[0087] Then a PVA resin sheet 214 as a filler layer and a ETFE
resin sheet 215 as a surface protecting layer were superposed and
curing was conducted again at 150.degree. C., whereby the PVA resin
214 was thermally melted and flew in gaps between the protruding
portions of the unit cells to fill spaces between the ETFE resin
sheet 215 and other components with the ETFE resin sheet 215. When
the obtained module was cooled to room temperature, the ETFE resin
sheet 215 was strongly adhered to other components (FIG. 3I).
[0088] The external bypass diode 210 shown in FIG. 3G' was obtained
by laser scribing the surface of the n.sup.+-type
single-crystalline silicon layer 204 in a checkerboard pattern so
as to obtain a chip having the same shape as that of the
incorporated bypass diodes 204", after the deposition of the
n.sup.+-type single-crystalline silicon layer 204 in the
above-described steps. In this operation, the groove 205 was formed
with a depth of about 5 .mu.m larger than in the case of the
incorporated bypass diodes. Then a copper sheet was adhered on the
surface and then was peeled whereby the semiconductor layer was
peeled from the laser scribed groove 205 to obtain a diode chip of
the desired size. The obtained diode chip was cut off by applying a
blade to the copper sheet.
[0089] Because of the above production steps, the external bypass
diode 210 is the same in characteristics as the incorporated bypass
diodes 204", and is not only effective for shunt passivation but
also is easy to produce it because the production step is common.
Furthermore, since these bypass diodes have the same thickness, the
completed module is free from protruded portions, thereby being
compact in appearance and being less damageable under the
application of an external force.
[0090] After the peeling of the single-crystalline silicon sheet
(202', 203, 204), the wafer 201 has remaining portions of the
porous layer 202 on the surface. The remaining portions were etched
off under agitation with a mixture solution of hydrofluoric acid,
hydrogen peroxide and deionized water. The non-porous portion of
the wafer 201 had an extremely low etching rate for the
above-mentioned etching solution and a selective ratio of 10.sup.5
or more in comparison with the etching rate of the porous layer
202, so that the etching amount of the wafer was practically
negligible. The wafer 201 of which surface was smoothed in this
step could be again subjected to anodization, and a plurality of
single-crystalline sheets could be obtained from one expensive
single-crystalline wafer 201 by repeating the above-described steps
process. Consequently the solar cell with a high energy conversion
efficiency can be produced at a low cost.
[0091] The completed solar cell module had a configuration shown in
FIGS. 1A to 1C. Under the measurement with a solar simulator of
AM-1.5, the module exhibited an energy conversion efficiency of
15%. Then, with one of the unit cells of the module being masked,
the module exhibited an energy conversion efficiency of 14.5%,
which is only a small loss in output. Also after the module in this
state was installed outdoors and used for one year, the module did
not have any damage or degradation in output, thereby proving a
high reliability even under an abnormal condition of use.
[0092] On the other hand, a comparative module was produced
according to the steps explained with reference to FIGS. 2A to 2F'
except that the bypass diodes were not formed. This module
exhibited an energy conversion efficiency of 15.5% under the normal
condition with a slight increase in the efficiency due to the
absence of the area loss resulting from the presence of the bypass
diodes, but the energy conversion efficiency extremely decreased to
about 1% when one of the unit cells was masked. Also after one year
of outdoor use, the masked unit cell revealed to be short
circuited.
[0093] Also in thus obtained module, the semiconductor layer is
made thinnest as required from the function thereof, and the series
connecting portion and the bypass diode are also made very thin.
For these reasons, the thickness of the entire module is as small
as 500 .mu.m, so that the module is very light and flexible in
spite of the use of the single crystal. Consequently the solar cell
module can be easily mounted on the structure with a curved
surface, so that the field of application of the solar cell can be
expanded. Furthermore, the series connection step for the
crystalline type solar cells, which is often made complicated in a
conventional method, can be easily automated since the series
connection can be achieved by successively stacking the components
on the supporting substrate.
(EXAMPLE 2)
[0094] In this example, the present invention is applied to a solar
cell module employing ribbonlike polycrystalline silicon obtained
by the edge defined growth (EDG) method. In the EDG method, an
extrusion mold defining both edges of the ribbon is immersed in
fused silicon, a meniscus of fused Si is formed by surface tension
and the fused Si is gradually elevated to obtain a Si ribbon with a
predetermined width. This method provides a high utilization
efficiency of a raw material since it is unnecessary to slice and
polish a crystalline ingot and also since the obtained ribbon has a
relatively small thickness of about 100 to about 300 .mu.m. However
the width of the ribbon is conventionally limited to about 25 to
about 50 mm. For this reason it is difficult to-obtain a large unit
cell, whereby a large amount of work is required for series
connection including the connection of the bypass diodes and the
total manufacturing cost cannot be much lowered despite of the
lowered manufacturing cost of a crystal.
[0095] The method of this example is applicable also to an usual
crystalline wafer, but is particularly effective in the case of
producing the module with relatively small crystals such as the
ribbonlike crystal, since the series connection can be achieved
efficiently. In the following the method will be explained with
reference to FIGS. 6A to 6F.
[0096] A ribbonlike single-crystalline silicon with a thickness of
25 mm and a thickness of 100 .mu.m was prepared by the EDG method.
The obtained single crystal was cut into a length of 300 mm to
prepare ribbonlike crystals 501 (first semiconductor layer) for the
unit cells (FIG. 6A). Then, in a CVD apparatus, a phosphorus
silicate glass (PSG) layer 502 was deposited with a thickness of 20
nm on the surface of the ribbonlike crystal 501 at 560.degree. C.
(FIG. 6B). Then a groove 503 was formed by laser scribing on the
surface of the PSG layer 502 to form a light-receiving portion 502'
and a bypass diode portion 502". Also a groove was formed in the
periphery of the ribbonlike crystal (FIG. 6C). FIG. 6C' is a top
plan view of FIG. 6C.
[0097] Then the ribbonlike crystal was annealed for 30 minutes at
1050.degree. C. in a nitrogen stream, and phosphor (P) was diffused
in the ribbonlike crystal 501 to form an n.sup.+-type layer 504 on
the surface. The remaining PSG layer was etched off with an aqueous
solution of hydrofluoric acid. The n.sup.+-type layer was not
formed in the region of the groove 503, so that the n.sup.+-type
layer 504 was separated by the groove 503 into the light-receiving
portion 504' (main region) and the bypass diode portion 504"
(subregion) (FIG. 6D). This method allows to form the bypass diode
scarcely affecting the Si layer and not requiring complicated
photolithographic process.
[0098] Then, on the back surface of the substrate, a back electrode
plate 505 of stainless steel was adhered with an aluminum paste
506, and the paste was cured at 600.degree. C. (FIG. 6E). The back
electrode plate 505 of stainless steel was provided with tabs
similarly to Example 1 (FIG. 6E'). Thereafter, subsequent steps
similar to those in Example 1 were executed to obtain a solar cell
module using the unit cells connected in series by utilizing 48
ribbonlike crystals (FIG. 6F). As shown in FIG. 6F, the module was
formed by placing 48 unit cells on a supporting substrate 507, then
placing copper wires 508 coated with a carbon resin on the upper
portions of the unit cells, further placing busbars 509' for the
light-receiving portion and busbars 509" for the bypass diode, both
busbars being coated with a conductive adhesive in predetermined
positions, and providing a positive terminal electrode 512 and a
negative terminal electrode to which an external bypass diode 510
is connected.
[0099] Also this module exhibited a small loss in the energy
conversion efficiency in the partial shade state. The degradation
of the characteristics was also not observed even in the outdoor
partial shade test. The ribbonlike crystal 501 employed in this
example had a thickness of 100 .mu.m considerably thicker than that
in Example 1, but in the direction of series connection, the width
of the crystal was as narrow as 2.5 cm and the connecting portion
is freely flexible so that the module showed high flexibility in
this direction. Thus a flexible solar cell module could be produced
utilizing the feature of the narrow ribbonlike crystals obtained by
the EDG method.
(EXAMPLE 3)
[0100] In this example, the present invention is applied to a solar
cell module employing tandem type amorphous silicon (a-Si). The
steps of this example will be explained with reference to FIGS. 7A
to 7F.
[0101] At first, on a stainless steel plate 601 with a thickness of
150 .mu.m, an aluminum layer 602 with a thickness of 0.1 .mu.m and
a zinc oxide layer 603 with a thickness of 1 .mu.m were deposited
by sputtering (FIG. 7A). Both edge portions 601' and 601" of the
stainless steel plate were masked to avoid film deposition (FIG.
7A'). FIG. 7A is a cross-sectional view of FIG. 7A', and FIG. 7A'
is a top view of FIG. 7A.
[0102] The aluminum layer 602 functions to reflect the light
transmitted through a semiconductor layer deposited thereon,
thereby returning the reflected light into the semiconductor layer
and causing effective absorption of the light therein. The zinc
oxide layer 603 functions to suppress the reaction between the
aluminum layer 602 and the semiconductor layer, and the zinc oxide
layer also functions to extend the optical path length in the
semiconductor layer and to increase the absorption therein when the
roughness of the surface of the zinc oxide layer is optimized.
[0103] Then, in a plasma CVD apparatus, silane (SiH.sub.4) gas and
phosphine (PH.sub.3) gas were made to flow on the zinc oxide layer
603 to deposit an n-type a-Si layer 604 with a thickness of 0.03
.mu.m as shown in FIG. 7B. Then SiH.sub.4 alone was employed to
deposit an i-type a-Si layer 605 with a thickness of 0.4 .mu.m, and
SiH.sub.4 and diborane (B.sub.2H.sub.6) were employed to deposit a
p-type microcrystalline Si (.mu.c-Si) layer 606 with a thickness of
0.02 .mu.m. The pin junction thus prepared (bottom cell 607) alone
has the function of a solar cell. But, in the present example,
there were deposited again thereon an n-type a-Si layer 608 with a
thickness of 0.02 .mu.m, an i-type a-Si layer 609 with a thickness
of 0.08 .mu.m and a p-type .mu.c-Si layer 610 with a thickness of
0.01 .mu.m to form a pin junction (top cell 611) (FIG. 7B).
[0104] In the above configuration, an incident light is dividedly
absorbed by the bottom cell 607 and the top cell 611, whereby the
degradation of the characteristics by the light irradiation
(Staebler-Wronski effect) can be reduced. Also in the CVD steps,
the edge portions 601' and 601" of the stainless steel plate were
masked to avoid film deposition.
[0105] On the top cell 611, there was further deposited an ITO
layer 612 with a thickness 0.07 .mu.m constituting a current
collecting electrode (FIG. 7C). As the a-Si based solar cell has a
high sheet resistance because the p-type .mu.c-Si layer 610 is as
thin as 0.01 .mu.m, the ITO layer 612 functions not only as an
antireflection layer but also as a transparent electrode. Then, as
shown in FIG. 7D, an ink pattern containing ferric oxide was
printed by screen printing. When the printed pattern was cured at
150.degree. C., the ink-printed portion of the ITO layer 612 was
etched to separate the ITO layer to a light-receiving portion 612'
(main region) and a bypass diode portion 612" (subregion) (FIG.
7D'). FIG. 7D' is a top plan view of FIG. 7D, and FIG. 7D is a
cross-sectional view taken along the line 7D-7D of FIG. 7D'. The
separation took place only in the ITO layer 612, but it is usually
unnecessary to separate the p-type .mu.c-Si layer 610 because of
its high sheet resistance. However, if necessary, it is also
possible to separate not only the ITO layer 612 but also the a-Si
layer by laser scribing similarly to Example 1. When the p-type
.mu.c-Si layer has a low sheet resistance and the leakage current
through this layer is not negligible, it is desirable to separate
not only the p-type .mu.c-Si layer 610 of the top cell 611 but also
the p-type .mu.c-Si layer 610 of the bottom cell 607.
[0106] The, as shown in FIG. 7E, the stainless steel plate on which
the solar cell was formed was cut in a stripe-shaped portion 613
where the ITO layer 612 was etched to produce 17 unit cells.
[0107] Thereafter, subsequent steps were conducted in the same
manner as in Example 1 to obtain a solar cell module with 17 unit
cells connected in series (FIG. 7F). The module shown in FIG. 7F
was formed by placing 17 unit cells on a supporting substrate 614,
then placing copper wires 615 coated with a carbon resin on the
upper portions of the unit cells, further placing the busbars 616'
for the light-receiving portion and the busbars 616" for the bypass
diode, both busbars being coated with a conductive adhesive in
predetermined positions, and providing a positive terminal
electrode 619 and a negative terminal electrode 618 to which an
external bypass diode 617 was connected. However, FIG. 7 shows 4
unit cells only for the purpose of simplicity.
[0108] Also the thus produced module exhibited a small loss in the
energy conversion efficiency in the partial shade state. The
degradation of the characteristics was also not observed even in
the outdoor partial shade test. Also this solar cell module formed
on a stainless steel plate and laminated with a resin is light in
weight, highly flexible and strong to impact such as
hailstones.
(EXAMPLE 4)
[0109] This example shows that the solar cell module of the present
invention is suitable for installation on a curved surface. The
steps described in Example 1 were conducted up to the formation of
the n.sup.+-type single-crystalline silicon layer by using a wafer
of 20.times.20 cm. The light-receiving portion and the bypass
portion were separated by laser scribing. Then the intensity of the
laser beam was increased to form grooves with a depth of 5 .mu.m in
a stripe shape with a width of 1 cm, and the semiconductor sheet
was snapped off at the grooves simultaneously with the peeling to
obtain unit cells of 1.times.20 cm in size.
[0110] Then a solar cell module employing 24 unit cells connected
in series with the incorporated bypass diodes was produced by the
steps of Example 1, employing a roof tile as shown in FIGS. 8A and
8B as the supporting substrate. Also in this example, the surface
was laminated with ETFE resin similarly to Example 1, but the
surface was embossed because a highly glossy surface is undesirable
in the appearance of the roof tile. The modules of two types were
produced by changing the direction of arrangement of the unit cells
on the curved surface of the roof tile.
[0111] FIG. 8A shows a solar cell module in which the longitudinal
direction of the unit cells is perpendicular to the generating line
of the curved surface of the roof tile and the unit cells are
connected in series along the direction of the generating line of
the curved surface, while FIG. 8A shows a solar cell module in
which the longitudinal direction of the unit cells is parallel to
the generating line of the curved surface of the roof the and the
unit cells are connected in series perpendicularly to the direction
of the generating line of the curved surface.
[0112] In the measurement utilizing a solar simulator, the module
shown in FIG. 8A and that in FIG. 8B exhibited substantially the
same energy conversion efficiencies, and both modules exhibited a
small loss of the efficiency in the partial shade state. However,
when both modules were evaluated by actually mounting them on a
south-side roof of a building, both modules showed almost the same
output around noon, but the module shown in FIG. 8A exhibited a
relatively stable output from the morning to the evening while the
module shown in FIG. 8B exhibited, only in the morning and the
evening, an output not larger than a half of the output of the
module shown in FIG. 8A.
[0113] This is because, in the module shown in FIG. 8B, the morning
sunlight 702 falls almost perpendicularly on the unit cell 701 but
falls with a considerably shallow angle on the unit cell 703,
whereby the output is significantly lowered because the output
current of the series connection module is limited by the unit cell
of the smallest output current, while the evening sunlight 704
similarly causes the decrease of the output in the unit cell
701.
[0114] On the other hand, in the module shown in FIG. 8A, the unit
cells are in similar conditions to the morning sunlight 702 and to
the evening sunlight 704, so that any unit cells do not cause
extremely decrease of the output of the module. It is therefore
desirable in the series connection module to arrange the
longitudinal direction of the unit cells perpendicularly to the
generating line 705 of the curved surface and to conduct the series
connection of the unit cells along the direction of the generating
line 705.
[0115] Such mechanism is considered generally applicable not only
to the roof tiles but also to the solar cell of the curved surface
to be installed outdoors. Furthermore, the solar cell of the
present invention can be easily adaptable to the curved surface
because it can be easily made flexible and the series connection
can be achieved by successively stacking the components on the
supporting substrate.
[0116] As explained in the foregoing, the configuration of the
solar cell module of the present invention and the method therefor
allow to incorporate the bypass diodes by a simple semiconductor
step and an automated mounting step, so that a solar cell module
with high reliability under various sunshine conditions can be
produced at a low cost.
[0117] Also, since the produced diode has the same thickness as
that of other portions, it does not protrude in the module, so that
there can be obtained a flexible solar cell module strong to the
external force.
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