U.S. patent application number 09/765722 was filed with the patent office on 2001-09-13 for voltage sensing system with input impedance balancing for electrocardiogram (ecg) sensing applications.
This patent application is currently assigned to Cardiac Pacemakers, Inc.. Invention is credited to Yonce, David J..
Application Number | 20010021813 09/765722 |
Document ID | / |
Family ID | 22918020 |
Filed Date | 2001-09-13 |
United States Patent
Application |
20010021813 |
Kind Code |
A1 |
Yonce, David J. |
September 13, 2001 |
Voltage sensing system with input impedance balancing for
electrocardiogram (ECG) sensing applications
Abstract
A voltage sensing system includes input impedance balancing for
electrocardiogram (ECG) sensing or other applications, providing
immunity to common-mode noise signals while capable of use with two
electrodes. Signals are received at first and second electrodes
having associated impedances. An impedance circuit includes a
feedback controller that adjusts an effective impedance associated
with the second electrode based on a difference signal, a common
mode signal, a phase-shifted (e.g., quadrature common mode) signal,
and an impedance associated with the first electrode. As a result,
signals associated with each electrode undergo a similar degree of
gain/attenuation and/or phase-shift. This reduces common mode noise
and enhances the signal-to-noise characteristics of a desired ECG
or other output signal, without requiring the use of more than two
electrodes.
Inventors: |
Yonce, David J.; (Fridley,
MN) |
Correspondence
Address: |
SCHWEGMAN, LUNDBERG, WOESSNER & KLUTH, P.A.
P.O. Box 2938
Minneapolis
MN
55402
US
|
Assignee: |
Cardiac Pacemakers, Inc.
|
Family ID: |
22918020 |
Appl. No.: |
09/765722 |
Filed: |
January 18, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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09765722 |
Jan 18, 2001 |
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09243265 |
Feb 3, 1999 |
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6208888 |
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Current U.S.
Class: |
600/509 |
Current CPC
Class: |
Y10S 128/901 20130101;
A61B 5/30 20210101; H03F 2200/261 20130101; H03F 3/45932 20130101;
H03F 3/45475 20130101; Y10S 128/902 20130101 |
Class at
Publication: |
600/509 |
International
Class: |
A61B 005/0428 |
Claims
What is claimed is:
1. An apparatus for sensing a difference between first and second
input voltages, the apparatus including: a first amplification
circuit, including a first input receiving a signal based on the
first input voltage, a second input receiving a signal based on the
second input voltage, and an output providing a differential output
signal based on a difference between the signals at the first and
second inputs of the first amplification circuit; an averager
circuit, including a first input receiving a signal based on the
first input voltage, a second input receiving a signal based on the
second input voltage, and an output providing a common mode (CM)
output signal based on the signals at the first and second inputs
of the averager circuit; and an impedance circuit, coupled to
receive signals from the outputs of the first amplification and
averager circuits, the impedance circuit adjusting an impedance,
which is coupled to the second input voltage, based on the signals
received from the outputs of the first amplification circuit and
the averager circuit.
2. The apparatus of claim 1, further including a phase-shifter
circuit, having an input coupled to the output of the averager
circuit, and an output providing a phase-shifted CM output
signal.
3. The apparatus of claim 2, in which the phase-shifter circuit
includes one of an integrator and a differentiator.
4. The apparatus of claim 2, in which the impedance circuit
includes a feedback controller circuit comprising: a first mixer,
coupled to receive the differential output signal from the first
amplification circuit and the CM signal from the averager circuit,
and providing a first mixer output based on the differential and CM
output signals; and a second mixer, coupled to receive the
differential output signal from the first amplification circuit and
the phase-shifted CM signal from the phase-shifter, and providing a
second mixer output based on the differential and phase-shifted CM
output signals.
5. The apparatus of claim 4, in which the feedback controller
circuit further includes: a first integrator, having an input
coupled to the first mixer output, and providing a first control
signal to an impedance control subcircuit; and a second integrator,
having an input coupled to the second mixer output, and providing a
second control signal to the impedance control subcircuit.
6. The apparatus of claim 5, in which the impedance circuit further
includes: a first filter, coupling the differential output signal
from the output of the first amplification circuit to the first
mixer; a second filter, coupling the CM signal from the output of
the averager circuit to the second mixer; and a third filter,
coupling the phase-shifted CM signal from the output of the
phase-shifter circuit to the second mixer.
7. The apparatus of claim 6, in which the feedback controller
circuit further includes: a first low pass filter, coupling the
first mixer output to the input of the first integrator; and a
second low pass filter, coupling the second mixer output to the
input of the second integrator.
8. The apparatus of claim 5, in which the impedance control
subcircuit comprises: a first voltage-controlled amplifier (VCA),
having first, second, and gain-control inputs, and an output, the
first input of the first VCA coupled to receive the signal based on
the second input voltage, the second input of the first VCA coupled
to a ground node, the gain-control input of the first VCA coupled
to receive the first control signal from the feedback controller,
and the output of the first VCA controlling a resistive component
of the impedance that is coupled to the second input voltage; and a
second VCA, having first, second, and gain-control inputs, and an
output, the first input of the second VCA coupled to receive a
signal based on the second input voltage, the second input of the
second VCA coupled to the ground node, the gain-control input of
the second VCA coupled to receive the second control signal from
the feedback controller, and the output of the second VCA
controlling a reactive component of the impedance that is coupled
to the second input voltage.
9. The apparatus of claim 8, in which the impedance control
subcircuit includes the impedance that is coupled to the second
input voltage, which comprises: a resistor, controlled by the
output of the first VCA; and a capacitor, controlled by the output
of the second VCA.
10. The apparatus of claim 1, further including a first input
circuit between a first electrode and the first input of the first
amplification circuit.
11. The apparatus of claim 10, in which the first input circuit
includes an impedance bootstrap circuit.
12. The apparatus of claim 10, in which the first input circuit
includes: an amplifier having a first input, a second input, and an
output, wherein the first input of the amplifier is coupled to the
output of the amplifier, and the output of the amplifier is coupled
to the first input of each of the first amplification circuit and
the averager circuit; a first resistor, having first and second
terminals, the first terminal of the first resistor coupled to the
output of the amplifier; a second resistor having first and second
terminals, the first terminal of the second resistor coupled to the
second terminal of the first resistor, the second terminal of the
second resistor coupled to a ground voltage; a third resistor
having first and second terminals, the first terminal of the third
resistor coupled to the first input of the amplifier, the second
terminal of the third resistor coupled to the second terminal of
the first resistor; and a capacitor having first and second
terminals, the first terminal of the capacitor coupled to the first
input of the amplifier, the second terminal of the capacitor
coupled to the ground voltage.
13. The apparatus of claim 10, in which the first input circuit
includes a phase-shifter circuit.
14. The apparatus of claim 13, in which the phase-shifter circuit
includes a phase lead circuit.
15. The apparatus of claim 14, in which the phase lead circuit
includes a parallel resistor and capacitor.
16. The apparatus of claim 10, in which the first input circuit
includes an input protection circuit.
17. The apparatus of claim 16, in which the input protection
circuit includes: a resistor, having first and second terminals,
the first terminal of the resistor coupled to the first electrode;
a first diode, having an anode and a cathode, the anode of the
first diode coupled to the second terminal of the resistor, the
cathode of the first diode coupled to a positive power supply; and
a second diode, having an anode and a cathode, the anode of the
second diode coupled to a negative power supply, the cathode of the
second diode coupled to second terminal of the resistor.
18. The apparatus of claim 1, further including a second input
circuit between a second electrode and the second input of the
first amplification circuit.
19. The apparatus of claim 18, in which the second input circuit
includes the impedance coupled to the second input voltage, which
comprises: a resistor, having first and second terminals, the first
terminal of the resistor coupled to the impedance circuit to
receive a first control signal; and a first capacitor, having a
first and second terminal, the first terminal of the capacitor
coupled to the effective impedance circuit to receive a second
control signal.
20. The apparatus of claim 19, in which the first capacitor is a
negative capacitance circuit.
21. The apparatus of claim 19, in which the first capacitor has a
positive-valued capacitance, and further comprising a second
capacitor having a negative capacitance value.
22. The apparatus of claim 21, in which a first terminal of the
second capacitor is coupled to the second terminal of the first
capacitor.
23. The apparatus of claim 18, in which the second input circuit
includes an amplifier having a first input, a second input, and an
output, wherein the second input of the amplifier is coupled to the
output of the amplifier, and the output of the amplifier is coupled
to the second input of each of the first amplification circuit and
the averager circuit.
24. The apparatus of claim 23, in which the second input circuit
further includes the impedance coupled to the second input voltage,
which comprises: a resistor, having first and second terminals, the
first terminal of the resistor coupled to the impedance circuit,
the second terminal of the resistor coupled to the first input of
the amplifier; and a capacitor having first and second terminals,
the first terminal of the capacitor coupled to the impedance
circuit, the second terminal of the second resistor coupled to the
first input of the amplifier.
25. The apparatus of claim 19, in which the second input circuit
includes a phase-shifter circuit.
26. The apparatus of claim 25, in which the phase-shifter circuit
includes a phase lead circuit.
27. The apparatus of claim 26, in which the phase lead circuit
includes a parallel resistor and capacitor.
28. The apparatus of claim 19, in which the second input circuit
includes an input protection circuit.
29. The apparatus of claim 28, in which the input protection
circuit includes: a resistor, having first and second terminals,
the first terminal of the resistor coupled to the second electrode;
a first diode, having an anode and a cathode, the anode of the
first diode coupled to the second terminal of the resistor, the
cathode of the first diode coupled to a positive power supply; and
a second diode, having an anode and a cathode, the anode of the
second diode coupled to a negative power supply, the cathode of the
second diode coupled to the second terminal of the resistor.
30. The apparatus of claim 1, in which the averager circuit
includes: an amplifier, having a first input, a second input, and
an output providing the CM signal of the averager circuit, the
first input of the amplifier coupled to a ground node; a first
resistor, having first and second terminals, the first terminal of
the first resistor coupled to the first input of the averager
circuit, the second terminal of the first resistor coupled to the
second input of the amplifier; a second resistor having first and
second terminals, the first terminal of the second resistor coupled
to the second input of the averager circuit, the second terminal of
the second resistor coupled to the second input of the amplifier;
and a third resistor having first and second terminals, the first
terminal of the third resistor coupled to the second input of the
amplifier, the second terminal of the third resistor coupled to the
output of the amplifier.
31. An apparatus for sensing a difference between first and second
input voltages, the apparatus including: a first input circuit,
providing a first input voltage based on a signal received from a
first electrode; a second input circuit, providing a second input
voltage based on a signal received from a second electrode; a first
amplification circuit, providing a differential output signal based
on the first and second input voltages; an averager circuit,
providing a common mode (CM) output signal based on the first and
second input voltages; and an impedance circuit, approximately
matching at least one of a gain/attenuation or a phase of the first
input circuit and the first electrode to at least one of a
respective gain/attenuation or a phase of the second input circuit
and the second electrode based on the differential and CM output
signals.
32. The apparatus of claim 31, further comprising a phase-shifter
receiving the CM output signal and providing a quadrature
phase-shifted common mode (QCM) output signal, and wherein the
impedance circuit includes a feedback controller circuit that
comprises: a first mixer, coupled to receive the differential and
CM output signals, and providing a first mixer output based the
differential and CM output signals; and a second mixer, coupled to
receive the differential and QCM output signals, and providing a
second mixer output based on the differential and QCM output
signals.
33. The apparatus of claim 32, in which the feedback controller
circuit further includes: a first integrator, having an input
coupled to the first mixer output, and providing a first control
signal to control a component of an impedance in one of the second
input circuit and the impedance circuit; and a second integrator,
having an input coupled to the second mixer output, and providing a
second control signal to control a component of an impedance in one
of the second input circuit and the impedance circuit.
34. An apparatus for sensing a difference between first and second
input voltages, the apparatus including: a first input circuit,
providing the first input voltage based on a signal received from a
first electrode; a second input circuit, providing the second input
voltage based on a signal received from a second electrode; a first
amplifier providing a differential output signal based on the first
and second input voltages; an averager providing a common mode (CM)
output signal based on the first and second input voltages; and a
means for approximately matching at least one of a gain/attenuation
or a phase of the first input circuit and the first electrode to at
least one of a respective gain/attenuation or a phase of the second
input circuit and the second electrode, based on the differential
and CM output signals.
35. An apparatus for sensing signals at first and second input
terminals, the apparatus including: a first buffer, including a
first buffer input, coupled to the first input terminal, and a
first buffer output; a first series impedance between the first
buffer input and the first input terminal; a first shunt impedance
between the first buffer input and a ground node; a second buffer,
including a second buffer input, coupled to the second input
terminal, and a second buffer output; a second series impedance
between the second buffer input and the second input terminal; a
second shunt impedance between the second buffer input and at least
one control node; and an impedance circuit, providing at least one
control signal to the at least one control node such that at least
one of a first gain/attenuation or a first phase between the first
input terminal and the first buffer input approximately matches at
least one of a second gain/attenuation or a second phase between
the second input terminal and the second buffer input.
36. An apparatus for sensing signals at first and second input
terminals, the apparatus including: a first buffer, including a
first buffer input that is coupled to the first input terminal, and
a first buffer output; a first effective impedance coupled to the
first buffer input; a second buffer, including a second buffer
input that is coupled to the second input terminal and a second
buffer output; a second effective impedance coupled to the second
buffer input; a first amplification circuit, coupled to receive the
first and second buffer outputs, and providing a differential
output signal based thereon; a second amplification circuit,
coupled to receive the first and second buffer outputs, and
providing a common mode (CM) output signal based thereon; a
feedback controller circuit, providing at least one control signal
to the second effective impedance such that the second effective
impedance approximately matches the first effective impedance,
wherein the at least one control signal is based on the
differential output signal and the CM output signal.
37. The apparatus of claim 36, further comprising a phase-shifter,
coupled to receive CM output signal and providing a quadrature
common mode (QCM) output signal based thereon, and wherein the at
least one control signal is also based on the QCM output
signal.
38. An electrocardiogram system comprising: a first electrode
adapted for being coupled to a patient for receiving an electrical
first heart activity signal; a second electrode adapted for being
coupled to the patient for receiving an electrical second heart
activity signal; a first amplification circuit, including a first
input that is coupled to the first electrode, a second input that
is coupled to the second electrode, and an output providing a
electrocardiogram (ECG) output signal based on a difference between
the first and second heart activity signals; an averager circuit,
including a first input that is coupled to the first electrode, a
second input that is coupled the second electrode, and an output
providing a common mode (CM) output signal based on the first and
second heart activity signals; a first phase-shifter circuit,
coupled to the output of the averager circuit to receive the CM
output signal, and providing a quadrature common mode (QCM) output
signal; an impedance circuit, coupled to receive signals from the
outputs of the first amplification, the averager, and the first
phase-shifter circuits, the impedance circuit providing a first
control signal based on a first multiplication of components of the
ECG output signal with components of the CM output signal, the
impedance circuit also providing a second control signal based on a
second multiplication of components of the ECG output signal with
components of the QCM output signal; and an impedance control
subcircuit, coupled to receive the first and second control
signals, the impedance control subcircuit providing an effective
impedance, coupled to the second electrode, that is adjusted based
on an impedance that is coupled to the first electrode.
39. The system of claim 38, further comprising a second
phase-shifter between the first electrode and the first
amplifier.
40. A method of detecting first and second input signals, the
method comprising: receiving the first input signal from a first
electrode; receiving the second input signal from a second
electrode; obtaining a difference signal based on the first and
second input signals; obtaining a common mode (CM) signal based on
the first and second input signals; obtaining a quadrature common
mode (QCM) signal that is phase-shifted from the CM signal; and
approximately matching at least one of a gain/attenuation or a
phase of the second input signal to at least one of a respective
gain/attenuation or a phase of the first input signal, based on the
difference, CM, and QCM signals.
41. The method of claim 40, in which matching the gain/attenuation
or phase includes adjusting a impedance coupled to the second
electrode based on an impedance coupled to the first electrode.
42. The method of claim 40, further comprising phase-shifting the
first input signal at the first electrode before obtaining the
difference and CM signals.
43. The method of claim 42, further comprising phase-shifting the
second input signal at the second electrode before obtaining the
difference and CM signals.
44. A method of detecting a voltage between first and second
electrodes, the method comprising: receiving a first input voltage
from the first electrode; receiving a second input voltage from the
second electrode; obtaining a difference signal based on the first
and second input voltages; obtaining a common mode (CM) signal
based on the first and second input voltages; obtaining a
quadrature common mode (QCM) signal that is phase-shifted from the
CM signal; multiplying components of the difference signal with
components of the CM signals to provide a first control signal;
multiplying components of the difference signal with components of
the QCM signal to provide a second control signal; and adjusting an
effective impedance, coupled to the second electrode, based on the
first and second control signals and an impedance coupled to the
first electrode.
45. The method of claim 44, further comprising phase-shifting the
first input voltage at the first electrode before obtaining the
difference and CM signals.
46. The method of claim 45, further comprising phase-shifting the
second input voltage at the second electrode before obtaining the
difference and CM signals.
Description
TECHNICAL FIELD
[0001] This invention relates generally to a voltage sensing system
and particularly, but not by way of limitation, to a voltage
sensing system with input impedance balancing for electrocardiogram
(ECG) sensing applications.
BACKGROUND
[0002] When functioning properly, the human heart maintains its own
intrinsic rhythm, and is capable of pumping adequate blood
throughout the body's circulatory system. The body's autonomous
nervous system generates intrinsic electrical heart activity
signals that are conducted to atrial and ventricular heart chambers
on the left and right sides of the heart. The electrical heart
activity signals trigger resulting heart contractions that pump
blood.
[0003] The intrinsic electrical heart activity signals can be
monitored to provide an electrocardiogram (ECG) signal to a
physician, clinician, diagnostician, or researcher to obtain
information about heart function. In one such technique, a first
external skin patch electrodes is adhesively affixed to the
patient's right arm. A second external skin patch electrode is
adhesively affixed to the patient's left arm. An instrumentation
amplifier is used to detect the electrical heart activity signals
at the first and second electrodes. The instrumentation amplifier
outputs an ECG signal based on the difference of the signals at the
first and second electrodes.
[0004] If no further electrodes are used, the ECG signal obtained
between the first and second electrodes is typically severely
degraded by common-mode (CM) noise signals, such as 60 Hertz or
other environmental noise signals that are present at both of the
first and second electrodes. Common-mode noise problems generally
result even if a high-quality instrumentation amplifier is used.
Skin-electrode interface impedance differences between the first
and second electrodes contribute to such common-mode noise
problems. Differences in skin-electrode interface impedances result
from differences in body morphology, adhesion of the electrode,
perspiration by the patient, etc. Because of the high
input-impedance of the instrumentation amplifier, even small
differences in the skin-electrode impedance (e.g., 10 kiloohms) can
result in a common-mode noise signal amplitude that exceeds the
amplitude of the desired ECG signal.
[0005] One technique of reducing the common-mode noise signal is to
attach a third electrode, such as at the patient's right leg, for
use in a feedback arrangement. The third electrode is driven by an
offsetting common-mode signal to cancel a portion of the unwanted
common-mode noise signal. However, this technique is inconvenient
for the physician, because it requires attachment of the third
electrode to the patient. This increases the complexity of the
medical procedure. In a medical emergency, for example, such
increased complexity is highly undesirable. Thus, there is a need
for improved ECG measurement techniques providing adequate
common-mode noise immunity without relying exclusively on attaching
additional electrodes to the patient.
SUMMARY
[0006] The present system provides, among other things, a voltage
sensing system with input impedance balancing for electrocardiogram
(ECG) sensing or other applications. The present system allows
sensing of ECG or other input voltage signals and reduces sensing
of unwanted common-mode noise signals. The present system is
capable of use with two electrodes, while still providing good
signal-to-noise characteristics.
[0007] According to one aspect of the present system, signals are
received at first and second electrodes or terminals, each having
an impedance associated therewith. An effective impedance
associated with the second electrode is adjusted based on an
effective impedance associated with the first electrode. In one
embodiment, an impedance circuit adjusts the effective impedance
associated with the second electrode based on difference and common
mode signals obtained from signals at the first and second
electrodes. As a result, signals associated with each electrode
undergo a similar degree of gain/attenuation and/or phase-shift.
This reduces common mode noise and enhances the signal-to-noise
characteristics of a desired ECG or other output signal, without
requiring the use of more than two electrodes. Thus, in an ECG
signal acquisition application, the present system enhances the
noise immunity of the ECG signal without increasing the complexity
of the associated medical procedure. Other aspects of the invention
will be apparent on reading the following detailed description of
the invention and viewing the drawings that form a part
thereof.
BRIEF DESCRIPTION OF THE DRAWINGS
[0008] In the drawings, like numerals describe substantially
similar components throughout the several views.
[0009] FIG. 1 is a schematic/block diagram illustrating generally
one embodiment of portions of a voltage sensing system and an
environment in which it is used.
[0010] FIG. 2 is a schematic/block diagram that illustrates
generally one embodiment of portions of a voltage sensing system,
such as an ECG detector, and an environment in which it is
used.
[0011] FIG. 3A is a schematic diagram illustrating generally one
embodiment of a first input circuit.
[0012] FIG. 3B is a schematic diagram illustrating generally
another embodiment of a first input circuit.
[0013] FIG. 4A is a schematic diagram illustrating generally one
embodiment of a second input circuit.
[0014] FIG. 4B is a schematic diagram illustrating generally
another embodiment of a second input circuit.
[0015] FIG. 5A is a schematic diagram illustrating generally one
embodiment of a configuration of a first amplification circuit and
an averager.
[0016] FIG. 5B is a schematic diagram illustrating generally one
embodiment of a merged first amplification circuit and
averager.
[0017] FIG. 6A is a schematic/block diagram illustrating generally
one embodiment of an impedance circuit.
[0018] FIG. 6B is a schematic/block diagram illustrating generally
one embodiment of a feedback controller circuit portion of the
impedance circuit.
[0019] FIG. 7 is a schematic diagram illustrating generally one
embodiment of an impedance control subcircuit.
[0020] FIG. 8A is a signal waveform diagram illustrating generally
one embodiment of operating a feedback controller circuit in which
a filtered ECG signal is substantially in phase with a filtered
common mode signal.
[0021] FIG. 8B is a signal waveform diagram illustrating generally
one embodiment of operating a feedback controller circuit in which
a filtered ECG signal is substantially 180 degrees out of phase
with a filtered common mode signal.
[0022] FIG. 9A is a signal waveform diagram illustrating generally
one embodiment of operating a feedback controller circuit in which
a filtered ECG signal is substantially in phase with a filtered
phase-shifted common mode signal.
[0023] FIG. 9B is a signal waveform diagram illustrating generally
one embodiment of operating a feedback controller circuit in which
a filtered ECG signal is substantially 180 degrees out of phase
with a filtered phase-shifted common mode signal.
[0024] FIG. 10 is a computer simulation signal waveform diagram
showing an ECG output signal (where electrode impedances are
mismatched) before and after activation of the impedance
circuit.
DETAILED DESCRIPTION
[0025] In the following detailed description, reference is made to
the accompanying drawings which form a part hereof, and in which is
shown by way of illustration specific embodiments in which the
invention may be practiced. These embodiments are described in
sufficient detail to enable those skilled in the art to practice
the invention, and it is to be understood that the embodiments may
be combined, or that other embodiments may be utilized and that
structural, logical and electrical changes may be made without
departing from the spirit and scope of the present invention. The
following detailed description is, therefore, not to be taken in a
limiting sense, and the scope of the present invention is defined
by the appended claims and their equivalents. In the drawings, like
numerals describe substantially similar components throughout the
several views.
[0026] In this document, the term gain is understood to refer to
both gains greater than one and gains that are less than or equal
to one (i.e., the term gain includes attenuation). Similarly, the
term amplification is understood to include both gains greater than
one and gains that are less than or equal to one. Furthermore,
amplification refers to amplification of differential mode signals
and/or amplification of common mode signals. Amplifier is
understood to incorporate the above understanding of
amplification.
General System Overview
[0027] This document describes, among other things, a voltage
sensing system with input impedance balancing for electrocardiogram
(ECG) sensing or other applications. The present system allows
sensing of ECG or other input voltage signals and reduces sensing
of unwanted common-mode noise signals. The present system does not
require the use of more than two electrodes. However, it is
understood that more than two electrodes can be used in the present
system such as, for example, to further improve its signal-to-noise
ratio.
[0028] FIG. 1 is a schematic/block diagram illustrating generally,
by way of example, but not by way of limitation, one embodiment of
portions of the present voltage sensing system and an environment
in which it is used. In FIG. 1, a voltage sensing system includes,
for example, an ECG detector 100. The ECG detector 100 is coupled,
via leadwires or otherwise, to input terminals, such as first and
second electrodes 110A-B located at or communicatively coupled to a
living organism, such as human or other patient 105, In one
embodiment, first electrode 110A is disposed at or near a right arm
of patient 105 and second electrode 110B is disposed at or near a
left arm of patient 105. First and second electrodes 110A-B are
optionally skin patch electrodes that are affixed to the patient's
skin, such as using a conductive adhesive or otherwise. Although
the embodiment illustrated in FIG. 1 utilizes external electrodes
110A-B, it is understood that other embodiments of the present
voltage sensing system use electrodes that are implanted in patient
105.
[0029] In one embodiment, ECG detector 100 is optionally included
in a cardiac rhythm management system. In one such example, the
cardiac rhythm management system also includes an implanted cardiac
rhythm management device 115, such as a pacer, a defibrillator, or
a pacer/defibrillator. The implanted device 115 is coupled to heart
120, such as by one or more leadwires or otherwise, for delivering
cardiac rhythm management therapy (e.g., electrical pulses or
defibrillation countershocks). In one embodiment, the cardiac
rhythm management system further includes an external programmer
125. A communication device, such as telemetry device 130,
communicatively couples external programmer 125 to implanted device
115. Programmer 125 includes ECG detector 100.
[0030] FIG. 2 is a schematic/block diagram that illustrates
generally, by way of example, but not by way of limitation, one
embodiment of portions of a voltage sensing system, such as ECG
detector 100, and an environment in which it is used. In FIG. 2,
body voltages including an electrical heart activity signal are
received at first and second electrodes 110A-B, which are modeled
schematically. First electrode 110A has an effective skin-electrode
impedance modeled by resistor 200A in parallel with capacitor 205A.
Similarly, second electrode 110A has an effective skin-electrode
impedance modeled by resistor 200B in parallel with capacitor 205B.
Electrodes 110A-B are coupled, at respective nodes 210A-B, to
respective first and second input circuits 215A-B associated with
ECG detector 100. Input circuits 215A-B provide outputs at
respective nodes 220A-B. Nodes 220A-B are each coupled to both of
first amplification circuit 225 and averager 230.
[0031] An output of first amplification circuit 225, at node 235,
provides an ECG signal output and is coupled to impedance circuit
239. An output of averager 230, at node 245, provides a common mode
signal that is coupled to impedance circuit 239.
[0032] At least one output of impedance circuit 239 is coupled to
second input circuit 215B for controlling its impedance to reduce
the common mode noise signal at the ECG signal output node 235.
[0033] As discussed above, the effective impedances of first
electrode 110A and second electrode 110B may be different. This
causes the amount of signal attenuation from the input of electrode
110A to node 210A to be different from the amount of signal
attenuation from the input of electrode 110B to node 210B.
[0034] According to prior art techniques, this resulted in an
unwanted common-mode noise signal amplitude, at node 235, that
exceeds the desired ECG signal amplitude at node 235. According to
one aspect of the present system, however, impedance circuit 239
substantially offsets, corrects, or compensates for effects of the
impedance mismatch between electrodes 110A-B. As a result, the
effective signal attenuation from the input of electrode 110A to
node 220A is approximately equal to the effective signal
attenuation from the input of electrode 110B to node 210B. This, in
turn, decreases the common-mode noise at ECG signal output node
235, such that the desired ECG signal is more readily discernable
at node 235.
Examples of Input Circuits
[0035] FIG. 3A is a schematic diagram illustrating generally, by
way of example, but not by way of limitation, one embodiment of
first input circuit 215A. The input signal from first electrode
110A is received at node 210A through series protection resistor
300A. Resistor 300A limits a current received by subsequent
circuits when high energy is received, such as from electrostatic
discharges (ESD) or from the delivery of a defibrillation
countershock to heart 120. This protects such circuits against
possible damage. Similarly, protection diodes 305A and 310A clamp
the voltage at node 315A, such that it does not exceed the positive
power supply voltage, VDD, at node 320, by more than a diode
voltage, and such that the voltage at node 315A does not fall below
the negative power supply voltage, V.sub.SS, at node 325, by more
than a diode voltage.
[0036] In one embodiment, input circuit 215A also includes a phase
shifter 330A. In one example, phase shifter 330A includes a series
phase lead network formed by resistor 335A in parallel with
capacitor 340A. An output of phase shifter 330A is coupled, at node
345A, to a positive input of a buffer such as that of buffer
amplifier 350A. An output, at node 220A, of amplifier 350A is fed
back to its negative input. The output at node 220A of amplifier
350A is also fed back to its positive input through feedback
resistor 355 and input resistor 360A. An intermediate node 365A,
between series-connected feedback resistor 355 and input resistor
360A, is coupled to a stable reference voltage, such as a ground
node, through resistor 370. Input capacitor 375A is coupled between
the positive input, at node 345A, of amplifier 350A, and the ground
node.
[0037] Amplifier 350A and the network of resistors 355, 360A, and
370 form an impedance bootstrap circuit that effectively increases
the effective impedance of input resistor 360A, as seen at node
345A, as compared what such impedance would be if resistor 360A
directly coupled node 345A to the ground node. The impedance
bootstrap circuit operates such that an increase in voltage at node
345A results in an increase in voltage at nodes 220A and 365A. This
reduces the voltage across resistor 360A which, in turn, reduces
the current through resistor 360A. Because the resulting current
through resistor 360A, in response to a given change in voltage at
node 345A, is less than it would be if resistor 360A directly
coupled node 345A to ground, Ohm's Law indicates that the effective
impedance seen at node 345A is increased. Similarly, a decrease in
voltage at node 345A results in a decrease in voltage at nodes 220A
and 365A which, in turn, also reduces the current through resistor
360A, thereby increasing the effective resistance of resistor 360A
as seen at node 345A.
[0038] FIG. 4A is a schematic diagram illustrating generally, by
way of example, but not by way of limitation one embodiment of
second input circuit 215B. As illustrated in FIG. 4A, second input
circuit 215B is similar to first input circuit 215A. Operation of
correspondingly numbered elements (but with a different suffix
letter "B") is as described with respect to FIG. 3A. In FIG. 4A,
however, input resistor 360B couples a signal received at node
270A, from impedance circuit 239, to the positive input, at node
345B, of a buffer, such as buffer amplifier 350B.
[0039] Similarly, input capacitor 375B couples a signal received at
node 270B, from impedance circuit 239, to the positive input, at
node 345B, of buffer amplifier 350B.
[0040] FIG. 4A illustrates resistor 360B and capacitor 375B as
being part of second input circuit 215B, for convenience of
illustrating similarities and differences between first and second
input circuits 215A-B. It is understood, however, that resistor
360B and capacitor 375B are alternatively regarded as being part of
impedance circuit 239 rather than as being part of second input
circuit 215B, and could alternatively be illustrated therewith.
[0041] In operation, the voltages at nodes 270A-B are adjusted by
impedance circuit 239 (analogous to operation of the impedance
bootstrap circuit described above with respect to FIG. 3A) to vary
the effective impedance of resistor 360B and capacitor 375B such
that a gain/attenuation between first electrode 110A and node 345A
is approximately or substantially equal to a gain/attenuation
between second electrode 110B and corresponding node 345B. In one
embodiment, this results in an attenuation between first electrode
110A and node 220A that is approximately or substantially matched
to an attenuation between second electrode 110B and corresponding
node 220B.
[0042] By increasing the voltage at node 270A, relative to the
voltage at node 345B, the effective resistance of input resistor
360B is increased. By decreasing the voltage at node 270A, relative
to the voltage at node 345B, the effective resistance of input
resistor 360B is decreased. According to one aspect of the present
system, the voltage at input node 270A is controlled by impedance
circuit 239 such that the effective resistance of input resistor
360B matches a resistive component of the effective impedance seen
at node 345A of first input circuit 215A (when the resistor 200A of
first electrode 110A is approximately equal to the resistor 200B of
second electrode 110B and the capacitor 205A of first electrode
110A is approximately equal to the capacitor 205B of second
electrode 110B).
[0043] By decreasing the voltage at node 270B, relative to the
voltage at node 345B, the effective capacitance of input capacitor
375B is increased. By increasing the voltage at node 270B, relative
to the voltage at node 345B, the effective capacitance of input
capacitor 375B is decreased. According to one aspect of the present
system, the voltage at input node 270B is controlled by impedance
circuit 239 such that the effective capacitance of input capacitor
375B matches the reactive (e.g., capacitive) component of the
effective impedance seen at node 345A of first input circuit 215A
(when the resistor 200A of first electrode 110A is approximately
equal to the resistor 200B of second electrode 110B and the
capacitor 205A of first electrode 110A is approximately equal to
the capacitor 205B of second electrode 110B).
[0044] The system is described above as including phase-lead
networks 330A and 330B to accommodate a full range of phase lags
introduced by impedance circuit 239, resistor 360B, and capacitor
375B. Alternatively, phase lead networks 330A and 330B are omitted,
and a negative impedance circuit is used in place of at least one
of resistor 360B and capacitor 375B, as illustrated in FIGS. 3B and
4B by way of example, but not by way of limitation. In FIG. 4B, for
example, an additional capacitor 375C is included, and capacitor
375B is implemented as a negative capacitance circuit. In this
embodiment, capacitors 375A and 375C each have an approximately
equal nominal capacitance value ("C"), and negative capacitor
circuit 375B has a nominal capacitance value of -2C. Alternatively,
capacitor 375A has a nominal capacitance value C, capacitor 375B
has a nominal capacitance value 2C, and capacitor 375C is
implemented as a negative capacitance network having a capacitance
value of approximately 'C.
Examples of Differential Amplifier, Averager, and Phase-Shifter
[0045] FIG. 5A is a schematic diagram illustrating generally, by
way of example, but not by way of limitation, one embodiment of a
configuration of first amplification circuit 225 and averager 230,
such as illustrated in FIG. 2. In one embodiment, as illustrated in
FIG. 5A, first amplification circuit 225 includes a differential
input, single-ended output amplifier, such as an off-the-shelf or
other instrumentation amplifier. First amplification circuit 225
receives input signals at nodes 220A-B from first and second input
circuits 215A-B, respectively, and outputs an ECG signal at node
235.
[0046] In this embodiment, averager 230 includes a differential
input, single-ended output operational amplifier 500. Amplifier 500
includes a positive input that is coupled to a ground node and an
output, at node 245, that provides a common mode voltage of the
signals at nodes 220A and 220B. The common mode signal at the node
245 is fed back to the inverting input, at node 505, of amplifier
500, such as through feedback resistor 510. The inverting input of
amplifier 500, at node 505, is coupled via first input resistor 512
to receive a signal, at node 220A, from first input circuit 215A.
The inverting input of amplifier 500, at node 505, is also coupled
via second input resistor 515 to receive a signal, at node 220B,
from second input circuit 215B. In an alternate embodiment,
averager 230 includes a passive network (i.e., without using
operational amplifier 500) for averaging the signals at nodes
220A-B.
[0047] In this embodiment, first amplifier 225 is configured as an
instrumentation amplifier, which includes first operational
amplifier 520, second operational amplifier 522 and third
operational amplifier 524, each having differential inputs and a
single-ended output. A noninverting input of first operational
amplifier 520 is coupled to first input circuit 215A at node 220A.
The output, at node 526, of first operational amplifier 520 is fed
to the inverting input of third operational amplifier 524 through
resistor 528, and is also fed back through resistor 530 to the
inverting input, at node 529, of first operational amplifier 520. A
noninverting input of second operational amplifier 522 is coupled
to second input circuit 215B at node 220B. The output, at node 532,
of second operational amplifier 522 is fed to the noninverting
input of third operational amplifier 524 through resistor 534, and
is also fed back to the inverting input, at node 535, of second
operational amplifier 522 through resistor 536. The inverting input
node 529 of first operational amplifier 520 is coupled to the
inverting input node 535 of second operational amplifier 522
through series-coupled resistors 538 and 540. The output of third
operational amplifier 524 provides the ECG signal at node 235, and
is coupled back to the inverting input of third operational
amplifier through resistor 542. The noninverting input of third
operational amplifier 524 is coupled to a ground node through
resistor 544.
[0048] FIG. 5B is a schematic diagram illustrating generally, by
way of example, but not by way of limitation, one embodiment of a
configuration of a merged first amplification circuit 225 and
averager 230. In this embodiment, a single instrumentation
amplifier 225 is used, and the common mode-signal at node 245 is
provided by the common mode output of the instrumentation amplifier
taken between resistors 538 and 540.
Example Impedance Circuit
[0049] FIG. 6A is a schematic/block diagram illustrating generally,
by way of example, but not by way of limitation, one embodiment of
impedance circuit 239. Impedance circuit 239 receives the ECG
signal, at node 235, the common mode signal, at node 245, and the
output, at node 220B, of second input circuit 215B. The ECG signal
at node 235 is amplified at buffer 602, which provides an output at
node 604 that is then filtered by filter 606, which, in one
embodiment, is a bandpass filter that attenuates frequencies
outside the range of approximately 6-600 Hz (e.g., single pole
rolloff frequencies). This, in turn, provides a filtered ECG signal
output at node 608 to feedback controller 610. In one alternate
embodiment, buffer 602 and filter 606 are combined. In another
alternate embodiment, filter 606 is a highpass filter.
[0050] The common mode signal at node 245 is amplified at buffer
612, which provides an output at node 614 that is then filtered by
filter 616, which, in one embodiment, is a bandpass filter that
attenuates frequencies outside the range of approximately 6-600 Hz.
This, in turn, provides a filtered common mode signal output at
node 618 to feedback controller 610. In one alternate embodiment,
buffer 612 and filter 616 are combined. In another alternate
embodiment, filter 616 is a highpass filter.
[0051] The filtered common mode signal output at node 618 is also
received by phase-shifter 620, which provides a filtered
phase-shifted common mode signal output at node 622 to feedback
controller 610. In one embodiment, phase-shifter 620 includes an
integrator circuit that includes differential input, single-ended
output operational amplifier 624. Amplifier 624 has a positive
input, which is coupled to ground, and an output at node 622 that
is fed back to its inverting input, at node 626, through a feedback
capacitor 628. The inverting input of amplifier 624 is also
coupled, via input resistor 630, to receive the filtered common
mode output signal, at node 618, from the output of filter 616.
Phase-shifter 620 provides a filtered phase-shifted common mode
output signal, at node 622 (which, in one embodiment, is
approximately 90 degrees out of phase with the common mode signal
at node 245 and is also referred to as a filtered quadrature common
mode signal). In an alternative embodiment, phase-shifter 620 is
configured as a differentiator, rather than as an integrator (i.e.,
resistor 630 is configured in the feedback path around amplifier
624 and capacitor 628 is interposed between nodes 618 and 626).
[0052] Based on the filtered ECG signal at node 608, the filtered
common mode signal at node 618, and the filtered quadrature common
mode signal at node 622, feedback controller 610 provides a
resistive matching control signal, at node 632, and a capacitive
matching control signal, at node 634, to impedance control
subcircuit 636. Impedance control subcircuit 636 also receives the
output signal, at node, 220B, from second input circuit 215B. Based
on these input signals, impedance control subcircuit 636 provides
control voltages, at node/bus 270 to second input circuit 215B for
controlling its impedance to reduce the common mode noise signal at
the ECG signal output node 235.
Example Feedback Controller Circuit
[0053] FIG. 6B is a schematic/block diagram illustrating generally,
by way of example, but not by way of limitation, one embodiment of
feedback controller circuit 610. Feedback controller circuit 610
receives the filtered ECG signal, at node 608, the filtered common
mode signal, at node 618, and the filtered phase-shifted common
mode signal at node 622.
[0054] In one embodiment, the filtered common mode signal, at node
618, is phase-detected with respect to the filtered ECG output
signal, at node 608, as described below. The filtered ECG signal at
node 608 is mixed or multiplied with the filtered common mode
signal, at node 618, by a mixer or multiplier (referred to
interchangeably herein) such as analog multiplier 640, which
provides a resulting signal, referred to as an in-phase signal, at
node 645. The in-phase signal at node 645 is received by low pass
filter 650. In one embodiment, low pass filter 650 attenuates
frequency components above a cutoff frequency of approximately 40
Hertz, and provides a resulting low pass filtered in-phase signal,
at node 655, to integrator 660. Integrator 660 integrates the low
pass filtered in-phase signal, providing a resulting
resistive-matching control signal, at node 632, to impedance
control subcircuit 636.
[0055] The filtered phase-shifted common mode signal, at node 622,
is phase-detected with respect to the filtered ECG output signal,
at node 608, as described below. The filtered ECG signal at node
608 is mixed or multiplied with the filtered phase-shifted common
mode signal, at node 622, by a mixer or multiplier, such as analog
multiplier 665, which provides a resulting signal, referred to as a
quadrature phase signal, at node 670. The quadrature phase signal
at node 670 is received by low pass filter 675. In one embodiment,
low pass filter 675 attenuates frequency components above a cutoff
frequency of approximately 40 Hertz, and provides the resulting low
pass filtered quadrature phase signal, at node 680, to an
integrator, such as inverting integrator 685. Inverting integrator
685 integrates and inverts the low pass filtered quadrature phase
signal, providing a resulting capacitive-matching control signal,
at node 634, to impedance control subcircuit 636.
Example Impedance Control Subcircuit
[0056] FIG. 7 is a schematic diagram illustrating generally, by way
of example, but not by way of limitation, one embodiment of
portions of impedance control subcircuit 636. In this embodiment,
impedance control subcircuit 636 includes one or more variable gain
or similar circuits, such as analog multiplier circuits, or first
voltage controlled amplifier (VCA) 700A and second VCA 700B. A
negative input of each of VCAs 700A-B is grounded. A positive input
of each of VCAs 700A-B is coupled to node 220B to receive the
output signal from second input circuit 215B.
[0057] In one embodiment, the gain of first VCA 700A is adjusted by
the resistive-matching control signal received at node 632 from
feedback controller circuit 610. The gain of second VCA 700B is
adjusted by the capacitive-matching control signal received at node
634 from feedback controller circuit 610. The gain of respective
VCAs 700A-B is increased for more positive signals at respective
nodes 632 and 634, and decreased for more negative signals at
respective nodes 632 and 634. First VCA 700A provides an output
voltage, at node 270A, to resistor 360B in second input circuit
215B. Second VCA 700B provides an output voltage, at node 270B, to
capacitor 375B in second input circuit 215B.
[0058] FIG. 4 illustrates resistor 360B and capacitor 375B as being
part of second input circuit 215B, for convenience of illustrating
similarities and differences between first and second input
circuits 215A-B. It is understood, however, that resistor 360B and
capacitor 375B are alternatively regarded as being part of
impedance control subcircuit 636 rather than as being part of
second input circuit 215B (or other portion of impedance circuit
239) and could alternatively be illustrated therewith.
[0059] In one embodiment, first and second VCAs 700A-B provide
independent impedance bootstraps, as discussed above with respect
to amplifier 350A in first input circuit 215A. However, the gain of
first and second VCAs 700A-B is adjusted by feedback controller
circuit 610 to control the respective node voltages 270A-B to
substantially offset or approximately correct the impedance
mismatch between electrodes 110A-B. As a result, the effective
signal attenuation from the input of electrode 110A to node 220A is
approximately equal to the effective signal attenuation from the
input of electrode 110B to node 210B. This, in turn, decreases the
common-mode noise at ECG signal output node 235, such that the ECG
signal is more readily discernable at node 235.
Example Operation of Impedance Circuit
[0060] FIG. 8A is a signal waveform diagram illustrating generally,
by way of example, but not by way of limitation, one embodiment of
operating impedance circuit 239. In FIG. 8A, V.sub.608 represents
an illustrative example of a filtered ECG signal at node 608 and
V.sub.608 represents an illustrative example of a filtered common
mode signal at node 618. In the example illustrated in FIG. 8A,
V.sub.608 and V.sub.618 are in phase with each other. The signals
V.sub.608 and V.sub.608 are multiplied with each other at
multiplier 640, providing V.sub.645, a resulting in-phase signal at
node 645. For the illustrated signals V.sub.608 and V.sub.618,
which are in phase with each other, the resulting in-phase signal
at node 645 is frequency-doubled and positive-valued. The in-phase
signal at node 645 is filtered by low pass filter 650, which
attenuates high-frequency components, resulting in a
positive-valued signal V.sub.655 at node 655. The low pass filtered
in-phase signal at node 655 is integrated by integrator 660,
resulting in an upward ramping resistive-matching control signal,
V.sub.632 at node 632. An increase in the resistive-matching
control signal at node 632 increases the gain of first VCA 700A,
which increases the effective resistance of resistor 360B.
[0061] FIG. 8B is a signal waveform diagram, similar to FIG. 8A,
but providing an illustrative example of signals V.sub.608 and
V.sub.608 being out of phase with each other. After multiplication,
the resulting in-phase signal V.sub.645 at node 645 is
frequency-doubled and negative-valued. As a result, the low pass
filtered in-phase signal V.sub.655 at node 655 is also
negative-valued. Integration yields a downward ramping
resistive-matching control signal V.sub.632 at node 632, which
decreases the gain of first VCA 700A, and decreases the effective
resistance of resistor 360B.
[0062] FIG. 9A is a signal waveform diagram illustrating generally,
by way of example, but not by way of limitation, another aspect of
one embodiment of operating impedance circuit 239. In FIG. 9A,
V.sub.608 represents an illustrative example of a filtered ECG
signal at node 608 and V.sub.608 represents an illustrative example
of a filtered phase-shifted common mode signal at node 618. In the
example illustrated in FIG. 9A, V.sub.608 and V.sub.618 are in
phase with each other. The signals V.sub.608 and V.sub.608 are
multiplied with each other at multiplier 665, providing V.sub.670,
a resulting quadrature-phase signal at node 670. For the
illustrated signals V.sub.608 and V.sub.618, which are in phase
with each other, the resulting quadrature-phase signal at node 670
is frequency-doubled and positive-valued. The quadrature-phase
signal at node 670 is filtered by low pass filter 675, which
attenuates high-frequency components, resulting in a
positive-valued signal V.sub.680 at node 680. The low pass filtered
quadrature-phase signal at node 680 is integrated and inverted by
inverting integrator 685, resulting in a downward ramping
capacitive matching control signal at node 634. A decrease in the
capacitive matching control signal at node 634 decreases the gain
of second VCA 700B, which increases the effective capacitance of
capacitor 375B.
[0063] FIG. 9B is a signal waveform diagram, similar to FIG. 9A,
but providing an illustrative example of signals V.sub.608 and
V.sub.618 being out of phase with each other. After multiplication,
the resulting quadrature-phase signal at node 670 is
frequency-doubled and negative-valued. As a result, the low pass
filtered quadrature-phase signal at node 680 is also
negative-valued. Integration and signal inversion by inverting
integrator 685 yields an upward ramping capacitive matching control
signal at node 634, which increases the gain of second VCA 700B,
and decreases the effective capacitance of capacitor 375B.
[0064] FIGS. 8A-B provide illustrative examples of the phase
relationship between the filtered ECG signal at node 608 and the
filtered common mode signal at node 618. According to one aspect of
operation, impedance circuit 239 provides a negative feedback
configuration that tends to minimize the magnitude of the low pass
filtered in-phase signal at node 655. This effectively matches the
effective resistance of resistor 360B in second input circuit 215B
to the effective resistance seen at node 345A in first input
circuit 215A (when the resistor 200A of first electrode 110A is
approximately equal to the resistor 200B of second electrode 110B
and the capacitor 205A of first electrode 110A is approximately
equal to the capacitor 205B of second electrode 110B).
[0065] Similarly, FIGS. 9A-B provide illustrative examples of the
phase relationship between the filtered ECG signal at node 608 and
the filtered phase-shifted common mode signal at node 618.
Impedance circuit 239 provides a negative feedback configuration
that tends to minimize the magnitude of the low pass filtered
quadrature phase signal at node 680. This effectively matches the
effective capacitance of capacitor 375B in second input circuit
215B to the effective capacitance seen at node 345A in first input
circuit 215A (when the resistor 200A of first electrode 110A is
approximately equal to the resistor 200B of second electrode 110B
and the capacitor 205A of first electrode 110A is approximately
equal to the capacitor 205B of second electrode 110B).
[0066] Even when the resistor 200A of first electrode 110A is not
approximately equal to the resistor 200B of second electrode 110B
and the capacitor 205A of first electrode 110A is not approximately
equal to the capacitor 205B of second electrode 110B, the
gain/attenuation from the input of electrode 110A to node 345A in
first input circuit 215A is kept substantially identical to the
gain/attenuation from the input of electrode 110B to node 345B in
second input circuit 215B. As a result, the gain/attenuation from
the input of electrode 110A to node 220A is approximately equal to
the gain/attenuation from the input of electrode 110B to node 220B.
This, in turn, keeps the common mode noise signal at node 245 at a
reasonably small value, improving the signal-to-noise
characteristics of the ECG signal at node 235.
Example Test Results
[0067] Operation of one embodiment of a voltage sensing circuit was
simulated using a SPICE computer simulation. The component values
that were used are listed below (by way of example, but not by way
of limitation).
[0068] First electrode 110A: R.sub.200A=26 K.OMEGA., C.sub.205A=25
nF. First input circuit 215A: R.sub.300A=10 K.OMEGA., R.sub.335A=10
K.OMEGA., C.sub.340A=240 nF, R.sub.360A=10 M.OMEGA., C.sub.375A=120
pF, R.sub.370=2.6 K.OMEGA., R.sub.355=1 K.OMEGA.. Second electrode
110B: R.sub.200B=20 K.OMEGA., C.sub.205B=10 nF. Second input
circuit 215B: R.sub.300B=10 K.OMEGA., R.sub.335B =10 K.OMEGA.,
C.sub.340B=240 nF, R.sub.360B=12 M.OMEGA., C.sub.375B=300 pF.
Averager 230: R.sub.510=100 K.OMEGA., R.sub.512=50 K.OMEGA.,
R.sub.515=50 K.OMEGA.. Phase Shifter 620: C.sub.535=6 nF,
R.sub.530=100 K.OMEGA. (configured as a differentiator). Filters
606 and 616 were configured as high pass filters and each included
an RC network where R=10 M.OMEGA. and C=10 nF. Low pass filters 650
and 675 each included an RC network where R=400 K.OMEGA. and C=10
nF. Integrators 660 and 685 each included an RC integration time
constant where R=800 K.OMEGA. and C=100 nF.
[0069] FIG. 10 is a computer simulation signal waveform diagram,
using above-described component values having mismatched electrode
impedances, and showing the ECG output signal at node 235. Before
time t=1 second, the feedback controller circuit was turned off,
and the ECG output signal is swamped by common mode-noise. At time
t=1 second, the impedance circuit 239 was activated. As illustrated
in FIG. 10, this initiated the gain/attenuation matching described
above. As a result, the common mode noise signal was substantially
reduced, as illustrated in FIG. 10 for times greater than 2
seconds, such that the underlying ECG signal waveform was readily
discernable as having good signal-to-noise characteristics. The
circuit was also resimulated with the impedance mismatch being
incorporated into the opposite electrodes, and obtained similar
results.
Conclusion
[0070] The above-described system provides, among other things, a
voltage sensing system with input impedance balancing for
electrocardiogram (ECG) sensing or other applications. The present
system allows sensing of ECG or other input voltage signals and
reduces sensing of unwanted common-mode noise signals. The present
system does not require the use of more than two electrodes.
Instead, a common mode signal is generated from the two electrodes,
and a feedback network operates to minimize the common mode signal.
It is understood, however, that more than two electrodes can be
used in the present system such as, for example, by including a
third electrode that provides feedback cancellation of the common
mode voltage to further improve its signal-to-noise ratio of the
system. It is also understood that signal inversions (such as from
inverting integrator 685, for example) can be moved elsewhere in
the signal flow.
[0071] It is to be understood that the above description is
intended to be illustrative, and not restrictive. Many other
embodiments will be apparent to those of skill in the art upon
reviewing the above description. The scope of the invention should,
therefore, be determined with reference to the appended claims,
along with the fall scope of equivalents to which such claims are
entitled.
* * * * *