U.S. patent application number 09/782396 was filed with the patent office on 2001-08-30 for method of making field emitters using porous silicon.
Invention is credited to Gilton, Terry L..
Application Number | 20010018222 09/782396 |
Document ID | / |
Family ID | 23191912 |
Filed Date | 2001-08-30 |
United States Patent
Application |
20010018222 |
Kind Code |
A1 |
Gilton, Terry L. |
August 30, 2001 |
Method of making field emitters using porous silicon
Abstract
A process is provided for forming sharp asperities useful as
field emitters. The process comprises patterning and doping a
silicon substrate. The doped silicon substrate is anodized. The
anodized area is then used for field emission tips. The process of
the present invention is also useful for low temperature sharpening
of tips fabricated by other methods. The tips are anodized, and
then exposed to radiant energy and the resulting oxide is
removed.
Inventors: |
Gilton, Terry L.; (Boise,
ID) |
Correspondence
Address: |
TRASK BRITT
P.O. BOX 2550
SALT LAKE CITY
UT
84110
US
|
Family ID: |
23191912 |
Appl. No.: |
09/782396 |
Filed: |
February 13, 2001 |
Related U.S. Patent Documents
|
|
|
|
|
|
Application
Number |
Filing Date |
Patent Number |
|
|
09782396 |
Feb 13, 2001 |
|
|
|
08864496 |
May 28, 1997 |
|
|
|
6187604 |
|
|
|
|
Current U.S.
Class: |
438/20 |
Current CPC
Class: |
H01J 2209/0226 20130101;
H01J 2201/30403 20130101; H01J 9/025 20130101 |
Class at
Publication: |
438/20 |
International
Class: |
H01L 021/00 |
Claims
What is claimed is:
1. A method for fabricating emitter tips using porous silicon, said
method comprising the following steps of: providing at least one
silicon tip; anodizing said at least one silicon tip; exposing said
at least one silicon tip to radiant energy comprising ultra-violet
radiation at a low temperature to form an oxide layer; and
selectively removing said oxide layer from said at least one
silicon tip to sharpen said at least one silicon tip.
2. The method of fabricating emitter tips, according to claim 1,
wherein said selectively removing comprises removing said oxide
layer with hydrofluoric acid.
3. The method of fabricating emitter tips, according to claim 1,
wherein said anodizing said at least one silicon tip comprises
anodizing in a solution including water, hydrofluoric acid, and
isopropyl alcohol in a ratio of 1:1:1.
4. The method of fabricating emitter tips, according to claim 3,
wherein said anodizing comprises providing said hydrofluoric acid
concentrations from about 1 weight percent to about 49 weight
percent.
5. The method of fabricating emitter tips, according to claim 4,
wherein said exposing comprises exposing said at least one silicon
tip in said radiant energy for approximately 5-10 min.
6. The method of fabricating emitter tips, according to claim 1,
wherein said providing comprises providing a rounded silicon
tip.
7. A method for sharpening cathode emitters, comprising the steps
of: providing an array of cathode emitters comprising doped silicon
being P-type; disposing said array of cathode emitters in an
electrochemical bath; exposing said array of cathode emitters to
radiant energy at a low temperature to form an oxide layer; and
disposing said array of cathode emitters in a solution of
hydrofluoric acid to remove said oxide layer.
8. The method of sharpening cathode emitters, according to claim 7,
wherein said disposing said array of cathode emitters in said
electrochemical bath comprises disposing said emitters in a
hydrogen halide and an alcohol.
9. The method of sharpening cathode emitters, according to claim 8,
wherein said disposing further comprises disposing said emitters in
water.
10. The method of sharpening cathode emitters, according to claim
7, wherein said providing said doped silicon further comprises
providing boron.
11. The method of sharpening cathode emitters, according to claim
10, wherein said disposing said array of cathode emitters further
comprises disposing said emitters in a baseplate of a field
emission display.
12. The method of forming sharp asperities, comprising the steps
of: patterning a silicon substrate with a masking material; doping
said silicon substrate with boron; anodizing said doped silicon
substrate to form said sharp asperities; oxidizing said sharp
asperities by exposure to radiant energy at a low temperature to
form a conformal oxide layer over a surface of said sharp
asperities; removing said conformal oxide layer; and removing said
masking material.
13. The method of forming sharp asperities, according to claim 12,
wherein said oxidizing further comprises exposing said sharp
asperities at room temperature.
14. The method of forming sharp asperities, according to claim 12,
wherein said oxidizing further comprises exposing said sharp
asperities at 22.degree. C.-100.degree. C.
15. The method of forming sharp asperities, according to claim 12,
wherein said oxidizing further comprises exposing said sharp
asperities to ultraviolet radiation.
16. The method of forming sharp asperities, according to claim 12,
wherein said oxidizing further comprises exposing said sharp
asperities in air at room temperature.
Description
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a continuation of application Ser. No.
08/864,496, filed May 28, 1997, pending.
BACKGROUND OF THE INVENTION
[0002] 1. Field of the Invention
[0003] This invention relates to field emission devices and, more
particularly, to a method of fabricating field emitters useful in
displays.
[0004] 2. State of the Art
[0005] Cathode ray tube (CRT) displays, such as those commonly used
in desk-top computer screens, function as a result of a scanning
electron beam from an electron gun, impinging on phosphors on a
relatively distant screen. The electrons increase the energy level
of the phosphors. When the phosphors return to their normal energy
level, they release the energy from the electrons as a photon of
light, which is transmitted through the glass screen of the display
to the viewer. One disadvantage of a CRT is the depth of the
display required to accommodate the raster scanner.
[0006] Flat panel displays have become increasingly important in
appliances requiring lightweight portable screens. Currently, such
screens use electroluminescent or liquid crystal technology.
Another promising technology is the use of a matrix-addressable
array of cold cathode emission devices to excite phosphor on a
screen, often referred to as a field emitter display.
[0007] Spindt, et. al. discusses field emission cathode structures
in U.S. Pat. Nos. 3,665,241, 3,755,704, and 3,812,559. To produce
the desired field emission, a potential source is provided with its
positive terminal connected to the gate or grid and its negative
terminal connected to the emitter electrode (cathode conductor
substrate). The potential source is variable for the purpose of
controlling the electron emission current.
[0008] Upon application of a potential between the electrodes, an
electric field is established between the emitter tips and the low
potential anode grid, thus causing electrons to be emitted from the
cathode tips through the holes in the grid electrode.
BRIEF SUMMARY OF THE INVENTION
[0009] The clarity or resolution of a field emission display is a
function of a number of factors, including emitter tip sharpness.
The process of the present invention is directed toward the
fabrication of very sharp cathode emitter tips.
[0010] One aspect of the process present invention involves forming
sharp asperities useful as field emitters. The process comprises
patterning and doping a silicon substrate. The doped silicon
substrate is anodized. Where the silicon substrate was doped,
regions of very sharply defined spires of porous silicon are
formed. These sharp spires or asperities are useful as emitter
tips.
[0011] Another aspect is fabrication of emitter tips using porous
silicon. The method comprises blanket doping and anodizing a
silicon substrate. The unmasked, anodized substrate is then exposed
to patterned ultra-violet light. The exposed areas are oxidized in
air. The oxidized areas are either stripped with hydrofluoric acid,
or retained as an isolation mechanism.
[0012] A further aspect of the present invention is the sharpening
of field emitters. The method comprises anodizing existing silicon
emitters, thereby causing the emitters to become porous. The porous
silicon tips are exposed to ultraviolet light, and rinsed with a
hydrogen halide. The ultraviolet light oxidizes the tips and they
become sharper as the oxide is stripped.
[0013] Other features and advantages of the present invention will
become apparent to those of skill in the art through a
consideration of the ensuing description, the accompanying
drawings, and the appended claims.
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
[0014] In the drawings, which illustrate what is currently
considered to be the best mode for carrying out the invention:
[0015] FIG. 1 is a schematic cross-section of a field emission
display having emitter tips;
[0016] FIG. 2 is a schematic cross-section of an anodization
chamber;
[0017] FIGS. 3A-3B are a schematic cross-sections of one embodiment
of the process of the present invention;
[0018] FIGS. 4A-4C are schematic cross-sections of another
embodiment of the process of the present invention; and
[0019] FIGS. 5A-5D are schematic cross-sections of a further
embodiment of the process of the present invention.
DETAILED DESCRIPTION OF THE INVENTION
[0020] Referring to FIG. 1, a representative field emission display
employing a display, segment 22 is depicted. Each display segment
22 is capable of displaying a pixel of information, or a portion of
a pixel, as, for example, one green dot of a red/green/blue
full-color triad pixel.
[0021] Preferably, a single crystal silicon layer serves as a
substrate 11. Alternatively, amorphous silicon deposited on an
underlying substrate comprised largely of glass or other
combination may be used as long as a material capable of conducting
electrical current is present on the surface of a substrate so that
it can be patterned and etched to form micro-cathodes 13.
[0022] At a field emission site, a micro-cathode 13 has been
constructed on top of the substrate 11. The micro-cathode 13 is a
protuberance which may have a variety of shapes, such as pyramidal,
conical, or other geometry, which has a fine micro-point for the
emission of electrons. Surrounding the micro-cathode 13, is a grid
or gate structure 15. When a voltage differential, through source
20, is applied between the micro-cathode 13 and the gate 15, a
stream of electrons 17 is emitted toward a phosphor coated screen
or faceplate 16. This screen or faceplate 16 is an anode.
[0023] The electron emission tip of micro-cathode 13 is integral
with substrate 11, and serves as a cathode. Gate 15 serves as a
grid structure for applying an electrical field potential to its
respective micro-cathode 13.
[0024] A dielectric insulating layer 14 is deposited on the
conductive microcathode 13, which micro-cathode 13 can be formed
from the substrate or from one or more deposited conductive films
12, such as a chromium amorphous silicon bilayer. The dielectric
insulating layer 14 also has an opening at the field emission site
location.
[0025] Disposed between the faceplate 16 and baseplate 21 are
located spacer support structures 18 which function to support the
atmospheric pressure which exists on the faceplate 16 as a result
of the vacuum which is created between the baseplate 21 and
faceplate 16 for the proper functioning of the emitter tips of
micro-cathode 13.
[0026] The baseplate 21 of the invention comprises a matrix
addressable array of micro-cathodes 13, the substrate 11 on which
the micro-cathodes 13 are created, the dielectric insulating layer
14, and the grid structure 15.
[0027] The process of the present invention provides a method for
fabricating very sharp emitter tips of micro-cathode 13 useful in
displays of the type illustrated in FIG. 1.
[0028] FIG. 2 is a schematic cross-section of a representative
anodization chamber 23 of the type used in the process of the
present invention. A wafer 11' is suspended between two liquid
baths, and seals one bath from the other.
[0029] In the first bath is disposed a metallic electrode 24,
which, in this example, is platinum. The electrode 24 is a cathode
and, therefore, has a positive charge when a voltage 26 is placed
between the baths. An electrode 25 is placed in the second bath.
The electrode 25 is also platinum, in this example, and functions
as an anode, as electrode 25 has a negative potential when a
voltage 26 is placed between the baths.
[0030] In addition to water, the second bath also contains a
hydrogen halide and a surfactant. The volume ratio of water to
hydrogen halide to surfactant is 1:1:1. The preferred surfactant is
an alcohol, such as isopropyl alcohol, which is relatively
inexpensive and pure and commercially available. However, ethanol,
2-butanol, and Triton X100 are also suitable surfactants. The
preferred hydrogen halide is hydrofluoric acid
[0031] When a voltage 26 is applied between the electrodes 24, 25,
the chemicals in the second bath are attracted to the wafer 11' and
react with it.
[0032] Electrochemical anodization of silicon in hydrofluoric acid
etches a network of tiny pores into the silicon surface, and forms
a layer of porous material. Porous silicon forms at current
densities from 10 to 250 mA/cm.sub.2in hydrofluoric acid
concentrations from 1-49 weight percent, with resulting porosities
from 27% to 70%.
[0033] FIGS. 3A-3B illustrate the one embodiment of the process of
the present invention. FIG. 3A illustrates a substrate 35 which has
been patterned and subsequently doped. The substrate 35 comprises
silicon, and can be amorphous silicon, polycrystalline silicon,
micro-grain silicon, and macro-grain silicon, or any other suitable
silicon-containing substrate.
[0034] The substrate 35 is patterned with a mask 32. Mask 32
preferably comprises a photoresist or an oxide. The masked
substrate 35 is then doped. The preferable dopant is boron, and
therefore the doped regions 30 are P+.
[0035] The substrate 35 is then disposed in an anodization chamber
23 of the type described in FIG. 2. The substrate 3 5 is anodized
in the unmasked areas or doped regions 30. The doped regions 30
become porous as a result of the chemicals reacting with the dopant
in the substrate 35. As the anodization process continues, the
porous silicon develops a structure having randomly distributed,
sharp spires or tips 33, as illustrated in FIG. 3B.
[0036] These tips 33 are useful as emitters in flat panel displays
of the field emission type. The mask 32 is then stripped and the
display fabricated. Alternatively, the mask 32 is left on the
substrate 35, and functions as dielectric insulating layer 14.
[0037] FIGS. 4A-4C illustrate another embodiment of the process of
the present invention. FIG. 4A illustrates substrate 45 which has a
"blanket" dopant layer 40. "Blanket" doping referring to the doping
of substantially the entire surface of the substrate 45. As in the
previous embodiment, the substrate 45 comprises silicon, and can be
amorphous silicon, polycrystalline silicon, micro-grain silicon,
and macro-grain silicon, or any other suitable silicon-containing
substrate. The preferred dopant in this embodiment is also boron,
and therefore the doped layer is P+.
[0038] FIG. 4B illustrates the substrate 45 after it has undergone
an anodization step, in which the dopant layer 40 becomes porous.
The anodization take places in a chamber 23 of the type illustrated
in FIG. 2. Since substantially the whole surface of the substrate
45 is doped and unmasked, substantially the whole dopant layer 40
is anodized.
[0039] As shown in FIG. 4C, subsequent to the anodization step,
substrate 45 is patterned with a mask 46. The mask 46 preferably
comprises a photoresist or an oxide. The substrate 45 is then
exposed to electromagnetic radiation (e.g., ultra-violet light) at
or about room temperature for approximately 5 to 10 minutes. These
parameters will vary with the intensity of the light selected.
[0040] Alternatively, the substrate 45 is simply exposed to
patterned electromagnetic radiation, e.g., light that is shined
through a photolithographic mask. This process is analogous to the
process for exposing photoresist with a stepper. The preferred
wavelength of light is in the ultraviolet spectrum.
[0041] The areas exposed to light are oxidized in air (actually, by
the oxygen in the atmosphere). The oxidized areas can be used for
isolation, or the oxide can be removed by rinsing in a hydrogen
halide, such as hydrofluoric acid. The tips 43 are useful as field
emitters of the type discussed in FIG. 1.
[0042] FIGS. 5A-5D illustrate low temperature oxidation sharpening
of emitter tips using the process of the present invention. FIG. 5A
illustrates a tip 53 on a substrate 51 made by any of the methods
know in the art, and most commonly comprises silicon. The radius of
curvature of the apex of the tip 53 is somewhat rounded.
[0043] FIG. 5B shows the tip 53 on the substrate 51 after the tip
53 has been anodized, according to the process of the present
invention. The tip 53 is placed in an anodization chamber of the
type shown in FIG. 2. A porous layer 54 forms on the tip 53 as a
result of the anodization, as shown in FIG. 5B.
[0044] The tip 53 is then exposed to radiant energy, preferably
light, in the ultraviolet spectrum. The tip 53 is exposed to the
ultra-violet light at room temperature (e.g., approximately
22.degree. C.-100.degree. C.) in air. The oxygen in the atmosphere
oxidizes the porous silicon 54 on the tip 53, when the tip 53 is
irradiated, thereby forming oxide layer 55, as illustrated in FIG.
5C.
[0045] The oxide layer 55 is then stripped, preferably in a
hydrogen halide. Hydrofluoric acid (HF) is the preferred hydrogen
halide. When the oxide layer 55 is removed, the tip 53 on the
substrate 51 is noticeably sharper, as shown in FIG. 5D.
[0046] There are several advantages to the process of the present
invention. One of the most important is that the process takes
place at or about room temperature. The anodization process of the
present invention results in a very high surface area that is
easily oxidized. Most oxidation processes of semiconductor
substrates are done in a steam ambient requiring high temperatures.
The porous silicon is oxidized by ultra-violet light at low
temperatures, i.e., 20.degree. C.-100.degree. C.
[0047] All of the U.S. Patents cited herein are hereby incorporated
by reference herein as if set forth in their entirety.
[0048] While the particular process, as herein shown and disclosed
in detail, is fully capable of obtaining the objects and advantages
herein before stated, it is to be understood that it is merely
illustrative of the presently preferred embodiments of the
invention, and that no limitations are intended to the details of
construction or design herein shown other than as described in the
appended claims. For example, one having ordinary skill in the art
will realize that the parameters can vary.
* * * * *