U.S. patent application number 09/810900 was filed with the patent office on 2001-08-30 for combination photonic time and wavelength division multiplexing method.
Invention is credited to Hait, John N..
Application Number | 20010017721 09/810900 |
Document ID | / |
Family ID | 22123190 |
Filed Date | 2001-08-30 |
United States Patent
Application |
20010017721 |
Kind Code |
A1 |
Hait, John N. |
August 30, 2001 |
Combination photonic time and wavelength division multiplexing
method
Abstract
A method is hereby disclosed for a combination photonic time and
wavelength division multiplexing method. Parallel digital inputs of
quantity "n" are input into "n" modulator loaders for loading into
"n" photonic modulators, each having a setup time required to
provide a stable modulation state. Subsequently, a photonic pulse
of a specified frequency reads the modulation state of each of the
"n" photonic modulators. The "n" modulation states may then be
processed by "n" delay mechanisms to time the modulation states
into a serial multiplexed output comprising a series of
synchronizing pulses and data digits. Several parallel digital to
serial multiplexers, operating at distinct frequencies, may be used
in parallel or in series to comprise a wavelength division
multiplexer in accordance with the invention. The present invention
also provides an apparatus for interfacing slower electronic
components with the higher speed photonic (optical) components by
increasing "n," the number of parallel digital inputs, therefore
maximizing the potential capacity of optical transmission.
Moreover, the present invention discloses an apparatus to increase
the multiplexer efficiency by beginning to load the next set of
data into the photonic modulators shortly after previous set has
been read and while the previous data set is being delayed and
multiplexed into the serial output.
Inventors: |
Hait, John N.; (San Diego,
CA) |
Correspondence
Address: |
PATE PIERCE & BAIRD
BANK ONE TOWER, SUITE 900
50 WEST BROADWAY
SALT LAKE CITY
UT
84101
US
|
Family ID: |
22123190 |
Appl. No.: |
09/810900 |
Filed: |
March 16, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
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09810900 |
Mar 16, 2001 |
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09075046 |
May 8, 1998 |
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6256124 |
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Current U.S.
Class: |
398/43 ; 398/74;
398/75 |
Current CPC
Class: |
H04J 14/08 20130101;
H04J 14/02 20130101 |
Class at
Publication: |
359/123 ;
359/135 |
International
Class: |
H04J 004/00; H04J
014/00; H04J 014/08 |
Claims
What is claimed and desired to be secured by United States Letters
Patent is:
1. A method for converting parallel data signals to serial photonic
signals, the method comprising: providing a pulse train of first
photonic pulses having a first wavelength and a first pulse;
providing a first data signal; providing a first modulator
characterized by a first setup time and a first data status;
loading the first data signal into the first modulator following
the first pulse and establishing the first data status using the
first data signal; and the first modulator further configured to
produce a first data pulse output in response to a selected pulse
of the photonic pulses following the first setup time.
2. The method of claim 1, further comprising: providing a second
data signal; providing a second modulator characterized by a second
setup time and a second data status; loading the second data signal
into the second modulator following the first pulse and
establishing the second data status using the second data signal;
and the second modulator further configured to produce a second
data pulse output in response to a first selected pulse of the
photonic pulses following the second setup time.
3. The method of claim 2, wherein the first and second data pulse
outputs occur at different times.
4. The method of claim 2, further comprising: delaying the first
data signal by a first delay time to produce a first delayed
signal; delaying the second data signal by a second delay time
longer than the first delay time, to produce a second delayed
signal.
5. The method of claim 4, wherein the first delay mechanism is
adjustable.
6. The method of claim 4, further comprising combining the first
and second delayed signals to provide a multiplexed output.
7. The method of claim 6, further comprising selecting the
multiplexed output from the group consisting of binary pulses and
multi-level semaphores.
8. The method of claim 6, wherein the first data signal comprises a
first datum followed by a second datum, timed such that the second
datum is being loaded into the first modulator while the first
datum is being delayed by the first delay mechanism.
9. The method of claim 6, further comprising: providing a
synchronization signal synchronized with the first photonic pulses
to provide synchronization to the multiplexed output.
10. The method of claim 9, wherein the synchronization signal
contains information for routing the multiplexed output.
11. The method of claim 10, wherein the synchronization signal is a
multi-level semaphore.
12. The method of claim 11, wherein the multiplexed output contains
information produced using modulation techniques selected from the
group consisting of amplitude, phase, spatial, and polarization
modulation.
13. The method of claim 12, wherein the modulation techniques are
used to facilitate the separation of the synchronization signal
from the first delayed signal.
14. The method of claim 1, further comprising selecting the first
data signal from the group consisting of a photonic signal and an
electronic signal.
15. The method of claim 1, further comprising: providing a pulse
train of second photonic pulses having a second wavelength and a
second pulse; providing second and third data signals,
respectively; providing a second modulator characterized by a
second setup time and a second data status; providing a third
modulator characterized by a third setup time and a third data
status; loading the second data signal into the second modulator
following the second pulse and establishing the second data status
using the second data signal; loading the third data signal into
the third modulator following the second pulse and establishing the
third data status using the third data signal; the second modulator
further configured to produce a second data pulse output in
response to a second selected pulse of the second photonic pulses
following the second setup time. the third modulator further
configured to produce a third data pulse output in response to a
third selected pulse of the second photonic pulses following the
third setup time.
16. The method of claim 15, wherein the first modulator further
comprises a frequency multiplexed logic device.
17. The method of claim 15, further comprising: delaying the first
data signal by a first delay time to produce a first delayed
signal; delaying the second data signal by a second delay time to
produce a second delayed signal; delaying the third data signal by
a third delay time longer than the second delay time, to produce a
third delayed signal.
18. The method of claim 17, further comprising combining the first,
second, and third delayed signals to provide a combination time and
wave-division multiplexed output.
19. The method of claim 18, wherein the combination time and
wave-division multiplexed output is launched into an optical fiber
having a maximum capacity.
20. The method of claim 19, wherein the combination time and
wave-division multiplexed output fills the optical fiber to its
maximum capacity.
21. The method of claim 18, further comprising: providing a
synchronization signal synchronized with the first photonic pulses
to provide synchronization to the combination time and
wave-division multiplexed output.
22. The method of claim 21, wherein the synchronization signal is a
multi-level semaphore.
23. The method of claim 21, wherein the synchronization signal
contains information for routing the combination time and
wave-division multiplexed output.
24. The method of claim 1, wherein the modulators are photonically
controlled.
Description
BACKGROUND
[0001] 1. Related Applications
[0002] This application is a continuation of a co-pending patent
application, Ser. No. 09/075,046, filed on May 8, 1998 and directed
to a Combination Photonic Time and Wavelength Division
Multiplexer.
[0003] 2. The Field of the Invention
[0004] This invention relates to data multiplexing and, more
particularly, to novel systems and methods for time and wavelength
division multiplexing of binary and non-binary digital information
for photonic transmission and information storage systems.
[0005] 3. The Background Art
[0006] U.S. Pat. No. 5,623,366 to Hait (hereinafter "Hait"),
describes a photonic method of parallel to serial conversion. What
Hait does not teach is the apparatus and method of providing the
proper pulse timing needed in FIG. 24A of Hait, when the parallel
information input provides pulses that arrive in parallel at
substantially the same time.
[0007] Hait also does not teach how to use a single pulsed laser
system (or other single-pulsed photonic input system) to provide
all the required sequential output pulses, including
synchronization pulses, needed to provide a complete serial
transmission system.
[0008] Nor does Hait teach how to interface electronic with
photonic components to provide serial photonic transmission capable
of operating at a rate faster than the rate at which electronic
components provide parallel digital data input.
[0009] In the initial stages of the development of electronic
integrated circuit technology, attempts were made at "pulse
racing." That is, attempts were made to time the delay of signals
traveling through a computer chip so that a number of signals would
arrive at a specific location having a specific timing relationship
determined by the various delays applied to each signal. It was
found that many of the electronic variables involved, such as
capacitance and inductance, made pulse racing impractical and
unreliable as chip frequencies increased.
[0010] Electromagnetic energy, on the other hand, is not affected
by the level of capacitance and inductance complexities found in
computer chips. The amount of delay that occurs along a photonic
delay path may be determined quite accurately even into the
sub-picosecond range. The present invention takes advantage of
these characteristics of electromagnetic energy and the materials
used therewith to provide a complete time-division multiplexing
system.
BRIEF SUMMARY AND OBJECTS OF THE INVENTION
[0011] The present invention, a delayed pulse photonic
time-division multiplexer, is an apparatus and method of providing
parallel digital data to serial data conversion having a photonic
serial digital output that may be used with both binary and
non-binary transmissions. A series of pulses of photonic energy are
input to provide an electromagnetic energy and pulse timing source,
which is divided into portions. A portion of the energy of these
pulses is directed into the output to provide sync
(synchronization) pulses that a photonic receiver uses to time the
recovery of serial information and convert it into parallel
information. "In serial" as used hereinafter refers to data in
serial format (i.e., in series).
[0012] A portion of the energy of the input pulses is also directed
into "n" photonic modulators, the integer "n" being the number of
data digits that are to be transmitted in serial within a single
data set between sync pulses. For example, if n=8 and the digits
are binary, then a byte of serial information would be sent. If
n=32, then a 32-bit word is sent. The actual number of digits sent
is a matter of engineering choice. The engineer may take into
account the need for signal amplification within the receiver
and/or the transmitter. He may also need to take into account the
accumulation of delay error that may occur using certain types of
delay mechanisms.
[0013] The "n" photonic modulators are first set to their data
modulation states, then allowed to complete their setup times, and
finally held in those states while a photonic pulse is directed to
each one. In the case of binary amplitude modulation, the pulses
either are transmitted through each modulator or are inhibited.
However, the present invention is not limited to binary
transmission only, but may use multistate semaphore digits that use
more than two modulation states during each digit time. Thus, the
word "digital" in this disclosure may refer to either a binary
semaphore or one having more than two modulation states.
[0014] Associated with the group of "n" photonic modulators is a
group of "n" serial timing delay mechanisms. Each modulator has one
of these delay mechanisms in series with it so that the photonic
pulse reads the condition of the modulator and is delayed
sufficiently and directed into the common output so that the
resulting modulated digit arrives at the output at its assigned
digit time. Therefore, all the "n" modulated and delayed pulses
arrive at the output in serial following a sync pulse and prior to
the subsequent sync pulse. This produces a complete data set having
"n" digit positions filled with the "n" delayed digital pulses.
[0015] Each serial timing delay mechanism may be placed either
before or after its modulator; however, the timing provided by all
the delay mechanisms throughout the present invention must be
adjusted so as to time the serial digits properly.
[0016] Photonic modulators have a setup time. That is, it takes a
certain amount of time for the modulators to stabilize in response
to their controlling electronic inputs. After this setup time has
elapsed, the modulators remain stable during the next photonic
pulse, which reads the information loaded into the modulators by
the electronic inputs.
[0017] Parallel information is provided through "n" digital
information inputs. Each modulator has associated with it one of
"n" modulator loaders which load digital information from one of
the "n" digital information inputs into its modulator. When
triggered, the "n" modulator loaders load the "n" photonic
modulators with modulation states from the "n" digital information
inputs. To initiate modulator loading and begin the setup time for
the next data set, the input pulses are directed into the group of
"n" modulator loaders.
[0018] The present invention is very versatile, since it may be
engineered to match a variety of photonic modulators, parallel
inputs, optical transmission lines, and demultiplexers. One reason
the present invention is superior is that modulators that require a
long setup time may be loaded for the next data set while the
previous data set is being transmitted. Accordingly, the invention
uses time efficiently. As a result, the present invention may be
engineered to accommodate slow modulators by increasing the number
of digit times and the number of parallel information inputs (that
is, by increasing n) without wasting valuable transmission time and
effective bandwidth.
[0019] When photonic parallel inputs are provided along with
photonic modulators and loaders, the setup times may be
comparatively short. However, the present invention also has the
advantage of being able to interface very slow electronics with
high-speed photonics. In that case, the modulator loaders may be
electronic circuits that control optoelectronic modulators
triggered by the photonic pulses using a photo diode. Thus, the
complete apparatus for triggering and loading the modulators may
involve the use of prior art optoelectronic, electronic, and/or
photonic circuitry.
[0020] The loading circuits load information from the digital
information inputs into the modulators and hold that information
there until the following trigger pulse occurs. The following
trigger pulse occurs after the setup time and the photonic read
pulse for that data set.
[0021] The pulses that trigger modulator loading may require a
delay mechanism to prevent a state change within the modulators
during the time that photonic pulses are traveling through the
modulators. This depends upon the choice of circuitry. This loading
delay mechanism may be placed between the input pulse source and
the modulators. Individual loading delay mechanisms may be inserted
as needed to produce proper output timing before any or all of the
"n" photonic modulators.
[0022] A sync timing delay mechanism may also be inserted between
the input pulse source and the output so that sync pulses will be
properly timed in the output. All of these various delay mechanisms
may be engineered or made adjustable in order to accommodate a
great variety of hardware components and transmission
protocols.
[0023] It should be noted that, in the arrangement having the "n"
photonic modulators placed before the "n" serial timing delay
mechanisms, the first transmitted data set is not yet set up and
loaded into the modulators from the parallel digital information
input until the first pulse has read the "n" photonic modulators
and/or the sync pulse is not delayed by a full data set time. The
result is that the first data set following the first sync pulse
may be a null data set or may contain spurious or preset
information, depending on the circuitry that controls the
modulators. Some types of receivers require a specific data set for
initialization or calibration. This is one way of providing the
beginning data set.
[0024] The first photonic input pulse triggers the loading of the
first data set from the parallel digital information input, which
will be transmitted following the second photonic sync pulse. Each
modulator is loaded while the previous data set is being
transmitted. Following this initialization, sync pulses are
interspersed with data set pulses.
[0025] Wavelength division multiplexing (which may also be referred
to as frequency multiplexing) may be accomplished by the present
invention in two different ways. If the parallel input information
is already wavelength division multiplexed, the present invention
may be constructed using frequency multiplexed logic components and
by providing frequency matched input pulses. Such components are
described in U.S. Pat. No. 5,617,249.
[0026] Wavelength division multiplexing may also be accomplished
through the combination of multiple multiplexers of the present
invention routed into a common output. If the pulses of the
separate wavelengths used are in sync, only one sync pulse need be
sent on one of the wavelengths. However, if the pulses of the
separate wavelengths used are not in sync, or if the demultiplexer
to be used is not capable of providing synchronization among
multiple photonic channels, a sync pulse may be provided for each
wavelength channel using the same method as that by which the sync
pulses are provided in a single wavelength embodiment. Since each
data set-sync pulse data frame may be transmitted asynchronously,
the problems associated with wavelength dispersion among the
wavelength channels may be minimized.
[0027] Because the minimum number for "n" is two, the present
invention may be described in terms of first and second components.
Therefore, the present invention is a method of parallel digital
data to photonic serial conversion using delayed-pulse timing that
may comprise the elements and methods as described in the following
paragraphs.
[0028] In certain embodiments, an apparatus in accordance with the
invention may comprise a first photonic pulse input having a first
wavelength, at least first and second digital inputs that
constitute a first parallel digital input, a first multiplexer
output, at least first and second photonic modulators, and at least
first and second modulator loaders for loading the first modulation
states into the first and second photonic modulators using
information from the first parallel digital input.
[0029] The first and second digital inputs are input to the first
and second modulator loaders, respectively. Subsequently the
modulation states from the first and second modulator loaders are
transmitted to the first and second modulators where they are
converted to photonic digital pulses for output to the first
multiplexer output.
[0030] Similarly, input pulses from the first photonic pulse are
input to the first and second modulator loaders to initiate
modulator loading to the multiplexer output to provide sync pulses,
and to the first and second photonic modulators to read the first
modulation states loaded into the first and second photonic
modulators to provide first photonic digital pulses of the first
wavelength. Moreover, a presently the preferred embodiment may
include a delay mechanism as necessary to time the arrival of the
first photonic digital output pulses at the multiplexer output in
serial between the sync pulses.
[0031] The capability of the present invention to load information
from one data set while simultaneously transmitting another data
set enables the present invention to transmit sequential data
frames without introducing undesirable delays between frames. This
is accomplished because the delay mechanisms are arranged to
provide the photonic digital pulses at the multiplexer output from
a first data set input to the first parallel data input while the
photonic modulators are being loaded with a second data set from
the first parallel digital input.
[0032] A combined wavelength division and time-division
multiplexing method of the present invention may be produced by
providing multiple multiplexers, as described above, having
different photonic wavelength inputs, and combining the
time-division multiplexed outputs from all wavelengths into a
common output.
[0033] The method may be implemented by providing a second photonic
pulse input having a second wavelength, at least third and fourth
digital inputs that constitute a second parallel digital input, a
second multiplexer output, at least third and fourth photonic
modulators, and at least third and fourth modulator loaders for
loading the second modulation states into the third and fourth
photonic modulators using information from the second parallel
digital input.
[0034] The third and fourth digital inputs are input to the third
and fourth modulator loaders, respectively. Subsequently the
modulation states from the third and fourth modulator loaders are
transmitted to the third and fourth modulators where they are
converted to photonic digital pulses for output to the second
multiplexer output.
[0035] Similarly, input pulses from the second photonic pulse are
input to the third and fourth modulator loaders to initiate
modulator loading to the multiplexer output to provide sync pulses,
and to the third and fourth photonic modulators to read the second
modulation states loaded into the third and fourth photonic
modulators to provide second photonic digital pulses of the second
wavelength.
[0036] Moreover, one presently preferred embodiment may include a
delay mechanism as necessary to time the arrival of the second
photonic digital output pulses at the multiplexer output in serial
between the sync pulses.
[0037] Thus, a method of wave division multiplexed time-division
multiplexing is made possible by the present invention by combining
the first and second multiplexer outputs into a single output.
[0038] Photonic modulators may be loaded and controlled in a
variety of different ways. The most common way is electronic.
However, several additional ways exist, including without
limitation mechanical, electromechanical, acoustical, and the like.
All of the foregoing ways have one thing in common: their top
switching speeds are much slower than the short pulse times that
may be achieved with electromagnetic energy, including without
limitation laser light. Even these slow modulator setup times may
be accommodated by the present invention.
[0039] For example, if the single digit times (as determined by the
length of the input pulses) are one femtosecond long and an
optoelectronic setup time is one nanosecond, one million serial
digits may be placed between sync pulses. Transmission parameters
may be engineered to account for the properties of whatever
components are available. One of the advantages of the present
invention over other devices is that photonic delay mechanisms,
including free-flight path differences and/or optical fibers, may
be precisely manufactured to provide the precise timing needed to
ensure the reliability of a million digits following a single sync
pulse. Prior art methods are not sufficiently reliable to make such
a transmission protocol practical.
[0040] Another class of photonic modulators are photonically
controlled. With such photonically controlled modulators,
high-speed parallel photonic inputs may provide very short setup
times. Thus, sync pulse repetition rates, and data transmission
rates may be selected to suit the photonic components being used.
Such photonic components may include photonic transistors,
self-exciting electro-optical devices (SEEDS), and nonlinear
optical materials.
[0041] The use of photonically-controlled photonic modulators also
allows for the construction of more complex multiplexers having
multiple parallel inputs and various organizations of delay times
as needed to match the various parallel digital data sources and
transmission protocols to be used.
[0042] Certain photonic modulators, such as the photonic
transistors of U.S. Pat. No. 5,617,249, may provide frequency
multiplexed logic, which may be used to frequency 20 multiplex and
time-division multiplex information simultaneously using the
present invention. Each of the multiplexing frequencies must be
provided at the photonic input to provide a series of pulses for
each frequency channel. However, with suitable circuitry, sync
pulses need only be sent on one of the channels. The result is a
combination of wave division and time-division multiplexing.
[0043] The present invention may be designed to work with
amplitude, phase, spatial and polarization modulation techniques,
as needed for a particular circumstance. Different forms of
modulation may be used to make the separation of sync pulses from
data pulses easier at the receiver and to provide multiple states
for the transmission of semaphore digits having more than two
modulation states. The photonic modulators, support circuitry and
delay mechanisms are selected to provide the needed modulation
combinations. Sync pulses may even be modulated as multilevel
semaphores that may be used for data set routing or other purposes
at the receiver. Thus the terms "digit" and "digital," as used
herein include multilevel as well as binary digits.
[0044] The serial output may be used for direct photonic
transmission through free space, waveguides, or optical fibers. The
output may also be directed along a delay path such as a free-space
path or an optical fiber to provide a method of photonic
information storage. The output may also be written onto or into
various information storage media including holograms, photographs,
CD-ROMS, photo-sensitive materials, and the like.
[0045] Even though this disclosure uses optical terminology, the
present invention may be used with photonic energy anywhere within
the electromagnetic spectrum through the selection of appropriate
components to match the frequencies being used. Most notable is the
microwave region, where the present invention may be used to
multiplex information sent via satellite or other microwave links.
The recent commercialization of x-ray technology, including x-ray
capillaries (like optical fiber for x-rays), may be used to provide
multiplexing in the x-ray bands.
[0046] The use of spatial modulation is not common. While spatial
modulation is more complex than the more usual methods, the present
invention may use this method of transmission. Spatial modulation
is particularly useful when serialization is required inside a
photonic computer or mass information storage device. Appropriate
components may be used as with the other modulation methods.
[0047] An object of the present invention is to provide an
apparatus and method of converting parallel digital information
input to photonic serial information.
[0048] Another object of the present invention is to provide an
apparatus and method for high-speed parallel photonic sampling of
preset modulation states loaded into slow modulators followed by
transmission of the sampled information in serial during the
modulator setup time for the following data frame, thus providing
an apparatus and method of maximizing photonic throughput by using
the shortest transmissible photonic pulses, while using slow
modulators (even electro-photonic modulators) having response times
longer than the photonic sampling pulses.
[0049] Another object of the present invention is to provide an
apparatus and method for optimizing data frame repetition rates by
matching them to the modulator setup times combined with multilevel
semaphores. This may be done to maximize overall transmission rates
for each carrier wavelength and then adding separate carrier
wavelengths until a selected transmission medium, be it an optical
fiber or a free-space beam, has been saturated to its maximum
physical information-carrying capacity.
[0050] Another object of the present invention is to provide an
apparatus and method for photonically transmitting electronic
information using the fastest available electronic and photonic
components.
[0051] Another object of the present invention is to provide an
apparatus and method for transmitting serial information using
digital semaphores having more than two modulation states.
[0052] Another object of the present invention is to provide an
apparatus and method for transmitting serial information using a
variety of photonic modulation mechanisms and methods.
[0053] Another object of the present invention is to provide an
apparatus and method for transmitting serial information into an
optical fiber for the purpose of retrieving the information at a
future time.
[0054] Another object of the present invention is to provide an
apparatus and method for transmitting serial information to a
satellite reflector or transponder, as the present invention may be
designed to use photonic energy in the microwave as well as the
optical portions of the electromagnetic spectrum.
[0055] Another object of the present invention is to provide an
apparatus and method for transmitting serial information using the
various parts of the electromagnetic spectrum including optical
(both visible and invisible,) microwave, and radio frequencies.
[0056] Another object of the present invention is to provide an
apparatus and method for transmitting simultaneous serial
(time-division) and wavelength division (frequency multiplexed)
information.
[0057] The foregoing objects and benefits of the present invention
will become clearer through an examination of the drawings,
description of the drawings, description of the preferred
embodiment, and claims that follow.
BRIEF DESCRIPTION OF THE DRAWINGS
[0058] The foregoing and other objects and features of the present
invention will become more fully apparent from the following
description and appended claims, taken in conjunction with the
accompanying drawings. Understanding that these drawings depict
only typical embodiments of the invention and are, therefore, not
to be considered limiting of its scope, the invention will be
described with additional specificity and detail through use of the
accompanying drawings in which:
[0059] FIG. 1 is a schematic block diagram of a parallel digital
data to photonic serial data converter that constitutes the
multiplexer of the present invention;
[0060] FIG. 2 is a pulse timing diagram illustrating the
relationship between photonic pulses and modulator setup times;
and
[0061] FIG. 3 is a pulse diagram showing multistate digit time
pulses.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0062] It will be readily understood that the components of the
present invention, as generally described and illustrated in the
Figures herein, could be arranged and designed in a wide variety of
different configurations. Thus, the following more detailed
description of the embodiments of the system and method of the
present invention, as represented in FIGS. 1 through 3, is not
intended to limit the scope of the invention, as claimed, but it is
merely representative of the presently preferred embodiments of the
invention.
[0063] The presently preferred embodiments of the invention will be
best understood by reference to the drawings, wherein like parts
are designated by like numerals throughout.
[0064] Those of ordinary skill in the art will, of course,
appreciate that various modifications to the details illustrated in
the schematic diagrams of FIGS. 1-3 may easily be made without
departing from the essential characteristics of the invention.
Thus, the following description is intended only as an example, and
simply illustrates one presently preferred embodiment consistent
with the invention as claimed herein.
[0065] FIG. 1 is a block diagram of a delayed-pulse photonic
time-division multiplexer which is a parallel digital information
to photonic serial information converter of the present invention.
Three dots between components indicate identical components for
information flow lines up through n-1.
[0066] FIG. 2 is a pulse timing diagram that shows how delay times
may be organized for the various required pulses and how they
relate to each other. Three dots within data sets on time line 35
depict identical digit times up through n-1.
[0067] The present disclosure is easily understood by examining
FIGS. 1 and 2 together. Reference characters 1 through 17 are used
in FIG. 1 and reference characters 30 through 47 are used in FIG.
2.
[0068] Referring to FIGS. 1 and 2, in the depicted embodiment, a
series of photonic pulses (optical, microwave, or RF) are provided
by photonic source 1 routed into multiplexer input 2 as shown by
time line 30. The input pulses 38a, 45a, and 40a are directed
through sync delay mechanism 3 to provide sync pulses 38b, 45b, and
40b at photonic output 17, as shown in time line 35.
[0069] Certain types of time-division demultiplexers require
specialized sync waveforms, such as shortened pulses, or
specialized modulation characteristics. These may be provided by
insertion either with a sync delay mechanism in line 3 or between
photonic source 1 and the other components or both for use in
demultiplexing. Electronic digital information may be input to
photonic modulators 4, 5, 6 through 7 by parallel digital
information input 19.
[0070] Input pulses from multiplexer input 2 as shown on time line
30 are also supplied to a group of "n" photonic modulators to
sample their previously loaded and held modulation states. Four of
the "n" photonic modulators are shown: photonic modulators 4, 5, 6,
and the nth photonic modulator 7. The output of each photonic
modulator is directed into its own serial timing delay mechanism.
Serial timing delay mechanisms depicted are serial timing delay
mechanisms 12, 13, 14 and the n.sup.th one 15.
[0071] The integer "n" may be any integer in which at least one
modulator and at least one serial timing delay mechanism are
provided for each digit time in output 17, as shown on time line
35, just as with those modulator and serial delay mechanism
combinations depicted. Examples of output digit times include the
first digit pulse 46 and the n.sup.th digit pulse 47 in example
data set 44.
[0072] The output from the group of "n" photonic modulators 4, 5, 6
through 7 and the group of "n" serial delay mechanisms 12, 13, 14
through 15 is "n" delayed digital pulses that are timed to arrive
at output 17 in serial. For example, the basic transmission
sequence for a single data frame may begin with a modulator loading
sequence initiated by a timed photonic pulse from photonic source 1
routed to modulator loaders 8, 9, 10 through 11. In turn, photonic
modulators 4, 5, 6, through 7 are loaded during their setup times
by modulator loaders 8, 9, 10 through 11, with data from parallel
digital information input 19. The loaded modulation states are then
held for a period of time to allow photonic sampling of the loaded
modulation states.
[0073] Photonic pulses from photonic source 1 are then routed
through photonic modulators 4, 5, 6, through 7 to sample their
modulation states. The modulated photonic pulses are then routed
and delayed by delay mechanisms 12, 13, 14 through 15 along with a
sync pulse to arrive at output 17 in serial. While the photonic
pulses are being routed through the delay mechanisms 12, 13, 14
through 15 into the serial output 17, the modulators 4, 5, 6
through 7 are once again prepared by modulator loaders 8, 9, 10
through 11 for data sampling for the next frame.
[0074] The transmission sequence may be started anywhere in the
sequence; however, the information transmitted during the first
frame may depend upon several other factors. For example, because
photonic modulators that provide more than two stable modulation
states may also be used, non-binary semaphores (digits) may be used
in the present invention. When only two states are used, the digit
times are the same as "bit times," as commonly used in the
electronic serial communications art. Digit times shown in FIG. 2
having both top and bottom lines (for example, as in time line 31)
indicate that the actual modulation states depend upon the
modulation states of the respective modulators.
[0075] While FIG. 2 depicts common amplitude modulation form, the
actual form of modulation used may be amplitude, phase, spatial, or
polarization, or any combination of these. The present invention
provides time-division multiplexing by means of pulse delays
regardless of the modulation method or methods used for the pulses.
Certain modulation combinations may require the use of multiple
modulators and/or multiple delay mechanisms for each digit time as
the engineering of these components requires. Delay mechanisms may
include free-space distances, materials having an index of
refraction greater than one, waveguides, optical fibers, one-shot
multivibrators, and other more complex circuitry.
[0076] One advantage of using delaying materials such as glass,
optical fibers, and the like is that these may be machined very
precisely to maintain digit times within tolerance, while allowing
or compensating for temperature and other fluctuations within the
materials being used. Changes that do occur may be accurately
measured, and such compensating information may be sent to the
demultiplexer in order to compensate at the receiving end.
[0077] Each of the serial timing delay mechanisms 12, 13, 14
through 15 provides a different delay time so that the "n" delayed
digital photonic pulses shown on time lines 31, 32, 33 through 34
are combined with the sync pulses at location 16 and arrive at
output 17, as 20 shown on time line 35 as data sets 39, 41, and 44
in serial in between sync pulses. As an example, the delay
mechanisms may comprise optical fibers, the outputs of which are
all directed through a lens and into another optical fiber that
comprises output 17.
[0078] The time spaces shown on either side of the sync pulses,
such as sync pulse 45b between data set times 41 and 44, are
optional and may be used if needed by a particular
demultiplexer.
[0079] Each of the "n" photonic modulators has a required setup
time that elapses before the modulating information in the
modulators is sufficiently stable to be read by sending a photonic
pulse into the modulators. This characteristic, which has often
been viewed as a detriment in prior systems, is considered useful
in the present invention. The summation of digit times that make up
a data set, for instance times 39 or 44, may be designed to be at
least as long as one of the photonic modulator's setup times shown
on time line 37. All modulator setup times depicted on time line 37
are substantially the same as, for example, set up time 42.
[0080] If the modulators chosen are very slow in comparison with
the photonics, more digit times may be added to each data set by
adding more parallel inputs in parallel digital information input
19 along with corresponding modulator loader, photonic modulator,
serial timing delay mechanisms, and interconnections. These
additions increase the size of "n" until the functional limit of
the photonics is reached.
[0081] As an example, if femtosecond pulses, as are commonly
produced in the laser art, are used as the photonic source 1 and
photonic modulators 4, 5, 6, through 7 having a 2 gHz (0.5 ns)
response are used, the parallel digital information input 19 may be
expanded to include one half-million parallel lines without the use
of non-binary digits (semaphores). When non-binary digits are used
during each digit time, the information throughput may be greatly
multiplied. As a result, the present invention may be capable of
transmitting 1,000 terabits per second and beyond using presently
available components, while interfacing inherently slow electronics
to high-speed photonics.
[0082] The length of setup time 42 of photonic modulators 4, 5, 6,
through 7 (which depends upon the type of modulators used) and the
pulse width of the input pulses such as pulse 40a will determine
the maximum pulse repetition rate for the input and sync pulses as
shown on time lines 30 and 35, which in turn will determine the
number "n"; that is, the number of digit times such as digit time
47 available between sync pulses.
[0083] To initiate modulator loading and the setup times as shown
on time line 37, input pulses from the series of pulses of photonic
energy input at multiplexer input 2 as shown by 110 time line 30
are also directed through delay mechanism 18 as shown on time line
36 and into "n" modulator loaders 8, 9, 10 through the n.sub.th one
here designated 11. When electronic components are used, these load
triggering pulses are directed into a photo diode, which starts an
electronic modulator loading circuit as discussed in the
summary.
[0084] Each pulse exiting load delay mechanism 18 triggers loading
of the "n" modulators with new information from parallel digital
information input 19, starting the modulator setup time, as for
example time 42 as shown on time line 37. Pulse setup times as
shown on time line 37 may actually be timed events within the "n"
modulator loaders 8, 9, 10 through 11 rather than an actual
detectable signal having the wave form like that of modulator setup
time 42 on time line 37. In view of the foregoing, the present
invention is as compatible with optoelectronic modulators and
electronic modulator loaders as with photonic, mechanical, acoustic
and other modulating and modulator loading. As a result, the
present invention may provide photonic serial information at a
speed that is considerably faster than that of conventional single
electronic modulator methods. This advantage is provided by the use
of modulator loading times that occur during the transmission of
the previously loaded and sampled data set. The present invention
transmits asynchronously, with each sync pulse acting as a start
pulse for the data set which follows.
[0085] Input pulses 38a, 40a, and 45a, shown on time line 30, are
directed into the "n" photonic modulators 4, 5, 6, through 7 to
read them. This read time may be at any time that is not
simultaneous with a setup time such as 42 shown on time line 37.
For example, they may be read during time 43, which is between
setup times on time line 37.
[0086] Of particular interest is the relationship between the setup
times and the first sync pulse in the embodiment shown. The first
input pulse 38a reads the modulation state of photonic modulators
4, 5, 6, through 7. At that time, the modulators may contain
unknown data or may be off or preset since no setup time has yet
occurred. This is because modulator read pulses occur before the
setup time begins for loading the next data set. Thus, the first
data set 41 may be null or may contain unknown or preset data. A
null or preset modulation pattern may be used by certain
demultiplexers for determining the source of the information that
follows, for calibration, or to provide other system information to
the demultiplexer.
[0087] The first parallel digital data set is loaded following
pulse 38a, which is delayed by load delay mechanism 18, which in
turn triggers the start of setup time 42. This occurs during the
time that the first (possibly null) data set 41 is being
transmitted. The photonic modulators are set up and stable at the
completion of setup time 42 so that they may be read by the second
input pulse 45a.
[0088] The modulator outputs are delayed, each one by an amount
that differs by at least one digit time (such as 46 and 47), to
their individual digit time slots as in time lines 31, 32, 33
through 34 and are combined into output 17 as a complete data set
44, shown in time line 35. The process then continues in the same
cyclic manner for the following trigger, setup, read, delay and
transmit sequences.
[0089] The first data set 41 may be eliminated by changing the
timing delays of the various delay mechanisms used throughout the
invention. In particular, sync delay mechanism 3 may be used to
delay the sync pulses so that the first pulse arrives one data
frame later; that is, the first sync pulse 38b would then arrive at
45b. Certain types of delay, modulation, modulator loading, beam
combining, and output mechanisms require the use of amplifiers and
pulse shapers that may be inserted, as needed within the present
invention.
[0090] It should be noted that other embodiments of the present
invention may place delay mechanisms before the photonic modulators
and/or sync output while providing other delays before or within
the modulator loaders. However, the disclosed embodiment is simple
and compatible with electronic parallel digital information input
mechanisms.
[0091] FIG. 3 shows a non-binary semaphore quadnary digit having
four different amplitude modulated levels 50, 51, 52 through 53,
one level of which is transmitted during a digit time (such as
digit time 47 of FIG. 2) to indicate one of four digits. The
parallel digital information input 19 may be multi-level, or binary
to multi-level encoding may be accomplished within the modulator
loaders 8, 9, 10 through 11.
[0092] There are many combinations of non-binary transmission
methods that may be used with the "n" photonic modulators. Another
example is as shown by waveforms 54, 55, and 56 of FIG. 3, which is
ternary. These waveforms indicate the use of a combination of phase
and amplitude modulation. The photonic carrier wave 54 is 180
degrees out of phase with carrier wave 56 (as indicated by its
position below the zero axis line). On the other hand, carrier wave
55 is amplitude-modulated low; this modulation combination is
particularly useful when interference-based photonic components
such as those taught in U.S. Pat. No. 5,093,802 are being used at
the receiving demultiplexer.
[0093] If each of the photonic modulators is loaded with non-binary
modulation state combinations, considerably more information may be
transmitted during each digit time than if binary modulation is
used. Any combination of stable modulation states using any
combination of modulation methods may be used. The present
invention is ideally suited for such modulation techniques because
the method provides ample time for loading the modulators, even
modulators that are comparatively slow. Multiple modulators may be
used for each digit time slot so that the phase, amplitude,
polarization, and spatial modulation techniques may be mixed and
matched, as the transmitting medium and demultiplexers require.
Also, the types of delay mechanisms available are compatible with a
variety of modulation methods.
[0094] The present invention may be used to provide serial photonic
information for a variety of tasks. The present invention may be
used for fiber optic transmission, satellite and terrestrial
microwave links, and for writing to optical devices such as
CD-ROMs, holographic storage devices, and fiber optic circulating
data storage devices.
[0095] The photonic components usable in the present invention
include those having the capability of frequency multiplexing (or
wave division multiplexing) so that multiple frequency channels may
be used simultaneously during each digit time. Such a feature is
important when transmission or information storage mediums such as
optical fibers or microwave links are combined with repeater
amplifiers having a limited number of frequency channels available.
The present invention may be used with various combinations of
frequency channels, pulse repetition rates, and modulation methods
to suit the medium to be driven.
[0096] To accomplish combination wave division and time-division
multiplexing, separate carrier wavelengths are routed from photonic
source 1 to separate modulators. For example, red light would be
routed to modulators 4 and 5 and green light to modulators 6 and
7.
[0097] The present invention may be embodied in other specific
forms without departing from its structures, methods, or other
essential characteristics as broadly described herein and claimed
hereinafter. The described embodiments are to be considered in all
respects only as illustrative, and not restrictive. The scope of
the invention is, therefore, indicated by the appended claims,
rather than by the foregoing description. All changes that come
within the meaning and range of equivalency of the claims are to be
embraced within their scope.
* * * * *