U.S. patent application number 09/834435 was filed with the patent office on 2001-08-23 for method of fabricating an soi wafer and soi wafer fabricated by the method.
This patent application is currently assigned to Shin-Etsu Handotai Co., Ltd.. Invention is credited to Mitani, Kiyoshi, Yokokawa, Isao.
Application Number | 20010016401 09/834435 |
Document ID | / |
Family ID | 16560826 |
Filed Date | 2001-08-23 |
United States Patent
Application |
20010016401 |
Kind Code |
A1 |
Mitani, Kiyoshi ; et
al. |
August 23, 2001 |
Method of fabricating an SOI wafer and SOI wafer fabricated by the
method
Abstract
There is disclosed a method of fabricating an SOI wafer in which
a bond wafer to form a SOI layer and a base wafer to be a
supporting substrate are prepared; an oxide film is formed on at
least the bond wafer; hydrogen ions or rare gas ions are implanted
in the bond wafer via the oxide film in order to form a fine bubble
layer (enclosed layer) within the bond wafer; the ion-implanted
surface is brought into close contact with the surface of the base
wafer; and then heat treatment is performed to separate a thin film
from the bond wafer with using the fine bubble layer as a
delaminating plane to fabricate the SOI wafer having an SOI layer;
and wherein deviation in the thickness of the oxide film formed on
the bond wafer is controlled to be smaller than the deviation in
the ion implantation depth, and the SOI wafer fabricated thereby.
There is provided an SOI wafer which has an SOI layer having
improved thickness uniformity.
Inventors: |
Mitani, Kiyoshi; (Gunma-ken,
JP) ; Yokokawa, Isao; (Gunma-ken, JP) |
Correspondence
Address: |
HOGAN & HARTSON L.L.P.
500 S. GRAND AVENUE
SUITE 1900
LOS ANGELES
CA
90071-2611
US
|
Assignee: |
Shin-Etsu Handotai Co.,
Ltd.
|
Family ID: |
16560826 |
Appl. No.: |
09/834435 |
Filed: |
April 13, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
09834435 |
Apr 13, 2001 |
|
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|
09346576 |
Jul 1, 1999 |
|
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|
6245645 |
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Current U.S.
Class: |
438/458 ;
257/E21.567; 257/E21.568 |
Current CPC
Class: |
H01L 21/76251 20130101;
H01L 21/76254 20130101; Y10S 438/977 20130101 |
Class at
Publication: |
438/458 |
International
Class: |
H01L 021/30; H01L
021/46 |
Foreign Application Data
Date |
Code |
Application Number |
Jul 7, 1998 |
JP |
10-208711 |
Claims
What is claimed is:
1. A method of fabricating an SOI wafer in which a bond wafer to
form a SOI layer and a base wafer to be a supporting substrate are
prepared; an oxide film is formed on at least the bond wafer;
hydrogen ions or rare gas ions are implanted in the bond wafer via
the oxide film in order to form a fine bubble layer (enclosed
layer) within the bond wafer; the ion-implanted surface is brought
into close contact with the surface of the base wafer; and then
heat treatment is performed to separate a thin film from the bond
wafer with using the fine bubble layer as a delaminating plane to
fabricate the SOI wafer having an SOI layer; and wherein deviation
in the thickness of the oxide film formed on the bond wafer is
controlled to be smaller than the deviation in the ion implantation
depth.
2. A method of fabricating an SOI wafer in which a bond wafer to
form a SOI layer and a base wafer to be a supporting substrate are
prepared; an oxide film is formed on at least the bond wafer;
hydrogen ions or rare gas ions are implanted in the bond wafer via
the oxide film in order to form a fine bubble layer (enclosed
layer) within the bond wafer; the ion-implanted surface is brought
into close contact with the surface of the base wafer; and then
heat treatment is performed to separate a thin film from the bond
wafer with using the fine bubble layer as a delaminating plane to
fabricate the SOI wafer having an SOI layer; and wherein a
thickness of the oxide film formed on the bond wafer is defined so
that deviation in the thickness of the oxide film formed on the
bond wafer may be smaller than the deviation in the ion
implantation depth.
3. The method of fabricating an SOI wafer according to claim 1
wherein an oxide film is previously formed on the base wafer which
is to be bonded to the bond wafer, and the thickness of the oxide
film formed on the base wafer is defined so that it can form the
buried oxide layer with a desired thickness in the SOI wafer
together with the oxide film formed on the bond wafer.
4. The method of fabricating an SOI wafer according to claim 2
wherein an oxide film is previously formed on the base wafer which
is to be bonded to the bond wafer, and the thickness of the oxide
film formed on the base wafer is defined so that it can form the
buried oxide layer with a desired thickness in the SOI wafer
together with the oxide film formed on the bond wafer.
5. The method of fabricating an SOI wafer according to claim 1
wherein thickness of the oxide film formed on the bond wafer is 10
to 100 nm.
6. The method of fabricating an SOI wafer according to claim 2
wherein thickness of the oxide film formed on the bond wafer is 10
to 100 nm.
7. The method of fabricating an SOI wafer according to claim 3
wherein thickness of the oxide film formed on the bond wafer is 10
to 100 nm.
8. The method of fabricating an SOI wafer according to claim 4
wherein thickness of the oxide film formed on the bond wafer is 10
to 100 nm.
9. An SOI wafer fabricated by the method according to claim 1.
10. An SOI wafer fabricated by the method according to claim 2.
11. An SOI wafer fabricated by the method according to claim 3.
12. An SOI wafer fabricated by the method according to claim 4.
13. An SOI wafer fabricated by the method according to claim 5.
14. An SOI wafer fabricated by the method according to claim 6.
15. An SOI wafer fabricated by the method according to claim 7.
16. An SOI wafer fabricated by the method according to claim 8.
17. An SOI wafer produced by bonding two wafers which has a bonded
surface in a buried oxide layer, or between the buried oxide layer
and a base wafer, and thickness uniformity of an SOI layer is
.+-.1.5 nm or less.
Description
BACKGROUND OF THE INVENTION
[0001] 1. Field of the Invention
[0002] The present invention relates to an SOI (silicon on
insulator) structure wafer obtained by a method wherein an
ion-implanted wafer is bonded to another wafer and a portion of the
ion-implanted wafer is delaminated (separated) to provide an SOI
wafer (called a smart-cut method). More particularly, the present
invention relates to a method of fabricating an SOI wafer having an
active SOI layer which is excellent in thickness uniformity, and an
SOI wafer having an active SOI layer which is excellent in
thickness uniformity.
[0003] 2. Description of the Related Art
[0004] Recently, a method of fabricating an SOI wafer in which an
ion-implanted wafer is bonded to another wafer and a portion of the
ion-implanted wafer is delaminated to provide an SOI wafer
(hereinafter, occasionally referred to as an ion implantation and
delamination method) has attracted attention. In this method, as
shown in FIGS. 3(a) to (h), an oxide film is formed on the surface
of at least one of two silicon wafers (FIG. 3(b)), which are a bond
wafer 2 to form an SOI layer and a base wafer 1 to be a supporting
substrate (FIG. 3(a)); hydrogen ions or rare gas ions are implanted
into the bond wafer 2 in order to form a fine bubble layer
(enclosed layer) 4 within the bond wafer (FIG. 3(c)); the
ion-implanted wafer is superposed on the base wafer 1 such that the
ion-implanted surface comes into close contact with the surface of
the base wafer 1 via the oxide film (FIG. 3(d)); heat treatment is
then performed to delaminate a portion of the bond wafer 2 as a
thin film with using the fine bubble layer as a delaminating plane
(FIG. 3(e)); heat treatment is further performed to firmly bond the
wafers to each other (FIG. 3(f)), which are then subjected to
mirror polishing (FIG. 3(g)) to thereby obtain an SOI wafer (FIG.
3(h)) (See Japanese Patent Application Laid-Open (kokai) No.
5-211128).
[0005] The above-mentioned method can be roughly classified into
two methods depending on the wafer on which an oxide film is
formed. In one of them, Method A, the oxide film is formed on the
base wafer 1 as shown in FIG. 3(A), and in the other of them,
Method B, it is formed on the bond wafer 2 as shown in FIG. 3(B).
Method B wherein the oxide film is formed on the bond wafer in
advance has been performed mainly.
[0006] Because, the depth of ion implantation varies widely due to
a channeling effect, when the oxide film is not formed on the bond
wafer in which ions are to be implanted, and as a result, thickness
uniformity of the SOI layer may be lowered.
[0007] "The channeling effect" means herein a phenomenon wherein
ions implanted parallel to the crystal axis of the crystalline
material pass zigzag between the atoms of the crystal. In that
case, the deviation in the ion implantation depth is larger,
compared to the case that the ions are implanted nonparallel to the
crystal axis. The phenomenon is apt to occur particularly in a
silicon wafer, since the surface thereof is processed in a certain
orientation (for example, <100>). Accordingly, it is
preferable to form the oxide film on the wafer to suppress the
channeling effect in that case.
[0008] Another reason why the oxide film should be formed on the
bond wafer is that the oxide film previously formed on the bond
wafer may suppress diffusion of impurities incorporated in the
bonded surface (boron in atmosphere or metal impurities due to ion
implantation) into the active layer (SOI layer), and therefore,
degradation of crystallinity of the SOI layer and electronic
characteristics can be prevented.
[0009] When the channeling effect is not caused, deviation
(standard deviation) .sigma. of the ion implantation depth in the
ion implantation and delamination method can be 0.4 nm. Namely,
3.sigma.=1.2 nm can be achieved, so that almost all of ions can be
implanted at an intended depth .+-.1.2 nm. Accordingly, it is
inferred that a super thin SOI wafer having good thickness
uniformity of an intended thickness .+-.1.5 nm or less can be
obtained according to the ion implantation and delamination
method.
[0010] However, when the oxide film is formed on the bond wafer in
which ions are to be implanted because of the above-mentioned
reasons, there is a deviation also in the thickness of the formed
oxide film, and the implantation depth of ions implanted in the
silicon through the oxide film is also affected thereby.
[0011] For example, when a thickness of a buried oxide layer of an
SOI wafer needs to be 400 nm, a standard deviation .sigma. in the
thickness of the oxide layer will be 2.0 nm at the smallest under
oxidizing condition in general mass-production. Even if the
oxidizing condition is precisely controlled without considering
productivity, .sigma. is around 1.0 nm at the smallest.
Accordingly, a thickness uniformity of an SOI layer of a
conventional SOI wafer produced with forming an oxide film on a
bond wafer is around an intended thickness .+-.3 nm at the
smallest.
SUMMARY OF THE INVENTION
[0012] The present invention has been accomplished to solve the
above-mentioned problems, and a major object of the present
invention is to provide a method of fabricating an SOI wafer that
has an SOI layer with significantly improved thickness uniformity,
by holding an influence of deviation in thickness of an oxide film
formed on a bond wafer in the SOI wafer on thickness uniformity of
the SOI layer to the minimum, and the SOI wafer.
[0013] To achieve the above mentioned object, the present invention
provides a method of fabricating an SOI wafer in which a bond wafer
to form a SOI layer and a base wafer to be a supporting substrate
are prepared; an oxide film is formed on at least the bond wafer;
hydrogen ions or rare gas ions are implanted in the bond wafer via
the oxide film in order to form a fine bubble layer (enclosed
layer) within the bond wafer; the ion-implanted surface is brought
into close contact with the surface of the base wafer; and then
heat treatment is performed to separate a thin film from the bond
wafer with using the fine bubble layer as a delaminating plane to
fabricate the SOI wafer having an SOI layer; and characterized in
that deviation in the thickness of the oxide film formed on the
bond wafer is controlled to be smaller than the deviation in the
ion implantation depth.
[0014] As described above, in the method of fabricating an SOI
wafer in which an oxide film is formed on a bond wafer in advance,
if the deviation in the thickness of the oxide film formed on the
bond wafer is controlled to be smaller than the deviation in the
ion implantation depth, the influence of the deviation in the
thickness of the oxide film on the thickness uniformity of the SOI
layer can be held to the minimum, and thus the SOI wafer wherein
thickness uniformity of the SOI layer is improved can be
fabricated.
[0015] The term "deviation" herein means a standard deviation.
[0016] To achieve the above mentioned object, the present invention
also provides a method of fabricating an SOI wafer in which a bond
wafer to form a SOI layer and a base wafer to be a supporting
substrate are prepared; an oxide film is formed on at least the
bond wafer; hydrogen ions or rare gas ions are implanted in the
bond wafer via the oxide film in order to form a fine bubble layer
(enclosed layer) within the bond wafer; the ion-implanted surface
is brought into close contact with the surface of the base wafer;
and then heat treatment is performed to separate a thin film from
the bond wafer with using the fine bubble layer as a delaminating
plane to fabricate the SOI wafer having an SOI layer; and
characterized in that a thickness of the oxide film formed on the
bond wafer is defined so that deviation in the thickness of the
oxide film formed on the bond wafer may be smaller than the
deviation in the ion implantation depth.
[0017] As described above, in the method of fabricating the SOI
wafer in which an oxide film is formed on a bond wafer in advance,
when the thickness of the oxide film formed on the bond wafer is
defined so that deviation in the thickness of the oxide film formed
on the bond wafer may be smaller than the deviation in the ion
implantation depth, the influence of the deviation in the thickness
of the oxide film on the ion implantation depth can be held to the
minimum, and thus the SOI wafer wherein thickness uniformity of the
SOI layer is improved can be fabricated.
[0018] Preferably, an oxide film is previously formed on the base
wafer which is to be bonded to the bond wafer, and the thickness of
the oxide film formed on the base wafer is defined so that it can
form the buried oxide layer with a desired thickness in the SOI
wafer together with the oxide film formed on the bond wafer.
[0019] As described above, when the oxide film is previously formed
on the base wafer, and the thickness of the oxide film formed on
the base wafer is defined so that it can form the buried oxide
layer with a desired thickness in the SOI wafer together with the
oxide film formed on the bond wafer, the buried oxide layer having
a desired thickness can easily be obtained, and thus problem of
insufficient thickness of the oxide layer is not caused, and the
influence of the deviation in the thickness of the oxide film of
the bond wafer on the thickness uniformity of the SOI layer can be
held to the minimum.
[0020] The thickness of the oxide film formed on the bond wafer is
preferably 10 to 100 nm.
[0021] Although the deviation in the thickness of the oxide film
and the deviation in the ion implantation depth vary depending on a
used apparatus, conditions for ion implantation and oxidizing
conditions for formation of the oxide film, in order to make the
deviation in thickness of the oxide film smaller than the deviation
in ion implantation depth when using an apparatus used in mass
production, the thickness of the oxide film is preferably 100 nm or
less. On the other hand, at least 10 nm of the thickness of the
oxide film is necessary in order to prevent the channeling effect
described above. Accordingly, the thickness of the oxide film is
preferably 10 nm or more.
[0022] The present invention also provides an SOI wafer produced by
the above mentioned methods, wherein the thickness uniformity of
the SOI layer is high even when the buried oxide layer is
thick.
[0023] The present invention also provides an SOI wafer produced by
bonding two wafers according to the ion implantation and
delamination method, which has a bonded surface in the buried oxide
layer, or between the buried oxide layer and the base wafer. In the
wafer, the thickness uniformity of the SOI layer is high as .+-.1.5
nm or less. Accordingly, device characteristics of the device
fabricated therefrom are improved, and freeness in designing of the
device is large.
[0024] As described above, according to the present invention,
influence of the deviation in the thickness of the oxide film on
the bond wafer on the deviation in the active SOI layer is small,
even in the SOI wafer which requires thick buried oxide layer.
Therefore, the SOI layer having the SOI layer with quite excellent
thickness uniformity can be fabricated. Furthermore, device
characteristics and freeness of the device design can be improved
due to decrease of the deviation of the thickness of the SOI
layer.
BRIEF DESCRIPTION OF THE DRAWINGS
[0025] FIGS. 1(a)-(i) is a flowchart showing an example of an
SOI-wafer fabricating process according to the method of
fabricating an SOI wafer of the present invention.
[0026] FIG. 2 is a graph showing a result of measurement of a
deviation in a thickness of an oxide film and a deviation in an ion
implantation depth, which are shown in the same graph. The line (a)
shows a relation between the thickness of the oxide film and the
deviation therein. The line (b) shows a relation between the ion
implantation depth and the deviation therein.
[0027] FIGS. 3(a)-(h) is a flowchart showing an example of an
SOI-wafer fabricating process according to an ion implantation and
delamination method. (A) shows a method wherein an oxide film is
formed on a base wafer. (B) shows a method wherein an oxide film is
formed on a bond wafer.
DESCRIPTION OF THE INVENTION AND A PREFERRED EMBODIMENT
[0028] The present invention will be further described below in
detail, but is not limited thereto.
[0029] In fabrication of the SOI wafer, formation of the buried
oxide layer having a thickness necessary for the SOI wafer under
general oxidizing condition for mass production may results in far
larger deviation in the thickness of the oxide film formed in the
wafer than the deviation in the ion implantation depth.
Accordingly, the thickness uniformity of the SOI layer may be
significantly affected thereby.
[0030] Generally, the deviation in the thickness of a thicker oxide
film is larger. Accordingly, the inventors of the present invention
have thought of making the thickness of the oxide film formed on
the bond wafer thin in order to make the deviation in the thickness
of the oxide film smaller than the deviation in the implantation
depth of ion implantation, and making up for a deficiency in the
thickness of the buried oxide layer necessary for the SOI wafer by
forming the oxide film on the base wafer, to obtain a buried oxide
layer having a desired thickness in combination of the oxide film
formed on the bond wafer and that formed on the base wafer.
[0031] For example, when the upper limit of the thickness of the
oxide film in the case that the deviation in the implantation depth
achieved by an ion implanter used for fabrication of SOI wafer is
0.4 nm and the deviation in the oxide film formed on the bond wafer
is 0.4 nm or less, is 100 nm, the thickness of the oxide film of
100 nm or less can be selected as the thickness of the oxide film
formed on the bond wafer.
[0032] In that case, when the thickness of the oxide film on the
bond wafer is defined to be, for example, 40 nm, and the thickness
of the buried oxide layer necessary for SOI wafer is 400 nm, the
oxide film having a thickness of 40 nm can be formed on the bond
wafer, in which ions are then implanted, and the resulting wafer
can be bonded to the base wafer on which an oxide film having a
thickness of 360 nm is formed.
[0033] The relation between the deviation in the thickness of the
oxide film and the deviation in the ion implantation depth is
important for the present invention. Accordingly, the inventors of
the present invention studied the deviation in the thickness of the
oxide film and the deviation in the ion implantation depth.
[0034] The deviation in the thickness of the oxide film was studied
as follows. First, each of the oxide films having various thickness
was actually formed on the wafer under a general oxidizing
condition for mass production. Then, the standard deviation was
determined from the thickness distribution in the surface as for
each wafer. As a result, the relation between the thickness of the
oxide film and the deviation in the thickness of the oxide film was
revealed as shown in the line (a) of FIG. 2.
[0035] The deviation in the ion implantation depth was studied as
follows. First, a wafer having no oxide film was prepared in order
to avoid the influence of the oxide film. Then, ions are implanted
therein using an apparatus generally used, with inclining a
implanting angle at several degree in order to avoid a channeling
phenomenon. The resulting wafer was bonded to a wafer on which an
oxide film is formed, followed by a heat treatment for delamination
at about 500.degree. C. to produce an SOI wafer. The thickness of
the resulting SOI wafer was then measured to determine the
distribution thereof in the surface. Plural wafers were fabricated
with implanting ions therein at various implantation energy, and
were determined as for the thickness distribution in the surface as
described above. Thereby, the relation between the ion implantation
depth and the deviation therein was revealed as shown in the line
(b) of FIG. 2.
[0036] Comparing the deviation in the thickness of the oxide film
and the deviation in the ion implantation depth, it is revealed
that the deviation in the thickness of the oxide film shown as
black circles in the line (a) of FIG. 2 increases in proportion to
increase of the thickness of the oixde film formed on the wafer. On
the other hand, it is revealed that the deviation in the ion
implantation depth shown as white circles in the line (b) of FIG. 2
does not change a lot, and is approximately in the range of 0.4 to
0.6 nm, even when the ion implantation depth increases.
[0037] From the relations mentioned above, an appropriate thickness
of the oxide film to be formed on the bond wafer can be
defined.
[0038] Namely, in the relation in FIG. 2 which shows the relation
when using the apparatus and the condition generally used for mass
production, the thickness of the oxide film formed on the bond
wafer is appropriately 100 nm or less in order to make the
deviation in the thickness of the oxide film smaller than the
deviation in the ion implantation depth.
[0039] When the thickness of the oxide film on the bond wafer is
thinner, the deviation in the thickness of the oxide film is
smaller, so that the influence of the deviation in the thickness of
the oxide film on the ion implantation depth gets smaller. However,
in order to prevent channeling effect which is one of the reasons
why the oxide film is formed on the bond wafer, the thickness of
the oxide film of at least 10 nm is necessary. Accordingly, when
the SOI wafer is actually fabricated, the thickness of the oxide
film formed on the bond wafer is preferably 10 to 100 nm.
[0040] In that case, even when the deviation in the thickness of
the oxide film and the deviation in the ion implantation depth are
changed depending on the ion implanter or conditions such as the
condition for formation of the oxide film, the deviations therein
can be studied as described above, to make the deviation in the
thickness of the oxide film smaller than the deviation in the ion
implantation depth.
[0041] The embodiment of the present invention will be further
described below, referring a figure, but is not limited
thereto.
[0042] FIG. 1 is a flowchart showing an example of an SOI wafer
fabricating process according to a method of fabricating an SOI
wafer of the present invention.
[0043] In Step (a) of the ion implantation--delamination method
shown in FIG. 1, two mirror wafers, namely a base wafer 1 to be a
base and a bond wafer 2 to form an SOI layer 8, which are suitable
for device specifications are prepared.
[0044] In Step (b), the bond wafer 2 is subjected to thermal
oxidation so as to form on the surface thereof an oxide film 3
having a thickness of 10 to 100 nm. As described above, if the
thickness of the oxide film is in the range, the deviation therein
can be smaller than the deviation in the ion implantation depth, so
that thickness of the SOI layer 8 can be made uniform.
[0045] In Step (c), the base wafer 1 is subjected to thermal
oxidation so as to form on the surface thereof an oxide film 5. The
thickness of the oxide film 5 formed on the base wafer is defined
so that it can provide a buried oxide layer 9 having a desired
thickness for the SOI wafer together with the oxide film 3 formed
on the bond wafer. If the desired thickness of the buried oxide
layer for the SOI wafer can be obtained only by the thickness of
the oxide film 3 formed on the bond wafer, it is not necessary to
form the oxide film on the base wafer. In that case, Step (c) is
omitted.
[0046] In Step (d), hydrogen ions or rare gas ions are implanted
into one surface of the bond wafer 2 having the oxide film formed
on the surface thereof, in order to form a fine bubble layer
(enclosed layer) 4 which lies in parallel to the surface at a
position corresponding to the mean depth of ion implantation. The
implantation temperature is preferably 25-450.degree. C.
[0047] In Step (e), the base wafer 1 is superposed on the
ion-implanted surface of the bond wafer 2 in which hydrogen ions or
rare gas ions are implanted, via the oxide film 3, or via the oxide
film 3 and the oxide film 5, and they are brought in close contact
with each other. When the surfaces of the two wafers are brought
into contact with each other at ambient temperature in a clean
atmosphere, the wafers are bonded to each other without use of
adhesive or the like.
[0048] In Step (f), there is performed a heat treatment for
delamination in which the delamination wafer 6 is delaminated from
the SOI wafer 7 (composed of the SOI layer 8, a buried oxide layer
9, and the base wafer 1) at the enclosed layer 4. The heat
treatment is performed at a temperature of about 500.degree. C. or
higher in an inert gas atmosphere so as to cause crystal
rearrangement and bubble cohesion, and thereby the delamination
wafer 6 is delaminated from the SOI wafer 7.
[0049] In Step (g), the SOI wafer 7 is subjected to heat treatment
at high temperature as a bonding heat treatment in order to improve
bonding strength to a sufficient level, since the bonding strength
of the wafers imparted in Steps (e) and (f), the bonding step and
the delamination heat treatment step, is too low to use in a device
process. Preferably, this heat treatment is performed, for example,
in an inert gas atmosphere at 1050-1200.degree. C. for 30 minutes
to 2 hours.
[0050] The Step (f) as a delamination heat treatment step and Step
(g) as a bonding heat treatment step may be successively performed.
Alternatively, a single heat treatment serving as both of Step (f)
as a delamination heat treatment step and Step (g) as a bonding
heat treatment step may be performed.
[0051] In step (h), a mirror polishing process called touch
polishing wherein a stock removal is very small is then performed
to remove a crystal defect layer on a delaminated surface which is
a surface of the SOI layer 8 and improve the surface roughness.
[0052] The SOI wafer 7 of high quality having the buried oxide
layer 9 with a desired thickness and the SOI layer 8 with high
thickness uniformity can be produced (step (i)) through the steps
described above.
EXAMPLES
[0053] The following examples and a comparative example are being
submitted to further explain the present invention. These examples
are not intended to limit the scope of the present invention.
Example 1
[0054] Two silicon mirror wafers of conductive type p having a
resistivity of 20 .OMEGA..multidot.cm and a diameter of 150 mm were
prepared. These wafers were processed through Steps (a) to (f)
shown in FIG. 1 to delaminate a portion of the bond wafer, and
thereby provide SOI wafers.
[0055] The major process conditions for fabricating SOI wafers were
as follows.
[0056] 1) Thickness of the oxide film on the base wafer: 350
nm;
[0057] 2) Thickness of the oxide film on the bond wafer: 50 nm;
[0058] 3) Deviation in the thickness of the oxide film on the bond
wafer: .sigma.=0.25 nm;
[0059] 4) Condition of ion implantation: H.sup.+ ions, implantation
energy: 80 keV, implantation dose: 8.times.10.sup.16/cm.sup.2;
[0060] 5) Ion implantation depth: 700 nm (thickness of the SOI
layer+thickness of the oxide film on the bond wafer);
[0061] 6) Deviation in the ion implantation depth: .sigma.=0.4
nm.
[0062] In Example 1, the deviation .sigma. in the thickness of the
oxide film on the bond wafer was small as 0.25 nm, compared with
the deviation in the ion implantation depth (.sigma.=0.4 nm). The
thickness of the oxide film on the bond wafer was measured by
spectral reflectance measurement at several thousands points in 2
mm pitch on the surface. The conditions were set so that the
thickness of the buried oxide layer may be 400 nm.
[0063] The two wafers were stacked under the above condition (FIG.
1(e)), and was subjected to the delamination heat treatment in a
N.sub.2 gas atmosphere, at 500.degree. C. for 30 minutes (FIG.
1(f)).
[0064] The deviation in the thickness of the SOI layer of the SOI
wafer after the delamination step were determined to evaluate the
thickness uniformity. The thickness of the SOI layer was measured
by spectral reflectance measurement at several thousands points in
2 mm pitch on the surface.
[0065] As a result, the deviation .sigma. was 0.47 nm, and thus
3.sigma. was 1.41 nm. Accordingly, the thickness of the SOI layer
is about 650 nm.+-.1.41 nm, which shows significantly improved
thickness uniformity of the SOI layer, compared with the thickness
uniformity of the conventional SOI wafer, the intended thickness
.+-.3 nm.
Example 2
[0066] Two silicon mirror wafers of conductive type p having a
resistivity of 20 .OMEGA..multidot.cm and a diameter of 150 mm were
prepared. These wafers were processed through Steps (a) to (f)
shown in FIG. 1 to delaminate a portion of the bond wafer, and
thereby provide SOI wafers.
[0067] The major process conditions for fabricating SOI wafers were
as follows.
[0068] 1) Thickness of the oxide film on the base wafer: 360
nm;
[0069] 2) Thickness of the oxide film on the bond wafer: 40 nm;
[0070] 3) Deviation in the thickness of the oxide film on the bond
wafer: .sigma.=0.20 nm;
[0071] 4) Condition of ion implantation: H.sup.+ ions, implantation
energy: 39 keV, implantation dose: 8.times.10.sup.16/cm.sup.2;
[0072] 5) Ion implantation depth: 340 nm (thickness of the SOI
layer+thickness of the oxide film on the bond wafer);
[0073] 6) Deviation in the ion implantation depth: .sigma.=0.4
nm.
[0074] In Example 2, the deviation .sigma. in the thickness of the
oxide film on the bond wafer is small as 0.20 nm, compared with the
deviation in the ion implantation depth (.sigma.=0.4 nm). The
thickness of the oxide film on the bond wafer was measured in the
similar manner to that of Example 1. The conditions were set so
that the thickness of the buried oxide layer may be 400 nm.
[0075] The two wafers were stacked under the above condition (FIG.
1(e)), and is subjected to the delamination heat treatment in a
N.sub.2 gas atmosphere, at 500.degree. C. for 30 minutes (FIG.
1(f)).
[0076] The deviation in the thickness of the SOI layer of the SOI
wafer after the delamination step was determined in the similar
manner to that of Example 1.
[0077] As a result, the deviation .sigma. was 0.45 nm, and thus
3.sigma. is 1.35 nm. Accordingly, the thickness of the SOI layer is
about 300 nm.+-.1.35 nm, which shows significantly improved
thickness uniformity of the SOI layer, compared with the thickness
uniformity of the conventional SOI wafer, the intended thickness
.+-.3 nm.
Example 3
[0078] Two silicon mirror wafers of conductive type p having a
resistivity of 20 .OMEGA..multidot.cm and a diameter of 150 mm were
prepared. These wafers were processed through Steps (a) to (f)
shown in FIG. 1 to delaminate a portion of the bond wafer, and
thereby provide SOI wafers (provided that step (c) was
omitted).
[0079] The major process conditions for fabricating SOI wafers were
as follows.
[0080] 1) Thickness of the oxide film on the base wafer: no oxide
film;
[0081] 2) Thickness of the oxide film on the bond wafer: 50 nm;
[0082] 3) Deviation in the thickness of the oxide film on the bond
wafer: .sigma.=0.25 nm;
[0083] 4) Condition of ion implantation: H.sup.+ ions, implantation
energy: 20 keV, implantation dose: 8.times.10.sup.16/cm.sup.2;
[0084] 5) Ion implantation depth: 180 nm (thickness of the SOI
layer+thickness of the oxide film on the bond wafer);
[0085] 6) Deviation in the ion implantation depth: .sigma.=0.4
nm.
[0086] In Example 3, the deviation .sigma. in the thickness of the
oxide film on the bond wafer was small as 0.25 nm, compared with
the deviation in the ion implantation depth (.sigma.=0.4 nm). Since
the conditions were set so that the thickness of the buried oxide
layer may be 50 nm, the oxide film was not formed on the base
wafer. The thickness of the oxide film was measured in the similar
manner to that of Example 1.
[0087] The two wafers were stacked under the above condition (FIG.
1(e)), and is subjected to the delamination heat treatment in a
N.sub.2 gas atmosphere, at 500.degree. C. for 30 minutes (FIG.
1(f)).
[0088] The deviation in the thickness of the SOI layer of the SOI
wafer after the delamination step were determined in the similar
manner to that of Example 1.
[0089] As a result, the deviation .sigma. was 0.47 nm, and thus
3.sigma. was 1.41 nm. Accordingly, the thickness of the SOI layer
was about 130 nm.+-.1.41 nm, which shows significantly improved
thickness uniformity of the SOI layer, compared with the thickness
uniformity of the conventional SOI wafer, the intended thickness
.+-.3 nm.
Comparative Example
[0090] Two silicon mirror wafers of conductive type p having a
resistivity of 20 .OMEGA..multidot.cm and a diameter of 150 mm were
prepared. A portion of the bond wafer was delaminated to provide an
SOI wafer according to the conventional fabrication method shown in
FIG. 3(B).
[0091] The major process conditions for fabricating SOI wafers were
as follows.
[0092] 1) Thickness of the oxide film on the base wafer: no oxide
film;
[0093] 2) Thickness of the oxide film on the bond wafer: 400
nm;
[0094] 3) Deviation in the thickness of the oxide film on the bond
wafer: .sigma.=2.0 nm;
[0095] 4) Condition of ion implantation: H.sup.+ ions, implantation
energy: 80 keV, implantation dose: 8.times.10.sup.16/cm.sup.2;
[0096] 5) Ion implantation depth: 700 nm (thickness of the SOI
layer+thickness of the oxide film on the bond wafer);
[0097] 6) Deviation in the ion implantation depth: .sigma.=0.4
nm.
[0098] In Comparative Example, the deviation .sigma. in the
thickness of the oxide film on the bond wafer was large as 2.0 nm,
compared with the deviation in the ion implantation depth
(.sigma.=0.4 nm). The thickness of the buried oxide film was 400
nm. The oxide film was formed only on the bond wafer, not on the
base wafer. The thickness of the oxide film was measured in the
similar manner to that of Example 1.
[0099] The two wafers were stacked under the above condition (FIG.
3(d)), and is subjected to the delamination heat treatment in a
N.sub.2 gas atmosphere, at 500.degree. C. for 30 minutes (FIG.
3(e)).
[0100] The deviation in the thickness of the SOI layer of the SOI
wafer after the delamination step were determined in the similar
manner to that of Example 1.
[0101] As a result, the deviation .sigma. was 2.04 nm, and thus
3.sigma. is 6.12 nm. Accordingly, the thickness of the SOI layer is
about 300 nm.+-.6.12 nm, which shows far inferior thickness
uniformity of the SOI layer, compared with the intended thickness
.+-.1.5 nm which is an expected value from the deviation in the ion
implantation depth .sigma.=0.4 nm.
[0102] The present invention is not limited to the above-described
embodiment. The above-described embodiment is a mere example, and
those having substantially the same structure as that described in
the appended claims and providing the similar action and effects
are all included in the scope of the present invention.
[0103] For example, the process of fabricating the SOI wafer
according to the present invention is not limited to that shown in
FIG. 1. Other processes such as cleaning, heat treatment or the
like can be added thereto. Furthermore, the order of the processes
can be partly changed or omitted depending on the purpose.
[0104] Furthermore, in the above description, it is mainly
explained as for the case that the thickness of the oxide film
formed on the bond wafer is made thin to make the deviation in the
thickness of the oxide film formed on the bond wafer smaller than
the deviation in the ion implantation depth. However, the present
invention is not limited thereto. It is possible to make the
deviation in the thickness of the oxide film smaller than the
deviation in the ion implantation depth by modifying other
conditions than the thickness of the oxide film. For example, it is
possible to make the deviation in the thickness of the oxide film
smaller than the deviation in the ion implantation depth by
modifying other conditions for formation of the oxide film than the
thickness of the oxide film.
* * * * *