U.S. patent application number 08/929423 was filed with the patent office on 2001-08-02 for nonvolatile semiconductor disk device limiting a number of simultaneous transfers and associated control process.
Invention is credited to BEPPU, ATSUSHI.
Application Number | 20010011319 08/929423 |
Document ID | / |
Family ID | 14927925 |
Filed Date | 2001-08-02 |
United States Patent
Application |
20010011319 |
Kind Code |
A1 |
BEPPU, ATSUSHI |
August 2, 2001 |
NONVOLATILE SEMICONDUCTOR DISK DEVICE LIMITING A NUMBER OF
SIMULTANEOUS TRANSFERS AND ASSOCIATED CONTROL PROCESS
Abstract
Write data, when given from a host via an interface, are
temporarily stored in a buffer memory of a disk control unit. A
number-of-chips managing unit manages the number of memory chips
executing writing operations. If the number of memory chips in the
process of writing operations does not reach a fixed number, the
write data are transferred to the memory chips allocated to,
corresponding write areas. Whereas if the number of memory chips in
the process of writing operations reaches the fixed number, the
write data are transferred after an end of the writing operations
to the memory chips in the process of writing operations. An entire
electric current during the writing operation of a disk card can be
thereby restricted.
Inventors: |
BEPPU, ATSUSHI; (MINATO-KU,
JP) |
Correspondence
Address: |
JONES & VOLENTINE
TWO FOUNTAIN SQUARE
11921 FREEDOM DRIVE
SUITE 550
RESTON
VA
20190
|
Family ID: |
14927925 |
Appl. No.: |
08/929423 |
Filed: |
September 15, 1997 |
Current U.S.
Class: |
711/103 ;
711/115; 711/168 |
Current CPC
Class: |
G06F 3/0679 20130101;
G06F 3/0653 20130101; Y02D 10/00 20180101; G06F 3/0625 20130101;
G11C 16/06 20130101 |
Class at
Publication: |
711/103 ;
711/168; 711/115 |
International
Class: |
G06F 012/00 |
Foreign Application Data
Date |
Code |
Application Number |
May 16, 1997 |
JP |
9-126150 |
Claims
What is claimed is:
1. A nonvolatile semiconductor disk device comprising: interface
means for transferring data to an outside device; a plurality of
memory chips each including a nonvolatile semiconductor memory for
storing data transferred from or to said interface means, and a
buffer memory for temporarily holding the data to write the data to
said nonvolatile semiconductor memory; and control means for
outputting the data transferred from said outside device via said
interface means to said memory chip, reading the data from said
memory chip and outputting the data to said interface means,
wherein said control means monitors the number of writing processes
that are simultaneously being executed in said plurality of memory
chips, and controls the outputs of the data to said memory chips so
that the number of simultaneous writing processes does not exceed a
predetermined value.
2. A nonvolatile semiconductor disk device according to claim 1,
wherein said control means outputs the data to said memory chips
and thereafter starts monitoring whether or not the writing
processes to said memory chips are completed after an elapse of a
fixed time substantially corresponding to a necessary writing time
in said memory chips.
3. A nonvolatile semiconductor disk device according to claim 1,
wherein said control means further includes registers for
registering addresses of said memory, chips in the process of the
writing operation, and controls the outputs to said memory chips so
that the number of simultaneous writing operations does not exceed
a predetermined value on the basis of the addresses registered in
said registers.
4. A nonvolatile semiconductor disk device according to claim 1,
wherein said control means further includes a memory control timer
for counting the time needed for writing to said memory chips, and
starts monitoring whether or not the writing operations to said
memory chips are completed, with a write time counted by said
memory control timer serving as a trigger.
Description
BACKGROUND OF THE INVENTION
[0001] The present invention relates to a nonvolatile semiconductor
disk device (hereinafter referred to as a "disk card") as one of
peripheral function extender cards of a personal computer
(hereinafter abbreviated to a "PC"), etc., and also relates to
writing control to this disk card.
[0002] The disk card as a peripheral device of the PC is stored
with data.
[0003] Then, the disk card is capable of holding a content of the
storage without requiring a power supply.
[0004] Next, a nonvolatile semiconductor memory such as, e.g., a
flash memory is employed as a storage medium of the disk card.
[0005] This nonvolatile semiconductor memory is stored with the
data in such a form as to be formatted to a fixed size called a
sector as in the case of the disk device like a flexible disk and a
hard disk.
[0006] Incidentally, the disk card in a name card size becomes,
with increases by leaps in storage capacity of the semiconductor
memory, capable of storing the data of several tens of Mega
bytes.
[0007] This disk card is used for storing data about a picture
photographed by, e.g., a digital camera in the way of utilizing
merits of being small in size but large in capacity and of the
storage content being held even when switching off the power
supply.
[0008] Next, the disk card with a completion of the photography is
taken out of the digital camera and set in the PC, and the image
data stored thereon can be read and digitally processed.
[0009] FIG. 2 is a diagram showing one example of a conventional
disk card.
[0010] This disk card includes an interface unit 10 connected to a
host 1 such as the digital camera and the PC, a central processing
unit (hereinafter abbreviated to a "CPU") 20 for executing whole
control within the disk card by transmitting and receiving a
variety of control signals to and from this host 1, a disk control
unit 30 for controlling a transfer of the data to the host 1, an
internal bus 40 through which to transfer the data inwardly the
disk card, and a storage unit 50 for storing the data.
[0011] Then, the disk control unit 30 has a buffer memory 31 for
temporarily holding sector-basis data given from the host 1.
[0012] The sector contains e.g., 536-bytes data in such a fixed
format that a header portion containing data about a validity, etc.
of this sector and a correction code for correcting an error are
added to, e.g., 512-bytes data.
[0013] The disk control unit 30 incorporates a function to write
sector-basis data to the corresponding storage unit 50 via the
internal bus 40 on the basis of an address signal given via the
interface unit 10, and to read the sector-basis data stored in the
storage unit 50.
[0014] The storage unit 50 is constructed of a plurality (e.g., 15
pieces) of memory chips 50a, 50b, . . . , 50n connected in common
to the internal bus 40.
[0015] Addresses different from each other are allocated to these
memory chips 50a-50n.
[0016] Then, each of the memory chips 50a-50n has the same
construction, and includes a buffer memory 51 for temporarily
holding the sector-basis data and a nonvolatile semiconductor
memory 52 for storing the sector-basis data.
[0017] The nonvolatile semiconductor memory 52 is capable of
holding a content of the storage even if a supply of the power
supply is stopped.
[0018] Each of the memory chips 50a-50n has a memory control unit
53 for controlling a transfer of the sector-basis data between the
buffer memory 51 and the nonvolatile semiconductor memory 52.
[0019] Next, in this disk card, when the host 1 issues a command to
write the data, the write data is temporarily held in the buffer
memory 31 within the disk control unit 30 via the interface unit
10.
[0020] The data held in the buffer memory 31 is transferred to and
held in the buffer memory 51 in one of the memory chips 50i
(however, i=a to n) which corresponds, to the address thereof via
the internal bus 40.
[0021] The data held in the buffer memory 51 in the memory chip 50i
is written to a predetermined storage area in the nonvolatile
semiconductor memory 52 under the control of the memory control
unit 53.
[0022] At this time, a transfer time of the data transferred from
the host 1 to the buffer memory via the interface unit 10 and the
buffer memory 31, is on the order of several hundred .mu.s.
[0023] On the other hand, for instance, a time of several ms is
required for writing the data temporarily held in the buffer memory
51 to the semiconductor memory 52.
[0024] For this purpose, the storage unit 50 is divided into a
plurality of memory chips 50a-50n, and each memory chip, e.g., 50a
is provided with the buffer memory 51 and the nonvolatile
semiconductor memory 52.
[0025] Then, the data is independently written to the nonvolatile
semiconductor memory 52 from each of the buffer memories 51. With
this operation, there can be substantially equivalently executed
the writing process to the disk card from the host 1.
[0026] On the other hand, under the control of the CPU 20, when the
host 1 issues a command to read the data, a reading command is
given to the memory chip 50a stored with the data to be read.
[0027] Then, the sector-basis data is read from the corresponding
storage area in the nonvolatile semiconductor memory 52.
[0028] The thus read data is temporarily held in the buffer memory
51 and thereafter held in the buffer memory 31 within the disk
control unit 30 via the internal bus 40.
[0029] The data written to the buffer memory 31 is further
transferred to the host 1 via the interface unit 10.
[0030] There arise, however, the following problems inherent in the
prior art disk card.
[0031] In the disk card, the storage unit 50 is divided into the
plurality of memory chips 50a-50n in order to substantially
equivalently hold an access speed for high-velocity writing and
reading processes in the interface unit 10.
[0032] Next, each of the memory chips 50a-50n is provided with the
buffer memory 51.
[0033] Then, the disk card is capable of equivalently executing the
writing operations at the high speed by executing the writing
operations to the memory chips 50a-50n in parallel.
[0034] An electric current necessary for the writing operation per
memory chip is on the order of, e.g., 15 mA.
[0035] A total operation current, when the number of the memory
chips 50a-50n in the process of the simultaneous writing operations
increases, becomes large.
[0036] Accordingly, only the storage unit 50 requires a current of
approximately 150 mA when ten pieces of memory chips 50i are in the
simultaneous writing operations.
[0037] Therefore, the host 1 must include a power supply having a
current capacity allowing for it.
[0038] The thus constructed disk card is used not only simply as a
peripheral device of the PC but also for storing data about
photographed picture in such a way as to be attached to, e.g., a
digital camera.
[0039] The digital camera is driven by a battery and therefore has
a limit in terms of being supplied with a large current when
writing the image data.
[0040] It is a primary object of the present invention, which was
contrived to obviate the problems inherent in the prior art
described above, to provide a disk card requiring no large current
of a power supply by restricting the number of memory chips 50a-50n
in the process of simultaneous writing operations.
SUMMARY OF THE INVENTION
[0041] To accomplish the above object, a nonvolatile semiconductor
disk device according to the present invention is a disk card
comprising an interface unit for transferring data given from
outside, a plurality of memory chips each including a nonvolatile
semiconductor memory for storing data and a buffer memory for
temporarily holding the data to write the data to the semiconductor
memory, and a control unit for outputting the data transferred via
the interface unit, reading the data from a corresponding memory
chip in accordance with a designation given from outside and
outputting the data to the interface unit. The control unit
monitors the number of simultaneous writing processes that are
simultaneously being executed in the plurality of memory chips, and
controls the outputs of the data given from outside to the
corresponding memory chips so that the number of simultaneous
writing processes does not exceed a predetermined number.
[0042] Next, in the nonvolatile semiconductor disk device, the
control unit has a function added thereto, to output the data to
the memory chips and thereafter to start monitoring a completion of
the writing processes to the memory chips after an elapse of a
fixed time substantially corresponding to a necessary writing time
in the memory chips.
[0043] Then, the nonvolatile semiconductor disk device is so
constructed as to take a card-like configuration as a disk card and
to be attachable and detachable to the processor through the
interface unit.
[0044] The nonvolatile semiconductor disk device, since the disk
card is constructed as described above, exhibits the following
operations.
[0045] The control unit, when the data is transferred from the
processor via the interface unit, checks the number of memory chips
that are now in the process of the writing operations.
[0046] Then, the control unit outputs the data to the relevant
memory chips if the number of the memory chips in the writing
processes is less than a predetermined number.
[0047] The control unit, if the number of the memory chips in the
writing processes is the predetermined number, does not output the
data to the relevant memory chips till the number of the
simultaneous writing processes becomes less than the predetermined
number.
[0048] Then, the control unit outputs the data to the memory chips
just when the number of the simultaneous writing processes becomes
less than the predetermined number.
[0049] Next, the nonvolatile semiconductor disk device exhibits the
following operations.
[0050] The control unit checks the number of the memory chips that
are now in the writing processes when the data is transferred from
the processor via the interface unit.
[0051] Then, the control unit, if the number of the memory chips in
the writing processes is less than the predetermined number,
outputs the data to the relevant memory chips.
[0052] Subsequently, the control units, after an elapse of a fixed
time substantially corresponding to a necessary write time, starts
monitoring whether or not the writing processes are completed.
[0053] On the other hand, the control unit, if the number of the
memory chips in the writing processes, does not output the data to
the relevant memory chips till the number of the simultaneous
operations becomes less than the predetermined number.
[0054] Then, the control unit, if the number of the simultaneous
writing operations is less than the predetermined number as a
result of monitoring the completion of the writing processes,
outputs the data to the memory chips, and the data is written to
the semiconductor memory in the memory chip.
BRIEF DESCRIPTION OF THE DRAWINGS
[0055] Other objects and advantages of the present invention will
become apparent during the following discussion in conjunction with
the accompanying drawings, in which:
[0056] FIG. 1 is a diagram showing a construction of a disk card in
a first embodiment of the present invention;
[0057] FIG. 2 is a diagram illustrating a construction of a prior
art disk card; and
[0058] FIG. 3 is a diagram illustrating a configuration of a disk
control unit in the disk card in a second embodiment of the present
invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0059] First Embodiment
[0060] FIG. 1 is a diagram showing a construction of a disk card in
a first embodiment of the present invention.
[0061] Referring to FIG. 1, the elements common to those of the
prior art disk card shown in FIG. 2 are marked with the common
numerals.
[0062] This disk card takes a card-like configuration in a name
card size enough to be attachable to a digital camera, etc.
[0063] The disk card includes an interface module (e.g., an
interface unit) 10, control modules (e.g., a CPU 20 and a disk
control unit 30A), an internal bus and a storage unit 50.
[0064] The interface unit 10 is, as in the case of the prior art
disk card, connected to a host 1 such as a digital camera and a
PC.
[0065] Then, the interface unit 10 pursuant to, for example, the
ATA (Advanced Technology Attachment) Standards defined as hard disk
standards proposed by IBM in U.S.A., is connected to the host 1 and
transmits and receives data and a variety of control signals.
[0066] A CPU 20 for controlling the whole units within the disk
card and a disk control unit 30A incorporating functions different
from those in the prior art, are connected to the interface unit 10
in the same way with the prior art.
[0067] This disk control unit 30A includes a buffer memory 31,
having storage capacity for a plurality of sectors, for temporarily
storing sector-basis data (e.g., 536 bytes) given from the host
1.
[0068] Therefore, as far as empty sectors exist in the buffer
memory 31, the disk control unit 30A is capable of inputting the
sector-basis data from the host irrespective of an operating status
of the storage unit 50.
[0069] The disk control unit 30A monitors the number of
simultaneous operations of memory chips 50a-50n, in the storage
unit 50 in addition to the conventional functions described
above.
[0070] Then, the disk control unit 30A has a number-of-chips
managing unit 32 for controlling so as not to simultaneously
execute writing operations to more than a predetermined number of
memory chips 50i (however, i=a-n).
[0071] The number-of-chips managing unit 32 has, e.g., three pieces
of unillustrated registers 32a for registering addresses of the
memory chips 50i that are in the process of writing operations.
[0072] The internal bus 40 is a common bus for transferring the
data between the disk control unit 30A and the storage unit 50.
[0073] Then, the internal bus 40 is constructed of an address line,
a data line and a control line.
[0074] The storage unit 50 consists of a plurality (e.g., 15
pieces) of memory chips 50a-50n connected in common via the
internal bus in the same way with the prior art.
[0075] These memory chips 50a-50n, to which addresses different
from each other are allocated, each take the same configuration,
and respectively have a buffer memory 51 for temporarily storing
the sector-basis data and a nonvolatile semiconductor memory 52 for
storing the sector-basis data.
[0076] Each nonvolatile semiconductor memory 52 has a storage
capacity of, e.g., an 8M bits, and contents of the storage are held
even if a supply of the power supply is stopped.
[0077] Then, each of the memory chips 50a-50n has a memory control
unit 53 for controlling a transfer of the sector-basis data between
the buffer memory 51 and the nonvolatile semiconductor memory
52.
[0078] Next, operations of the thus constructed disk card will be
explained.
[0079] Write data is, when the host 1 issues a command to write the
data, temporarily written to the buffer memory 31 in the disk
control unit 30A via the interface unit 10.
[0080] The three registers 32a within the number-of-chips managing
unit 32 are registered with the addresses of the memory chips 50i
in the process of the writing operations.
[0081] Then, the number-of-chips managing unit 32 checks contents
of these three registers 32a when the data writing command is given
thereto.
[0082] If there exists an empty-status register 32a registered with
no address, the address of the memory chip 50i to which the data is
to be written is registered in this empty-status register 32a.
[0083] Subsequently, the write data is outputted to that memory
chip 50i.
[0084] Thus, the data writing operation is started in the memory
chip 50.
[0085] After outputting the write data, the disk control unit 30A
periodically monitors statuses of the memory chips 50i n the
process of the writing operations, the addresses of which are
registered in the three registers 32a, thereby monitoring a
completion of the writing operation.
[0086] In monitoring the status, for instance, a reading command is
issued to the memory chip 50i, and, if a response therefrom is a
BUSY status, it is judged that the writing operation is
uncompleted.
[0087] On the other hand, if the three registers 32a are all in use
just when the host 1 issues the data writing command, and even when
executing no writing operation to the data writing target memory
chip 50i, the output of the write data to the memory chip 50i from
the disk control unit 30A remains stopped till a completion of the
writing operations to the memory chips 50i the addresses of which
are registered in the three registers 32a.
[0088] Then, when the completion of the writing operations to the
one memory chips is detected by a status monitoring process, the
addresses of the memory chips 50i are registered to the empty
registers 32a, and the writing command is given to the memory chips
50i.
[0089] Thus, the disk control unit 30A in the disk card in
accordance with the first embodiment incorporates the
number-of-chips managing unit 32 for monitoring the number of the
memory chips 50a-50n which operate simultaneously, whereby it never
happens that the memory chips 50i exceeding the number of chips
that is preset by the number-of-chips managing unit 32
simultaneously perform the writing operations.
[0090] Accordingly, a consumption electric current of the storage
unit 50 that is needed when writing the data to the memory chips
50i comes to a maximum value corresponding to the number of chips
which is set by the number-of-chips managing unit 32.
[0091] Hence, there might be such an advantage that the power
supply having a large capacity is not required to be prepared for
the processor 1 such as, e.g., a digital camera, etc.
[0092] Further, the disk control unit 30A includes the buffer
memory 31 capable of temporarily holding plural pieces of data
given from the host 1, and therefore, even when the writing
operations to the memory chips 50i are limited, it is feasible to
receive the data from the host 1. An influence on the processing on
the side of the host 1 is thus reduced.
[0093] Second Embodiment
[0094] FIG. 3 is a diagram showing a construction of the disk
control unit in the disk card in a second embodiment of the present
invention.
[0095] Referring to FIG. 3, the components common to those in FIG.
1 are marked with the common numerals.
[0096] A disk control unit 30B is substitute for the disk control
unit 30A in FIG. 1.
[0097] Then, the disk control unit 30B is constructed by adding a
memory control timer 33 to the disk control unit 30A.
[0098] The memory control timer 33 has a count timer 33a for
counting a necessary write time in the memory chip 50i.
[0099] The count timer 33a is a timer, when the disk card executes
the writing operation for the first time, for counting the time
needed for this writing operation.
[0100] An output side of the count timer 33a is connected to a time
storage register 33b for storing the time counted by the count
timer 33a as a time substantially corresponding to the necessary
write time.
[0101] Then, three pieces of count-down timers 33c, 33d, 33e are
connected to an output side of the time storage register 33b,
corresponding to the three registers 32a used for the
number-of-chips managing unit 32 managing the number of chips
performing the simultaneous writing operations.
[0102] The count-down timers 33c-33e count down the necessary write
time loaded from the time storage register 33b with an elapse of
time.
[0103] Then, the count-down timers 33c-33e, when values thereof
come to "0", start monitoring the completion of the writing
operations to the relevant memory chips 50i.
[0104] In the thus constructed disk card, when the host 1 issues
the data writing command, the write data is temporarily written to
the buffer memory 31 in the disk control unit 30B via the interface
unit 10.
[0105] Just when one of the three registers 32a in the
number-of-chips managing unit 32 is emptied, the address of the
writing target memory chip 50i is registered in this empty register
32, and the write data is transferred to this memory chip 50i.
[0106] Furthermore, a content of the time storage register 33b is
loaded into a count-down timer 33j (however, j=c-e) corresponding
to that register 32a.
[0107] With this process, the operation of writing the data starts
within the memory chip 50i, and simultaneously the count-down timer
33j starts counting down.
[0108] When a value of the count-down timer 33j comes to "0", the
disk control unit 30B is informed of this purport, and the disk
control unit 30B monitors a status of the relevant memory chip
50i.
[0109] Thus, in the disk card in accordance with the second
embodiment, the disk control unit 30 incorporates the memory
control timer 33, and just when the writing process is completed,
this memory control timer 33 gives a notification.
[0110] Accordingly, there is no necessity for monitoring the
completion of the writing process to the memory chip 50i within a
predetermined time required for the writing process.
[0111] It is therefore of almost no necessity to implement the
operation for monitoring the status, which yields such a advantage
that the electric power consumed for that operation can be
reduced.
[0112] Note that the present invention is not limited to the
embodiments discussed above but may be modified in a variety of
forms, and there may be, for example, the following modified
examples (a)-(e).
[0113] (a) The disk card assumes the card-like configuration in the
name card size so as to be attachable to the digital camera, etc.,
but is not confined to the card-like configuration.
[0114] (b) The interface unit 10 is not limited to the ATA
Standards but may be the one capable of transferring the data in
accordance with a given format.
[0115] (c) The number of the memory chips 50a-50n, the storage
capacity, the transfer speed and the size of the transfer data, are
not limited to the numerical values shown in the embodiments.
[0116] (d) The number-of-chips managing unit 32 restricts the
number of the memory chips 50i operating simultaneously to "3",
however, it may be set to an arbitrary number depending on a
capacity of the power supply, a data quantity and a necessary write
time.
[0117] (e) The memory control timer 33 shown in FIG. 3 is
constructed so that the count timer 33a counts at first the
necessary writing operation time of the memory chip 50i, however,
if the time storage register 33b is stored with a rough order of
necessary writing operation time, the count timer 33a can be
omitted.
[0118] As discussed above in greater detail, according to the first
invention, there is provided the control module for restricting the
simultaneous writing operations to the memory chips by managing the
output of the write data to the plurality of memory chips. It is
therefore possible to prevent the power supply from making a large
current flow momentarily therefrom and to thereby reduce the
capacity of the power supply.
[0119] According to the second invention, after the necessary write
time of the memory chip has elapsed, the completion of the writing
operation to that memory chip is monitored. Therefore, the
unnecessary operation for monitoring is eliminated, which leads to
a decrease in the consumption electric power.
[0120] According to the third invention, the disk card is formed in
the card-like shape and can be connected via the interface module
to the host such as the digital camera, etc. Hence, the disk card
is, when in use, suitably attached to the portable host having a
small capacity of the power supply.
[0121] It is apparent that, in this invention, a wide range of
different working modes can be formed based on the invention
without deviating from the spirit and scope of the invention. This
invention is not restricted by its specific working modes being
limited by the appended claims.
* * * * *