U.S. patent application number 09/764197 was filed with the patent office on 2001-07-19 for liquid crystal display and method of manufacturing the same.
Invention is credited to Ando, Masahiko, Nakayama, Takanori, Ohta, Masuyuki.
Application Number | 20010008799 09/764197 |
Document ID | / |
Family ID | 18537359 |
Filed Date | 2001-07-19 |
United States Patent
Application |
20010008799 |
Kind Code |
A1 |
Nakayama, Takanori ; et
al. |
July 19, 2001 |
Liquid crystal display and method of manufacturing the same
Abstract
A method of manufacturing a liquid crystal display device is
intended to decrease the number of manufacturing steps. The liquid
crystal display device is arranged so that in each pixel area
provided on a liquid-crystal-side surface of one of a pair of
substrates disposed to oppose each other with a liquid crystal
interposed therebetween, a signal from a drain line is applied to a
pixel electrode via a drain electrode and a source electrode which
are formed in a layer overlying a semiconductor layer of a thin
film transistor, by the supply of a scanning signal from a gate
electrode which is positioned as an underlying layer with respect
to the semiconductor layer. The method of manufacturing such liquid
crystal display device includes the steps of: forming a stacked
structure in which the semiconductor layer and a first conductive
layer are sequentially stacked in the same pattern, in both an area
for forming the drain signal and an area for forming the thin film
transistor; and after forming a second conductive layer, by using
the same mask, providing separation between the drain electrode and
the source electrode of the thin film transistor and also forming
the pixel electrode connected to the source electrode.
Inventors: |
Nakayama, Takanori; (Mobara,
JP) ; Ohta, Masuyuki; (Kariya, JP) ; Ando,
Masahiko; (Hitachinaka, JP) |
Correspondence
Address: |
TOWNSEND AND TOWNSEND AND CREW
TWO EMBARCADERO CENTER
EIGHTH FLOOR
SAN FRANCISCO
CA
94111-3834
US
|
Family ID: |
18537359 |
Appl. No.: |
09/764197 |
Filed: |
January 16, 2001 |
Current U.S.
Class: |
438/689 |
Current CPC
Class: |
G02F 1/134363
20130101 |
Class at
Publication: |
438/689 |
International
Class: |
H01L 021/302 |
Foreign Application Data
Date |
Code |
Application Number |
Jan 18, 2000 |
JP |
2000-009179 |
Claims
What is claimed is:
1. A method of manufacturing a liquid crystal display device
comprising a pair of substrates having a liquid crystal layer
disposed therebetween, a plurality of pixel areas provided on a
liquid-crystal-side surface of one of said pair of substrates, each
pixel area including a pixel electrode, a drain and a source
electrode formed in a layer overlying a semiconductor layer of a
thin film transistor, and a gate electrode disposed in a layer
underlying said semiconductor layer, each said pixel area having an
associated drain line for receiving a signal and applying said
signal to said pixel electrode via said drain and source electrodes
in response to a scanning signal applied to said gate electrode,
said method comprising: forming a stacked structure comprising a
first conductive layer disposed over said semiconductor layer, said
first conductive layer and said semiconductor layer having the same
pattern; forming a second conductive layer over said stacked
structure; and removing a portion of said second conductive layer
to form said pixel electrode and removing a portion of said stacked
structure to form a first portion separate from a second portion,
said first portion being said drain electrode, said second portion
being said source electrode, said pixel electrode being in
electrical communication with said source electrode.
2. The method of manufacturing a liquid crystal display device
according to claim 1 further including retaining a portion of said
second conductive layer that is disposed over said drain electrode
as a disconnection-preventing signal line.
3. The method of manufacturing the liquid crystal display device
according to claim 1 further including forming a contact layer
under said drain electrode and said source electrode.
4. The method of manufacturing the liquid crystal display device
according to claim 3 wherein said contact layer is a p-doped
semiconductor layer.
5. A method of forming a liquid crystal display device, comprising
the steps of: forming a gate line and a counter electrode on a face
of a substrate; forming an insulating film over said gate line and
said counter electrode; forming a semiconductor layer and a metal
layer over said insulating film; etching said semiconductor layer
and said metal layer to produce the same pattern; forming a
transparent conductive film over said semiconductor layer and said
metal layer; etching said transparent conductive film to form a
pixel electrode and to expose a portion of said metal layer; and
etching said exposed portion of said metal layer to form a drain
electrode and a source electrode; wherein said drain electrode is
separated from said source electrode and said source electrode is
connected to said pixel electrode.
6. The method of manufacturing the liquid crystal display device
according to claim 5 wherein said pixel electrode is a comb-shaped
structure, and said counter electrode is a stripe-shaped
structure.
7. The method of manufacturing the liquid crystal display device
according to claim 5 wherein said transparent conductive film is
ITO.
8. The method of manufacturing the liquid crystal display device
according to claim 5 wherein said transparent conductive film is
IZO.
9. A method of forming a display device, comprising the steps of:
forming a gate line and a counter voltage signal line on a face of
a substrate; forming an insulating film over said gate line and
said counter voltage signal line; forming a multi-layered structure
comprising a semiconductor layer disposed over said insulating film
and a metal layer disposed over said semiconductor layer; forming a
transparent conductive film over said multi-layered structure;
removing some of said transparent conductive film to form a pixel
electrode; removing some of said metal layer to form a drain
electrode and a source electrode; forming a protective film to
cover at least an area in which said pixel electrode is formed;
forming a counter electrode connected to said counter voltage
signal line on an upper surface of said protective film; wherein
said drain electrode is separate from said source electrode and
said source electrode is connected to said pixel electrode.
10. The method of manufacturing the liquid crystal display device
according to claim 9 wherein said pixel electrode is a comb-shaped
structure, and said counter electrode is a stripe-shaped
structure.
11. The method of manufacturing a liquid crystal display device
according to claim 9 wherein said removing said transparent
conductive film includes retaining a portion thereof as a
disconnection-preventing signal line formed on said drain
electrode, wherein said disconnection-preventin- g signal line is
the same material as that of said pixel electrode.
12. The method of manufacturing a liquid crystal display device
according to claim 9 wherein said semiconductor layer is an
amorphous silicon layer.
13. The method of manufacturing a liquid crystal display device
according to claim 9 wherein said transparent conductive film is
ITO.
14. The method of manufacturing a liquid crystal display device
according to claim 9 wherein said transparent conductive film is
IZO.
15. A method of manufacturing a liquid crystal display device which
includes at least one pixel area provided on a liquid-crystal-side
surface of one of a pair of substrates, a liquid crystal interposed
between said pair of substrates, a thin film transistor to be
driven by a scanning signal from a gate line, a pixel electrode for
receiving a video signal from a drain line supplied via said thin
film transistor; a counter electrode connected to a counter voltage
signal line for generating an electric field having a component
parallel to said substrates between said counter electrode and said
pixel electrode, said thin film transistor being a stacked
structure comprising a sequential stacking of a gate electrode, an
insulating film, a semiconductor layer, a drain electrode and a
source electrode, said gate electrode being connected to said gate
line, said drain electrode being connected to said drain line, said
source electrode being connected to said pixel electrode, said
manufacturing method comprising the steps of: forming said gate
line and said counter voltage signal line on a first surface of
said substrate; depositing said insulating film, said semiconductor
layer, and drain line; etching said semiconductor layer and said
drain line a first pattern; forming said source electrode and said
drain electrode connected to said drain line; forming said pixel
electrode connected to said source electrode, said pixel electrode
comprising a transparent conductive film; and forming a counter
electrode which is disposed over said pixel electrode with a
protective film interposed therebetween and is connected to said
counter voltage signal line.
16. The method of manufacturing the liquid crystal display device
according to claim 15 wherein said step of forming said pixel
electrode includes forming a disconnection-preventing signal line
superposed on said drain line.
17. The method of manufacturing the liquid crystal display device
according to claim 15 wherein said semiconductor layer is an
amorphous silicon layer.
18. The method of manufacturing the liquid crystal display device
according to claim 15 wherein said transparent conductive film is
ITO.
19. The method of manufacturing the liquid crystal display device
according to claim 15 wherein said transparent conductive film is
IZO.
20. The method of manufacturing the liquid crystal display device
according to claim 15 further including of forming a contact layer
on a surface of said semiconductor layer to provide separation
between said drain electrode and said source electrode of said thin
film transistor, forming said pixel electrode connected to said
source electrode, and etching a portion of said contact layer that
is exposed from said drain electrode and said source electrode.
Description
CROSS-REFERENCES TO RELATED APPLICATIONS
[0001] The present application is related to and claims priority
from Japanese Patent Application No. 2000-009179, filed on Jan. 18,
2000.
BACKGROUND OF THE INVENTION
[0002] The present invention relates to a method of manufacturing a
liquid crystal display device and, more particularly, to a method
of manufacturing a liquid crystal display device called In-Plane
Switching Mode.
[0003] A liquid crystal display device which is called "IPS mode
(In-Plane Switching Mode)" has a construction in which a pixel
electrode and a counter electrode which causes an electric field (a
lateral electric field) parallel to transparent substrates to be
generated between the counter electrode and the pixel electrode are
formed in each pixel on the liquid-crystal-side surface of one of
the transparent substrates disposed to oppose each other with a
liquid crystal interposed therebetween.
[0004] The in-plane switching mode of liquid crystal display device
is constructed so that the amount of light to be transmitted
through the area between the pixel electrode and the counter
electrode is controlled by the driving of the liquid crystal to
which the electric field is applied.
[0005] Such a liquid crystal display device is known as a type
which is superior in so-called wide viewing angle characteristics
which enable a displayed picture to remain unchanged even when its
display surface is observed from an oblique direction.
[0006] The pixel electrode and the counter electrode have so far
been formed of a conductive layer which does not transmit light
therethrough.
[0007] In recent years, a liquid crystal display device constructed
in the following manner has been known: a counter electrode made of
a transparent electrode is formed over the entire area of each
pixel area except the periphery thereof, and stripe-shaped pixel
electrodes made of transparent electrodes disposed to be extended
in one direction and to be juxtaposed in a direction transverse to
the one direction are formed over the counter electrode with an
insulating film interposed therebetween.
[0008] The liquid crystal display device having this construction
causes a lateral electric field to be generated between each pixel
electrode and the corresponding counter electrode, and is still
superior in wide viewing angle characteristics and is greatly
improved in aperture ratio.
[0009] Incidentally, this art is described, for example, in SID
(Society for Information Display) 99 DIGEST: pp. 202-205, or
Japanese Patent Laid-Open No. 202356/1999. However, in the case
where such in-plane switch mode is applied to an active matrix type
of liquid crystal display device, the number of manufacturing
steps, particularly, since the number of times of repetition of
selective etching using a photolithographic technique reaches
seven, it has been desired to decrease the number.
[0010] Since such a series of photolithographic techniques employs
different photomasks for its respective photolithographic cycles,
the positional deviation of the photomasks precludes the formation
of a high-resolution pixel structure, and a complicated process
cannot be avoided.
SUMMARY OF THE INVENTION
[0011] The present invention has been made on the basis of the
above-described circumstances, and provides a liquid crystal
display device which can be reduced in the number of manufacturing
steps.
[0012] A representative aspect of the invention disclosed in the
present application will be described below in brief.
[0013] According to the present invention, there is provided a
method of manufacturing a liquid crystal display device in which,
in each pixel area provided on a liquid-crystal-side surface of one
of a pair of substrates disposed to oppose each other with a liquid
crystal interposed therebetween, a signal from a drain line is
applied to a pixel electrode via a drain electrode and a source
electrode which are formed in a layer overlying a semiconductor
layer of a thin film transistor, by supply of a scanning signal
from a gate electrode which is positioned as an underlying layer
with respect to the semiconductor layer,
[0014] the manufacturing method comprising the steps of:
[0015] forming a stacked structure in which the semiconductor layer
and a first conductive layer are sequentially stacked in the same
pattern; and
[0016] after forming a second conductive layer over the stacked
structure, by using the same mask, providing separation between the
drain electrode and the source electrode of the thin film
transistor and also forming the pixel electrode connected to the
source electrode.
[0017] In the method of manufacturing the liquid crystal display
device constructed in this manner, the formation of the
semiconductor layer of the thin film transistor, the formation of
the drain line (the drain electrode and the source electrode) and
the formation of the pixel electrode can be completed in two steps
each, whereby it is possible to reduce the number of manufacturing
steps.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] The invention will become more readily appreciated and
understood from the following detailed description of preferred
embodiments of the invention when taken in conjunction with the
accompanying drawings, in which:
[0019] FIG. 1 is a plan view showing one embodiment of a pixel area
of a liquid crystal display device according to the present
invention;
[0020] FIG. 2 is a cross-sectional view taken along line II-II of
FIG. 1;
[0021] FIG. 3 is a process diagram showing one embodiment of a
method of manufacturing the liquid crystal display device according
to the present invention;
[0022] FIG. 4 is a process diagram showing another embodiment of
the method of manufacturing the liquid crystal display device
according to the present invention;
[0023] FIG. 5 is a process diagram showing another embodiment of
the method of manufacturing the liquid crystal display device
according to the present invention;
[0024] FIG. 6 is a process diagram showing another embodiment of
the method of manufacturing the liquid crystal display device
according to the present invention;
[0025] FIG. 7 is a process diagram showing another embodiment of
the method of manufacturing the liquid crystal display device
according to the present invention;
[0026] FIG. 8 is a table showing in list form other embodiments of
the method of manufacturing the liquid crystal display device
according to the present invention (inclusive of the
above-described embodiments);
[0027] FIG. 9 is a cross-sectional view showing one embodiment of
the layer structure of a pixel area of a liquid crystal display
device formed by the manufacturing method according to the present
invention;
[0028] FIG. 10 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0029] FIG. 12 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0030] FIG. 13 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0031] FIG. 14 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0032] FIG. 15 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0033] FIG. 16 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0034] FIG. 17 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0035] FIG. 18 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0036] FIG. 19 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention;
[0037] FIG. 20 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention; and
[0038] FIG. 21 is a cross-sectional view showing another embodiment
of the layer structure of the pixel area of the liquid crystal
display device formed by the manufacturing method according to the
present invention.
DESCRIPTION OF THE SPECIFIC EMBODIMENTS
[0039] Preferred embodiments of a method of manufacturing a liquid
crystal display device according to the present invention will be
described below with reference to the accompanying drawings.
[0040] Embodiment 1
[0041] Construction of Pixel
[0042] FIG. 1 is a plan view showing one pixel of a liquid crystal
display device to which the present invention is applied. FIG. 2 is
a cross-sectional view taken along line II-II of FIG. 1.
[0043] In FIG. 1, there is shown a transparent substrate SUB1. This
transparent substrate SUB 1 is a so-called TFT substrate which is
disposed to oppose a transparent substrate which is called a color
filter substrate (not shown) with a liquid crystal interposed
therebetween.
[0044] Gate lines GCR are formed over the liquid-crystal side
surface of the transparent substrate SUB1 in such a manner as to be
extended in the x-direction of FIG. 1 and to be juxtaposed in the
y-direction of FIG. 1, while a counter voltage signal line CCR is
formed over the same liquid-crystal side surface in such a manner
as to be extended in the x-direction of FIG. 1 between each of the
gate lines GCR. Each of the signal lines GCR and CCR is formed of
the same metal layer, for example, a Cr layer.
[0045] An insulating film GI made of, for example, a silicon
nitride film (SiN) is formed over the surface of the transparent
substrate SUB1 in such a manner as to cover all of the signal lines
GCR and CCR.
[0046] This insulating film GI has the function of an interlayer
insulating film for insulating drain lines DCR (to be described
later) from the gate lines GCR and the counter voltage signal lines
CCR. The insulating film GI also has the function of a gate
insulating film in each area in which a thin film transistor TFT
which will be described below is formed, as well as the function of
a dielectric film in each area in which a capacitance element Cstg
which will be described below is formed.
[0047] As shown in the bottom left portion of FIG. 1, the thin film
transistor TFT is formed over a portion of the gate line GCR of the
pixel area, and a semiconductor layer AS is formed on the
insulating film GI. This semiconductor layer AS is made of, for
example, amorphous silicon (a-Si), and a high-concentration
impurity layer which is doped with, for example, phosphorus (P) to
serve as a contact layer is formed on the surface of the
semiconductor layer AS.
[0048] Incidentally, this semiconductor layer AS is connected to
that of the thin film transistor TFT, and is also formed in the
area in which the drain line DCR which will be described later is
formed in order to strengthen the function of an interlayer
insulating film for insulating the drain line DCR from the gate
line GCR and the counter voltage signal line CCR.
[0049] A drain electrode SD2 and a source electrode SD1 are formed
on the upper surface of the semiconductor layer AS in the area in
which the thin film transistor TFT is formed, whereby an inverted
staggered structure MIS transistor is formed which uses a portion
of the gate line GCR as its gate electrode. The drain electrode SD2
is formed integrally with the drain line DCR which will be
described later.
[0050] Specifically, the drain line DCR which is disposed to be
extended in the y-direction of FIG. 1 is formed of, for example,
Cr, and a portion of the drain line DCR is formed to be extended to
the semiconductor layer AS lying in the area in which the thin film
transistor TFT is formed, whereby the drain electrode SD2 is
formed.
[0051] The source electrode SD1 which is formed to oppose the drain
electrode SD2 is formed by extending a portion of a pixel electrode
PX which is formed in nearly the whole area of the central portion
of the pixel area that excludes the peripheral narrow portion
thereof.
[0052] Incidentally, in this embodiment, the same metal layer as
the drain line DCR is formed to be interposed between the pixel
electrode PX and the semiconductor layer AS (refer to FIG. 2). This
pixel electrode PX is formed of, for example, a transparent
conductive film made of ITO (Indium-Tin-Oxide), and is formed to
avoid a portion of an area superposed on the counter voltage signal
line CCR. This portion serves as a location which provides
connection between a counter electrode CT and the counter voltage
signal line CCR.
[0053] A protective film PAS which is made of, for example, a
silicon nitride film (SiN) is formed over the whole area of the
surface processed in this manner, and a contact hole CH is formed
in the protective film PAS. The contact hole CH exposes a portion
of the area of the counter voltage signal line CCR on which the
pixel electrode PX is not superposed.
[0054] In addition, the counter electrode CT is formed on the
surface of the protective film PAS. This counter electrode CT is
made of, for example, a transparent conductive film made of ITO
(Indium-Tin-Oxide), and is connected to the counter voltage signal
line CCR through the contact hole CH.
[0055] The counter electrode CT is constructed of multiple
stripe-shaped electrodes formed to be extended in the y-direction
of FIG. 1 and to be juxtaposed in the x-direction of FIG. 1, and
the portion of the counter electrode CT that is superposed on the
counter voltage signal line CCR has a wide-area portion connected
to the counter voltage signal line CCR.
[0056] The capacitance element Cstg is formed in this portion, and
owing to the storage capacitance Cstg, the picture signal supplied
from the drain line DCR through the thin film transistor TFT is
stored in the pixel electrode PX for a long time when the thin-film
transistor TFT is turned off.
[0057] Manufacturing Method
[0058] FIGS. 3A to 3E are process diagrams showing one example of a
method of manufacturing the liquid crystal display device shown in
FIG. 1.
[0059] Step 1 (FIG. 3A)
[0060] The transparent substrate SUB1 is prepared, and a metal film
made of, example, Cr is formed over the entire liquid-crystal-side
surface of the transparent substrate SUB1. The metal film is formed
into a predetermined pattern by a selective etching method using a
photolithographic technique.
[0061] Thus, the gate line GCR which is extended in the x-direction
below the pixel area and the counter voltage signal line CCR which
is extended in the x-direction in the central portion of the pixel
area are formed over the surface of the transparent substrate
SUB1.
[0062] Step 2 (FIG. 3B)
[0063] The insulating film GI made of, for example, a silicon
nitride film (SiN) and the semiconductor layer AS made of amorphous
silicon (a-Si) are sequentially formed over the entire surface of
the transparent substrate SUB1 processed in this manner.
[0064] Incidentally, a contact layer doped with an impurity made
of, for example, phosphorus (P) is formed on the surface of the
semiconductor layer AS. In addition, a metal film made of, for
example, Cr is formed over the entire surface of the transparent
substrate SUB1.
[0065] Then, the metal film and the underlying semiconductor layer
AS are formed into a predetermined pattern by a selective etching
method using a photolithographic technique. The metal film and the
semiconductor layer AS are etched in bulk into the same
pattern.
[0066] Thus, the drain electrode SD2 and the source electrode SD1
which are integrally connected to each other are formed together
with the drain line DCR (the semiconductor layer AS is formed in
the same pattern below the drain electrode SD2 and the source
electrode SD1).
[0067] Step 3 (FIG. 3C)
[0068] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0069] Then, the transparent conductive film and the metal film are
formed into a predetermined pattern by a selective etching method
using a photolithographic technique. The mask used for this
photolithographic technique has a pattern including the drain line
DCR, the drain electrode SD2 and the source electrode SD1 of the
thin film transistor TFT, and the pixel electrode PX. These lines
and electrodes can be formed with one mask because they are not
formed in the state of being superposed on one another.
[0070] Specifically, a disconnection-preventing signal line to be
superposed on the drain line DCR and the pixel electrode PX are
formed by the selective etching of the transparent conductive film
by the use of the mask (during this time, the transparent
conductive film is etched along the patterns of the source
electrode SD1 and the drain electrode SD2 of the thin film
transistor TFT to be connected to the pixel electrode PX). Then,
the drain electrode SD2 and the source electrode SD1 of the thin
film transistor TFT are formed by the selective etching of the
metal film that underlies the transparent conductive film.
[0071] After that, the contact layer on the surface of the
semiconductor layer AS is etched by using the same mask. In this
step, the drain line DCR (as well as the drain electrode SD2) is
formed as part of a stacked structure in which the metal layer and
the transparent conductive film and the drain line DCR are stacked
in that order. Owing to this step, the disconnection-preventing
signal line is formed in the state of being superposed on the drain
line DCR, whereby it is possible to greatly decrease the
probability that disconnection occurs in the drain line DCR.
[0072] Incidentally, the pixel electrode PX needs to be formed in a
pattern which partly includes an area which is not superposed on
the counter voltage signal line CCR. This portion is intended to
provide connection between the counter voltage signal line CCR and
the counter electrode CT which will be formed in a later step.
[0073] Step 4 (FIG. 3D)
[0074] The protective film PAS made of, for example, a silicon
nitride film (SiN) is formed over the entire surface of the
transparent substrate SUB1 processed in this manner.
[0075] Then, the contact hole CH is formed in the area in which the
pixel electrode PX is not formed above the counter voltage signal
line CCR, by a selective etching method using a photolithographic
technique.
[0076] At the same time, openings in which to expose the terminals
of the drain line DCR, the gate line GCR and the counter voltage
signal line CCR are also formed in a portion except the pixel
area.
[0077] Step 5 (FIG. 3E)
[0078] A transparent conductive film made of, for example, ITO is
formed over the entire surface of the transparent substrate SUB1
processed in this manner, and the transparent conductive film is
formed into a predetermined pattern by a selective etching method
using a photolithographic technique, whereby the counter electrode
CT is formed.
[0079] The counter electrode CT is formed to be superposed on the
pixel electrode PX, and is formed of multiple stripe-shaped
electrodes formed to be extended in the y-direction of FIG. 3E and
to be juxtaposed in the x-direction of FIG. 3E.
[0080] Then, each of the stripe-shaped electrodes is connected to
the others so that the area of the portion of the counter electrode
CT that is superposed on the counter voltage signal line CCR is
increased (for the purpose of forming the capacitance element
cstg), and the counter electrode CT is connected to the counter
voltage signal line CCR through the contact hole CH formed in the
protective film PAS.
[0081] The method of manufacturing the liquid crystal display
device constructed in this manner is completed by repeating five
times the selective etching method using the photolithographic
technique. Accordingly, it is possible to reduce the number of
steps of the manufacturing process.
[0082] Embodiment 2
[0083] FIGS. 4A to 4E are process diagrams showing another
embodiment of the liquid crystal display device according to the
present invention.
[0084] Step 1 (FIG. 4A)
[0085] The transparent substrate SUB1 is prepared, and a metal film
made of, example, Cr is formed over the entire liquid-crystal-side
surface of the transparent substrate SUB1.
[0086] Thus, the gate line GCR and the counter voltage signal line
CCR are formed.
[0087] Step 2 (FIG. 4B)
[0088] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1, and then the transparent conductive
film is formed into a predetermined pattern by a selective etching
method using a photolithographic technique.
[0089] Thus, the counter electrode CT connected to the counter
voltage signal line CCR is formed over the central portion of the
pixel area that excludes the peripheral narrow portion thereof.
[0090] Step 3 (FIG. 4C)
[0091] The insulating film GI made of, for example, a silicon
nitride film (SiN) and the semiconductor layer AS made of amorphous
silicon (a-Si) are sequentially formed over the entire surface of
the transparent substrate SUB1 processed in this manner.
[0092] Incidentally, a contact layer doped with an impurity made
of, for example, phosphorus (P) is formed on the surface of the
semiconductor layer AS. In addition, a metal film made of, for
example, Cr is formed over the entire surface of the transparent
substrate SUB1.
[0093] Then, the metal film and the underlying semiconductor layer
AS are formed into a predetermined pattern by a selective etching
method using a photolithographic technique. The metal film and the
semiconductor layer AS are etched in bulk into the same
pattern.
[0094] Thus, the drain electrode SD2 and the source electrode SD1
which are integrally connected to each other are formed together
with the drain line DCR (the semiconductor layer AS is formed in
the same pattern below the drain electrode SD2 and the source
electrode SD1).
[0095] Step 4 (FIG. 4D)
[0096] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0097] Then, the transparent conductive film and the metal film are
formed into a predetermined pattern by a selective etching method
using a photolithographic technique. The mask used for this
photolithographic technique has a pattern including the drain line
DCR, the drain electrode SD2 and the source electrode SD1 of the
thin film transistor TFT, and the pixel electrode PX. These lines
and electrodes can be formed with one mask because they are not
formed in the state of being superposed on one another.
[0098] Specifically, a disconnection-preventing signal line to be
superposed on the drain line DCR and the pixel electrode PX are
formed by the selective etching of the transparent conductive film
by the use of the mask (during this time, the transparent
conductive film is etched along the patterns of the source
electrode SD1 and the drain electrode SD2 of the thin film
transistor TFT to be connected to the pixel electrode PX). Then,
the drain electrode SD2 and the source electrode SD1 of the thin
film transistor TFT are formed by the selective etching of the
metal film that underlies the transparent conductive film.
[0099] The pixel electrode PX is formed of multiple stripe-shaped
electrodes formed to be extended in the y-direction of FIG. 4D and
to be juxtaposed in the x-direction of FIG. 4D, and the portion of
the pixel electrode PX that is superposed on the counter voltage
signal line CCR has a comparatively large area. At this portion,
the capacitance element Cstg is formed.
[0100] After that, the contact layer on the surface of the
semiconductor layer AS is etched by using the same mask.
[0101] Step 5 (FIG. 4E)
[0102] The protective film PAS made of, for example, a silicon
nitride film (SiN) is formed over the entire surface of the
transparent substrate SUB 1 processed in this manner.
[0103] Then, openings for exposing the terminals of the drain line
DCR, the gate line GCR and the counter voltage signal line CCR are
formed in a portion except the pixel area by a selective etching
method using a photolithographic technique.
[0104] The method of manufacturing the liquid crystal display
device constructed in this manner is completed by repeating five
times the selective etching method using the photolithographic
technique, whereby it is possible to reduce the number of steps of
the manufacturing process.
[0105] Embodiment 3
[0106] FIGS. 5A to 5F are process diagrams showing another
embodiment of the method of manufacturing the liquid crystal
display device according to the present invention.
[0107] Step 1 (FIG. 5A)
[0108] The transparent substrate SUB1 is prepared, and a metal film
made of, example, Cr is formed over the entire liquid-crystal-side
surface of the transparent substrate SUB1, and the metal film is
formed into a predetermined pattern by a selective etching method
using a photolithographic technique.
[0109] Thus, the gate line GCR and the counter voltage signal line
CCR are formed.
[0110] Step 2 (FIG. 5B)
[0111] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1, and then the transparent conductive
film is formed into a predetermined pattern by a selective etching
method using a photolithographic technique.
[0112] Thus, the counter electrode CT connected to the counter
voltage signal line CCR is formed over the central portion of the
pixel area that excludes the peripheral narrow portion thereof.
[0113] Step 3 (FIG. 5C)
[0114] An insulating film made of, for example, a silicon nitride
film (SiN) is formed over the entire surface of the transparent
substrate SUB1.
[0115] After that, openings for exposing the terminals of the gate
line GCR and the counter voltage signal line CCR are formed in a
portion except the pixel area by a selective etching method using a
photolithographic technique.
[0116] Step 4 (FIG. 5C)
[0117] The insulating film GI made of, for example, a silicon
nitride film (SiN) and the semiconductor layer AS made of amorphous
silicon (a-Si) are sequentially formed over the entire surface of
the transparent substrate SUB1 processed in this manner.
[0118] Incidentally, a contact layer doped with an impurity made
of, for example, phosphorus (P) is formed on the surface of the
semiconductor layer AS. In addition, a metal film made of, for
example, Cr is formed over the entire surface of the transparent
substrate SUB1.
[0119] Then, the metal film and the underlying semiconductor layer
AS are formed into a predetermined pattern by a selective etching
method using a photolithographic technique. The metal film and the
semiconductor layer AS are etched in bulk into the same
pattern.
[0120] Thus, the drain electrode SD2 and the source electrode SD1
which are connected to each other are formed together with the
drain line DCR (the semiconductor layer AS is formed in the same
pattern below the drain electrode SD2 and the source electrode
SD1).
[0121] Step 5 (FIG. 5E)
[0122] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0123] Then, the transparent conductive film and the metal film are
formed into a predetermined pattern by a selective etching method
using a photolithographic technique. The mask used for this
photolithographic technique has a pattern including the drain line
DCR, the drain electrode SD2 and the source electrode SD1 of the
thin film transistor TFT, and the pixel electrode PX.
[0124] Specifically, the drain line DCR and the pixel electrode PX
are formed by the selective etching of the transparent conductive
film using the mask (in this case, etching is effected along the
patterns of the source electrode SD1 and the drain electrode SD2 to
be connected to the pixel electrode PX), and the drain electrode
SD2 and the source electrode SD1 of the thin film transistor TFT
are formed by the selective etching of the metal film which
underlies the transparent conductive film.
[0125] After that, the contact layer on the surface of the
semiconductor layer AS is etched by using the same mask.
[0126] Step 6 (FIG. 5F)
[0127] The protective film PAS made of, for example, a silicon
nitride film (SiN) is formed over the entire surface of the
transparent substrate SUB1 processed in this manner.
[0128] Then, openings for exposing the terminals of the drain line
DCR, the gate line GCR and the counter voltage signal line CCR are
formed in a portion except the pixel area by a selective etching
method using a photolithographic technique.
[0129] The method of manufacturing the liquid crystal display
device constructed in this manner is completed by repeating five
times the selective etching method using the photolithographic
technique, whereby it is possible to reduce the number of steps of
the manufacturing process.
[0130] Embodiment 4
[0131] FIGS. 6A to 6F are process diagrams showing another
embodiment of the method of manufacturing the liquid crystal
display device according to the present invention.
[0132] Step 1 (FIG. 6A)
[0133] The transparent substrate SUB1 is prepared, and a metal film
made of, example, Cr is formed over the entire liquid-crystal-side
surface of the transparent substrate SUB1, and the metal film is
formed into a predetermined pattern by a selective etching method
using a photolithographic technique.
[0134] Thus, the gate line GCR and the counter voltage signal line
CCR are formed.
[0135] Step 2 (FIG. 6B)
[0136] The insulating film GI made of, for example, a silicon
nitride film (SiN) and the semiconductor layer AS made of amorphous
silicon (a-Si) are sequentially formed over the entire surface of
the transparent substrate SUB1 processed in this manner.
[0137] Incidentally, a high-concentration impurity layer for
formation of a contact layer doped with an impurity made of, for
example, phosphorus (P) is formed on the surface of the
semiconductor layer AS.
[0138] Then, the semiconductor layer AS is formed into a
predetermined pattern by a selective etching method using a
photolithographic technique.
[0139] Thus, the semiconductor layer AS is left in an area in which
to form the thin film transistor TFT and in an area in which to
form the drain line DCR.
[0140] The reason why the semiconductor layer AS is allowed to
remain in the area in which to form the drain line DCR is to
improve the function of an interlayer insulating film for
insulating the drain line DCR (to be formed later) from the gate
line GCR and the counter voltage signal line CCR.
[0141] Step 3 (FIG. 6C)
[0142] A metal film made of, for example, Cr is formed over the
entire surface of the transparent substrate SUB1.
[0143] Then, the metal film is formed into a predetermined pattern
by a selective etching method using a photolithographic technique,
thereby forming the drain line DCR and the drain electrode SD2 and
the source electrode SD1 of the thin film transistor TFT.
[0144] Step 4 (FIG. 6D)
[0145] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0146] Then, the transparent conductive film is formed into a
predetermined pattern by a selective etching method using a
photolithographic technique, thereby forming the pixel electrode PX
and a disconnection-preventing signal line.
[0147] The pixel electrode PX is formed to be connected to the
source electrode SD1 of the thin film transistor TFT. Excepting a
part of the portion of the pixel electrode PX that is superposed on
the counter voltage signal line CCR, the pixel electrode PX is
formed over the entire area of the central portion of the pixel
area that excludes the peripheral narrow portion thereof, and the
disconnection-preventing signal line is formed to be superposed on
the drain line DCR.
[0148] After that, the high-concentration impurity layer formed on
the surface of the semiconductor layer AS is etched by using as a
mask the drain electrode SD2 and the source electrode SD1 of the
thin film transistor TFT.
[0149] Step 5 (FIG. 6E)
[0150] The protective film PAS made of, for example, a silicon
nitride film (SiN) is formed over the entire surface of the
transparent substrate SUB1 processed in this manner.
[0151] The contact hole CH which exposes a portion of the area of
the counter voltage signal line CCR over which the pixel electrode
PX is not formed is formed in the protective film PAS by a
selective etching method using a photolithographic technique.
[0152] At the same time, openings for exposing the terminals of the
drain line DCR, the gate line GCR and the counter voltage signal
line CCR are formed in a portion except the pixel area.
[0153] Step 6 (FIG. 6F)
[0154] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0155] Then, the transparent conductive film is formed into a
predetermined pattern by a selective etching method using a
photolithographic technique, thereby forming the counter electrode
CT.
[0156] The counter electrode CT is formed to be connected to the
counter voltage signal line CCR through the contact hole CH and to
be superposed on the pixel electrode PX. The counter electrode CT
is formed of multiple stripe-shaped electrodes disposed to be
extended in the y-direction of FIG. 6F and to be juxtaposed in the
x-direction of FIG. 6F.
[0157] The method of manufacturing the liquid crystal display
device constructed in this manner is completed by repeating five
times the selective etching method using the photolithographic
technique, whereby it is possible to reduce the number of steps of
the manufacturing process.
[0158] Embodiment 5
[0159] FIGS. 7A to 7F are process diagrams showing another
embodiment of the method of manufacturing the liquid crystal
display device according to the present invention.
[0160] Step 1 (FIG. 7A)
[0161] The transparent substrate SUB1 is prepared, and a metal film
made of, example, Cr is formed over the entire liquid-crystal-side
surface of the transparent substrate SUB1, and the metal film is
formed into a predetermined pattern by a selective etching method
using a photolithographic technique.
[0162] Thus, the gate line GCR and the counter voltage signal line
CCR are formed.
[0163] Step 2 (FIG. 7B)
[0164] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0165] Then, the transparent conductive film and the metal film are
formed into a predetermined pattern by a selective etching method
using a photolithographic technique, thereby forming the counter
electrode CT connected to the counter voltage signal line CCR.
[0166] Step 3 (FIG. 7C)
[0167] The insulating film GI made of, for example, a silicon
nitride film (SiN) and the semiconductor layer AS made of amorphous
silicon (a-Si) are sequentially formed over the entire surface of
the transparent substrate SUB1 processed in this manner.
[0168] Incidentally, a high-concentration impurity layer for
formation of a contact layer doped with an impurity made of, for
example, phosphorus (P) is formed on the surface of the
semiconductor layer AS.
[0169] Then, the semiconductor layer AS is formed into a
predetermined pattern by a selective etching method using a
photolithographic technique.
[0170] Step 4 (FIG. 7D)
[0171] In addition, a metal film made of, example, Cr is formed
over the entire liquid-crystal-side surface of the transparent
substrate SUB1.
[0172] Then, the metal film is formed into a predetermined pattern
by a selective etching method using a photolithographic technique,
thereby forming the drain line DCR and the drain electrode SD2 and
the source electrode SD1 of the thin film transistor TFT.
[0173] After that, the high-concentration impurity layer formed on
the surface of the semiconductor layer AS is etched by using as a
mask the drain electrode SD2 and the source electrode SD1 of the
thin film transistor TFT.
[0174] Step 5 (FIG. 7E)
[0175] The protective film PAS made of, for example, a silicon
nitride film (SiN) is formed over the entire surface of the
transparent substrate SUB 1 processed in this manner.
[0176] The contact hole CH which exposes a portion of the source
electrode SD1 of the thin film transistor TFT is formed in the
protective film PAS by a selective etching method using a
photolithographic technique.
[0177] At the same time, openings for exposing the terminals of the
drain line DCR, the gate line GCR and the counter voltage signal
line CCR are formed in a portion except the pixel area.
[0178] Step 6 (FIG. 7F)
[0179] A transparent conductive film made of, for example, ITO
(Indium-TinOxide) is formed over the entire surface of the
transparent substrate SUB1.
[0180] Then, the transparent conductive film is formed into a
predetermined pattern by a selective etching method using a
photolithographic technique, thereby forming the pixel electrode
PX.
[0181] The pixel electrode PX is formed to be connected to the
source electrode SD1 of the thin film transistor TFT through the
contact hole CH and to be superposed on the counter electrode
CT.
[0182] Then, the pixel electrode PX is formed of multiple
stripe-shaped electrodes disposed to be extended in the y-direction
of FIG. 7F and to be juxtaposed in the x-direction of FIG. 7F.
[0183] Other Embodiments
[0184] Although the above-described embodiments have been referred
to as representative examples, there are various other embodiments.
Such various other embodiments as well as the above-described
embodiments are listed in FIG. 8
[0185] The table of FIG. 8 shows in list form layer structures each
formed by the method of manufacturing the liquid crystal display
device according to the present invention, the number of times of
repetition of selective etching using a photolithographic
technique, which selective etching is utilized for the
manufacturing of each of the layer structures (the number of times
of repetition of photolithography), and characteristic means which
contributes to a reduction in the number of times of repetition of
photolithography (means for reducing the number of times of
repetition of photolithography).
[0186] In the table, the term "DCR/ASI bulk process" signifies the
process of sequentially stacking the insulating film GI, the
semiconductor layer AS and the metal layer and effecting selective
etching of the metal layer and the underlying semiconductor layer
AS in accordance with the same pattern and, at the same time,
forming the drain electrode SD2 and the source electrode SD1 in an
integrally interconnected state over the semiconductor layer AS in
the area in which to form the thin film transistor TFT.
[0187] As described previously, the separation between the drain
electrode SD2 and the source electrode SD1 can be effected by
selective etching which is performed when the pixel electrode PX is
being formed at a later step.
[0188] The term "PAS/SIN bulk process" signifies the process of
forming the insulating film GI and further the protective film PAS
thereon and then sequentially effecting selective etching of the
protective film PAS and the insulating film GI in each of areas in
which to form the respective terminals of the signal lines, and, at
the same time, forming openings such as contact holes in the
protective film PAS if such openings need to be formed.
[0189] In FIG. 8, the respective manufacturing methods are denoted
by No. 1 to No. 22, and the manufacturing methods No. 4, No. 6, No.
11, No. 13 and No. 14 correspond to the above-described Embodiments
1 to 5 shown in FIGS. 3, 6, 7, 4 and 5.
[0190] The respective layer structures of the pixel areas formed by
the individual manufacturing methods are shown in FIGS. 9 to 21.
The number or numbers shown in each of the figures indicate the
layer structure formed by the manufacturing method or methods
denoted by the corresponding one or ones of the numbers shown in
FIG. 8.
[0191] Incidentally, each of FIGS. 9 to 21 shows a cross-sectional
view of the same portion of the pixel shown in FIG. 1.
[0192] As is apparent from the foregoing description, in accordance
with the method of manufacturing the liquid crystal display device
according to the present invention, it is possible to reduce the
number of manufacturing steps.
* * * * *