U.S. patent application number 09/769234 was filed with the patent office on 2001-05-24 for power efficient line driver.
Invention is credited to Ahuja, Bhupendra K., Delano, Cary L., Tripathi, Adya S..
Application Number | 20010001546 09/769234 |
Document ID | / |
Family ID | 26821666 |
Filed Date | 2001-05-24 |
United States Patent
Application |
20010001546 |
Kind Code |
A1 |
Ahuja, Bhupendra K. ; et
al. |
May 24, 2001 |
Power efficient line driver
Abstract
A signal processing circuit is described including a frequency
selective network in a feedback loop. An analog-to-analog converter
in the feedback loop is coupled to the frequency selective network.
A continuous-time feedback path provides feedback from the output
terminal of the analog-to-analog converter to the frequency
selective network.
Inventors: |
Ahuja, Bhupendra K.;
(Fremont, CA) ; Delano, Cary L.; (San Jose,
CA) ; Tripathi, Adya S.; (San Jose, CA) |
Correspondence
Address: |
BEYER WEAVER & THOMAS LLP
P.O. BOX 778
BERKELEY
CA
94704-0778
US
|
Family ID: |
26821666 |
Appl. No.: |
09/769234 |
Filed: |
January 24, 2001 |
Related U.S. Patent Documents
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Application
Number |
Filing Date |
Patent Number |
|
|
09769234 |
Jan 24, 2001 |
|
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|
09432507 |
Nov 2, 1999 |
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Current U.S.
Class: |
330/109 |
Current CPC
Class: |
H03F 1/0244 20130101;
H03F 2200/331 20130101; H03H 11/1217 20130101 |
Class at
Publication: |
330/109 |
International
Class: |
H03F 001/36 |
Claims
What is claimed is:
1. A signal processing circuit, comprising: an n.sup.th order
distortion filter in a feedback loop, n being greater than one; an
amplifier in the feedback loop coupled to the distortion filter,
the amplifier having an output terminal, the amplifier introducing
nonlinearities into the feedback loop; and a linear,
continuous-time feedback path from the output terminal of the
amplifier to the distortion filter, the continuous-time feedback
path comprising at least one feedback element which determines a
coefficient for at least one stage of the distortion filter.
Description
RELATED APPLICATION DATA
[0001] The present application claims priority from U.S. patent
application Ser. No. 09/432,507 for POWER EFFICIENT LINE DRIVER
filed on Nov. 2, 1999, which claims priority from U.S. Provisional
patent application Ser. No. 60/123,549 for POWER EFFICIENT LINE
DRIVER filed on Mar. 9, 1999, the entireties of both of which are
incorporated herein by reference for all purposes.
BACKGROUND OF THE INVENTION
[0002] The present invention relates to signal processing
techniques for providing high fidelity signal amplification with
high power efficiency. More specifically, the present invention
provides techniques by which distortion in all classes of
amplifiers including, for example, power supply transitioning
artifact in a class G amplifier, may be reduced to provide a low
distortion output signal.
[0003] In general, improvements in the power efficiency of
electronic amplifiers and line drivers are desirable. In
communications, a line driver is used to drive telecom or datacom
signals on physical interfaces such as, for example, subscriber
loop copper lines. Likewise, in audio/industrial applications,
electronic amplifiers are used to drive speakers or other
electrical loads. Power transfer efficiency is a critical design
issue especially for applications characterized by a high
peak-to-average power ratio such as, for example, the driving of
copper subscriber loops or high fidelity audio loudspeakers. In
such applications, it is not unusual for output power levels to
range from a few hundred milliwatts to tens or even hundreds of
watts. It is also typical for such applications that the peak
output power far exceeds the average power delivered to the load,
i.e., that the periods of high power dissipation constitute a
relatively small percentage of the operating time of the driver or
amplifier. And, even though it far exceeds the output voltage swing
for the great majority of circuit operation, the supply voltage
must be large enough to exceed the output voltage swing during
periods of peak power dissipation in order to keep high signal
fidelity (or low distortion). Thus, during periods in which the
output voltage swing is relatively low, i.e., most of the time, the
efficiency of the circuit is very low due to the fact that the
supply voltage is much greater than it needs to be.
[0004] Power efficiency is further degraded due to the fact that
supply voltages tend to be set significantly higher than the
predicted peak output voltage swing to maintain output signal
distortion within acceptable limits. That is, as the output voltage
of an amplifier approaches the power supply rails, signal
distortion tends to increase dramatically. As a result, most
circuit designers tend to use supply voltages which exceed the
expected peak output voltage swing by as much as 20% or more.
[0005] An example of the inefficiency of an application in which
the peak-to-average power ratio is 5 will be instructive. If the
average power transmitted is 200 mW into a 50 ohm load, the RMS
value of the output voltage is 3.162 volts and the average peak
value is 1.4142 * 3.162=4.47 volts. That is, most of the time, the
output signal swings between .+-.4.47 volts. For a peak-to-average
ratio of 5, this means that the output voltage can swing as high as
5 * 3.162=15.81 volts. To maintain appropriately low distortion
levels during periods of peak power dissipation, such a peak output
voltage justifies the use of a +15 volt supply. This results in a
dissipation of greater than 800 mW to deliver 200 mW into the load.
Thus, in such a configuration, even a well designed class AB
amplifier will operate at less than 20% efficiency.
[0006] Class D amplifiers, i.e., switching amplifiers, address the
problem of power efficiency but, in general, are characterized by
more signal distortion than comparable analog amplifiers,
especially as the output signal swing approaches the power supply
rails. In addition, such amplifiers are particularly susceptible to
degradation from electromagnetic interference (EMI). A switching
amplifier has been developed by Tripath Technology, Inc. of Santa
Clara, Calif., which improves upon switching amplifier technology
generating output signals having distortion levels comparable with
high fidelity analog amplifiers. An example of such a switching
amplifier is described in U.S. Pat. No. 5,777,512 for METHOD AND
APPARATUS FOR OVERSAMPLED, NOISE-SHAPING, MIXEDSIGNAL PROCESSING
issued Jul. 7, 1998, the entirety of which is incorporated herein
by reference for all purposes.
[0007] However, at switching frequencies significantly above audio
bandwidths, the oversampling employed by the improved switching
amplifier of the above-referenced patent may result in switching
losses which begin to undermine power efficiency gains. That is,
for communications applications such as ISDN and the various xDSL
standards where bandwidths range from 30 kHz to 1.2 MHz, the
switching losses in the output devices in switching applications
may be unacceptably high; particularly for a switching technique
which relies on oversampling and thus has an even higher switching
rate than standard switching techniques.
[0008] One approach to improving power efficiency for high
peak-to-average ratio applications has been the so called Class G
amplifier for which the output signal remains analog in nature. SGS
Thompson has used this class of amplifiers for audio applications,
an example of which is shown in FIG. 1. During operation, amplifier
102 is alternately connected to two different supply voltages .+-.5
V and +15 V. When the output peak signal is less than roughly 4.3 V
(depending upon the voltage of zener diode 104), then the .+-.5 V
supply is connected to amplifier 102 via diode 112. When the output
peak signal exceeds 5 volts less the voltage of diode 104, then the
+15 V supply is connected to amplifier 102 via NPN transistor 108.
That is, when the output signal is below a certain level, amplifier
102 is connected to the .+-.5 V supply via diodes 112 and 114. When
the output voltage rises high enough, amplifier 102 is connected to
the .+-.15 V supply.
[0009] Through the power supply switching technique described with
reference to FIG. 1, a class G amplifier can improve power
efficiency by varying degrees depending upon how often the signal
is diverting power to 5 V. A class G amplifier always has a higher
average efficiency than a class AB amplifier if the signal being
passed is not a DC signal greater than some threshold.
Unfortunately, while this improvement can be significant, there is
a corresponding increase in output signal distortion due to the
power supply transition noise coupling into the circuit. This
coupling can also be mixed to other frequencies by the
nonlinearities of the amplifier/output stage. In communications
applications, increased signal distortion leads to an increased bit
error rate. In audio applications, increased distortion leads to a
perceptible degradation in sound quality. Thus, despite its power
efficiency improvements, the standard class G amplifier is
unacceptable for applications in which signal distortion must be
kept low.
[0010] Another tradeoff in linear amplifier design is bias current
vs. linearity. Generally speaking, a higher bias current results in
a more linear output. By contrast, reducing bias current, while
improving power efficiency, results in increased distortion as the
load gets smaller. This is a classical and well documented tradeoff
in the design of a variety of amplifier classes, e.g., class A, AB,
etc.
[0011] It is therefore desirable to provide an amplifier topology
with an increased power efficiency which generates an output signal
with low enough distortion, for example, for use in communications,
high fidelity audio applications, and in any application with a
high peak-to-average ratio.
SUMMARY OF THE INVENTION According to the present invention, an
improved amplifier topology is provided which may be used to
improve the performance of amplifiers of any class including, for
example, class A, B, AB, C, D, E, F, G, and H. The amplifier
topology of the present invention employs a noise shaping technique
to reduce output signal distortion significantly with respect to an
equivalent standard amplifier while maintaining a high power
efficiency.
[0012] The amplifier of the present invention is configured in a
feedback loop with a distortion filter which employs
continuous-time feedback from the output of the amplifier to shape
the noise characteristic of the input to the amplification stage.
The noise shaping provided by the distortion filter reduces the
consequences of the tradeoff between bias current and distortion
discussed above. That is, because the distortion filter results in
very low levels of distortion, bias current may be reduced for a
given linearity thereby resulting in a corresponding improvement in
power efficiency.
[0013] According to a specific embodiment, the distortion filter
comprises one or more integrator (or resonator) stages each of
which receives continuous-time feedback scaled with an appropriate
feedback coefficient. By properly selecting the feedback
coefficients the forward transfer function of the feedback loop is
made equal to the gain value of the amplification stage of the
amplifier in the frequency band of interest. This results in
significant attenuation of distortion within the same band.
[0014] Thus, according to the invention, a signal processing
circuit is provided which includes a frequency selective network in
a feedback loop. An analog-to-analog converter in the feedback loop
is coupled to the frequency selective network. A continuous-time
feedback path provides feedback from the output terminal of the
analog-to-analog converter to the frequency selective network.
[0015] According to a specific embodiment, the frequency selective
network comprises a distortion filter having a plurality of stages.
According to a more specific base band embodiment, the plurality of
stages of the distortion filter comprises a plurality of
integrators. According to an alternate band pass embodiment, the
plurality of stages comprises a plurality of resonators.
[0016] As mentioned above, the present invention may be employed
with any of a variety of amplifier/driver classes. Thus, according
to various embodiments, the analog-to-analog converter comprises
amplifiers/drivers of class A, AB, B, C, E, F, G, and H.
[0017] A further understanding of the nature and advantages of the
present invention may be realized by reference to the remaining
portions of the specification and the drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
[0018] FIG. 1 is a representation of a standard class G
amplifier;
[0019] FIG. 2a is a simplified schematic of an audio amplifier;
[0020] FIG. 2b is a simplified schematic of an ADSL line driver
driving a subscriber loop;
[0021] FIG. 3 is a diagram of an improved amplifier with a second
order distortion filter according to a specific embodiment of the
invention;
[0022] FIG. 4 is a diagram of an improved amplifier with an nth
order distortion filter according to a specific embodiment of the
invention;
[0023] FIG. 5 is a graph illustrating attenuation of distortion
according to a specific embodiment of the invention;
[0024] FIG. 6a is a diagram of an ideal integrator;
[0025] FIG. 6b is a diagram of an op amp RC integrator with a
single ended output;
[0026] FIG. 6c is a diagram of an op amp RC integrator with a
differential output;
[0027] FIG. 7 is a diagram of an improved ADSL differential line
driver with a third order distortion filter according to a specific
embodiment of the invention;
[0028] FIGS. 8a and 8b are graphs illustrating attenuation of
distortion according to a specific embodiment of the invention;
[0029] FIGS. 9a, 9b and 9c are diagrams of alternative Class G
amplifiers which may be implemented with a distortion filter
according to various embodiments of the invention;
[0030] FIG. 10 is a diagram of a resonator-based amplifier/line
driver designed according to a specific embodiment of the
invention; and
[0031] FIG. 11 is a block diagram of a generalized embodiment of
the present invention.
DESCRIPTION OF SPECIFIC EMBODIMENTS
[0032] The techniques of the present invention may be applied to
any class of amplifier or line driver including classes A, B, AB,
C, D, E, F, G, and H. Generalized embodiments of the invention will
be discussed first. Then a specific embodiment of the invention
implemented as a class G amplifier will be described. When
amplifiers and line drivers are used to deliver power to a low
impedance load, a low distortion design becomes challenging.
Examples of an amplifier and a line driver driving low impedance
loads are shown in FIGS. 2a and 2b, respectively. In FIG. 2a, audio
amplifier 202 having a gain A=5 drives a 4 ohm loudspeaker. In FIG.
2b, an ADSL line driver (drivers 212 and 214) having a gain A=5
drives an effective load of 25 ohms. The present invention provides
techniques for improving the linearity of such amplifiers and line
drivers when driving such low impedance loads.
[0033] FIG. 3 is a diagram of an improved amplifier/line driver 300
with a second order distortion filter according to a specific
embodiment of the invention. The distortion filter comprises two
integrator stages 302-0 and 302-1 which employ continuous-time
feedback from the output Y of amplifier 300 via gain elements 304-0
and 304-1 and 306. The distortion in the output Y is modeled as a
summation of the ideal output from amplifier/driver stage 308 and a
distortion term D at summing junction 310. Using this model, the
transfer functions for output Y to input X and for output Y to
distortion term D are as follows:
Y(s)/X(s)=A/(s*s+s*a.sub.1+a.sub.0) (1)
Y(s)/D(s)=s*s/(s*s+s*a.sub.1+a.sub.0) (2)
[0034] where A is the gain of amplifier/driver stage 308;
[0035] a.sub.1 are feedback coefficients (represented by gain
stages 304); and
[0036] s is the Laplace operator for frequency domain
representation.
[0037] FIG. 4 is a diagram of an improved amplifier/line driver 400
with a generalized n.sup.th order distortion filter according to a
specific embodiment of the invention. The distortion filter
comprises n integrator stages 402-0 through 402-(n-1) which employ
continuous-time feedback from the output Y of amplifier 400 via
gain stages 404-0 through 404-(n-1) and 406. The distortion in the
output Y is modeled as a summation of the ideal output from
amplifier stage 408 and a distortion term D at summing junction
410. Using this model, and ignoring for the moment the feed forward
path, the transfer functions for output Y to input X and for output
Y to distortion term D are as follows:
Y(s)/X(s)A/(s.sup.n+s.sup.n--1*a.sub.n--1+s.sup.n--2*a.sub.n--2+. .
. +s*a.sub.1+a.sub.0) (3)
Y(s)/D(s)=s.sup.n/(s.sup.n+s.sup.n--1*a.sub.n--1+s.sup.n--2*a.sub.n--2+.
. . +s*a.sub.1+a.sub.0) (4)
[0038] where A is the gain of amplifier stage 408;
[0039] a.sub.i are feedback coefficients (represented by gain
stages 404); and
[0040] s is the Laplace operator for frequency domain
representation.
[0041] For each of the above-described embodiments, appropriate
feedback coefficients, a.sub.1, are selected such that the transfer
function Y(s)/X(s) is made equal to the amplifier stage gain A in
the band of interest. The result is attenuation of the distortion
term D in the band of interest as shown in FIG. 5. It is apparent
that equations (1) and (3) describe low pass filter characteristics
while equations (2) and (4) describe high pass filter
characteristics. Thus, for either embodiment, a scaled version of
input signal X is faithfully reproduced at the output while the
distortion introduced by the output stage (i.e., the
amplifier/driver stages 308 and 408) and represented by the term D
is rejected by the high pass action of the distortion filter. A
graphic representation of this is shown in FIG. 5 in which the
frequency domain characteristics of Y/X (equations (1) and (3)) and
Y/D (equations (2) and (4)) are superimposed. As illustrated, the
reduction of distortion in the band of interest is significant.
[0042] According to a more specific embodiment, a feed forward path
may be provided from the input of amplifier/driver 400 to selected
stages via gain elements 412-0 through 412-(n-2) for stabilization
purposes. For more information regarding the use and effect of such
a feed forward path in the context of sigma-delta modulation
techniques, please refer to Candy and Temes, Oversampling
Delta-Sigma Data Converters, pp. 1-25 (IEEE Press, 1992), the
entirety of which is incorporated herein by reference.
[0043] More specific embodiments of the invention will now be
described with reference to FIGS. 6-9. Various representations of
an integrator for use with the present invention are shown in FIGS.
6a-6c. An ideal representation of an integrator 602 (as depicted in
the implementations of FIGS. 3 and 4) is shown in FIG. 6a. FIG. 6b
is a schematic representation of a single ended inverting
integrator based on operational amplifier 604, input resistor R and
feedback capacitor C, for use with single ended implementations of
the present invention. FIG. 6c is a schematic representation of a
differential output inverting integrator based on operational
amplifier 604, input resistor R and feedback capacitor C, for use
with differential implementations of the present invention. As will
be understood, the coefficients associated with the integrators of
FIGS. 6b and 6c are both equal to I/RC. The amplifier/driver
topologies described above with reference to FIGS. 3 and 4 may be
implemented using either of these integrators.
[0044] A differential output implementation of the present
invention using differential integrators will now be described with
reference to FIG. 7. FIG. 7 is a diagram of an improved
differential amplifier/line driver 700 with a third order
distortion filter according to a specific embodiment of the
invention. The distortion filter comprises three differential
output integrator stages based on operational amplifiers 702-0,
702-1, and 702-2, resistors R and capacitors C. The integrator
stages employ continuous-time feedback from the output of
amplifier/driver stage 704 via resistor pairs 705-0 and 706-0,
705-1 and 706-1, and 705-2 and 706-2. The distortion improvement
realized with this implementation is readily understood with
reference to the discussions above for the implementations of FIGS.
3 and 4. Such an embodiment may be used, for example, as a line
driver for an ADSL subscriber loop as mentioned above with
reference to FIG. 2b.
[0045] According to a specific embodiment, the integrators of
amplifier/line driver 700 may be implemented with switched
capacitors. Depending on the nature of amplifier/driver stage 704
and the rate at which the capacitors are switched, anti-aliasing
filters (e.g., low pass filters) may or may not be required in the
feedback paths. That is, if output stage 704 does not introduce
significant aliasing, or if the capacitors are switched fast enough
to eliminate the nonlinear terms generated by the nonlinearity of
the output stage, anti-aliasing filters are not necessary.
[0046] FIGS. 8a and 8b are graphs illustrating attenuation of
distortion for the embodiment of FIG. 7 where the input signal X
has a bandwidth of 5 MHz. According to a specific embodiment, the
coefficients of the integrator stages are chosen to produce a
maximally flat response from 0 to 1.2 MHz followed by a -60
dB/decade out of band attenuation, i.e., a Butterworth filter. In
this example, the gain of line driver stage 704 is set to 5. The
output Y to input X response of amplifier/driver 700 is represented
by the solid curve while the output Y to distortion D response is
represented by the dashed curve. As discussed above with reference
to FIG. 5, the distortion improvement in band is represented by the
difference between the two curves.
[0047] FIG. 8b shows the distortion improvement with the distortion
filter of the present invention over the 5 MHz band. In this
example, the amplifier/driver stage 704 is constructed such that
its operates with -40 dB of distortion across the band (solid line
802) without the benefit of the distortion filter of the present
invention. With the introduction of the distortion filter of the
present invention, i.e., the integrator stages of FIG. 7, the
improvement (represented by dashed line 804) at 1.2 MHz is -40 -36
or -76 dB.
[0048] As mentioned above, the distortion filter of the present
invention may be employed to enhance the distortion performance of
any of a variety of amplifier/driver classes. FIGS. 9a-9c show some
examples of amplifier/driver implementations for different class G
amplifier/driver configurations. In each of FIGS. 9a-9c, the
function and operation of similarly numbered elements is the
similar to that for the elements described above with reference to
FIG. 4. Amplifier 900 of FIG. 9a employs an nth order distortion
filter and is based on a simplified class G amplifier/driver 920.
Amplifier 900' of FIG. 9b employs an n.sup.th order distortion
filter and is based on a new class (similar to class G) of
amplifier/driver 930 which switches between three supplies, i.e.,
.+-.5, .+-.9, and .+-.15 volts. Amplifier 900" of FIG. 9c employs
an n.sup.th order distortion filter and is based on a class G
amplifier driver 940 which employs operational amplifiers to drive
the transistors which connect and disconnect the .+-.15 volt
supplies with minimal transition glitches.
[0049] FIG. 10 shows an embodiment of an amplifier/driver 1000
which includes a resonator-based frequency selective network 1002.
The resonator based network 1002 delivers a noise-shaped signal to
a comparator 1004 which, according to various embodiments, may or
may not be clocked (as indicated by the dashed arrow). The digital
output from comparator 1004 is processed by pre-drive circuitry
1006 and amplified by amplifier/driver stage 1008 which drives load
1010 with an analog output signal. Continuous-time feedback of the
analog output signal is provided from the output of
amplifier/driver stage 1008 to the resonator-based frequency
selective network via feedback path 1012. According to various
embodiments, amplifier/driver stage 1008 may comprise a class E or
a class F amplifier/driver.
[0050] While the invention has been particularly shown and
described with reference to specific embodiments thereof, it will
be understood by those skilled in the art that changes in the form
and details of the disclosed embodiments may be made without
departing from the spirit or scope of the invention. That is, as
discussed above, the present invention may be used with a wide
variety of amplifier/driver classes. A generalized embodiment is
shown in FIG. 11 to emphasize this point. Amplifier/driver 1100 of
FIG. 11 comprises frequency selective network 1102 in a feedback
loop with a nonlinear analog-to-analog converter 1104. An optional
output filter 1106 delivers the output signal to a load 1108.
Continuous-time feedback is provided to frequency selective network
1102 from the output of analog-to-analog converter 1104 via
feedback path 1110.
[0051] According to specific base band or low pass embodiments,
frequency selective network 1102 comprises an n.sup.th order
distortion filter based on integrators as described above with
reference to FIGS. 4, 6 and 7. According to other band pass
embodiments, frequency selective network comprises an nth order
distortion filter based on, for example, resonators.
[0052] It is also important to note that in cases where
analog-to-analog converter 1104 has gain, it is possible to make it
operate as the final stage of the frequency selective network as
represented by dashed feedback path 1112. That is, analog-to-analog
converter 1104 could act as a nonlinear stage of frequency
selective network 1102 with its own "feedback correction." In the
base band embodiment described above with reference to FIG. 4,
feedback path 1112 could be, for example, a capacitor across
amplifier/driver 408. Such an arrangement can be desirable
(depending on the nonlinearities) because the feedback capacitor
can quickly adjust for the nonlinearities and correct them before
they have a chance to mix down to lower frequencies.
[0053] It should also be noted that frequency selective network
1102 of amplifier/driver 1100 does not suffer from the same slew
rate limitations as, for example, an op amp. That is, if a step
input were introduced to an op amp, slewing would occur due to the
inherent limitations in the device. By contrast, the frequency
selective network of the present invention is configured such that,
even for a step input, it maintains a linear transfer function,
e.g., an RC response, rather than slewing. This is important in
that discontinuities are handled much better by the present
invention than traditional op amp circuits. Therefore, in view of
the foregoing, the scope of the invention should be determined with
reference to the appended claims.
* * * * *