Zorian; Yervant

Patent Applications and Registrations

Patent applications and USPTO patent grants for Zorian; Yervant.The latest application filed is for "finfet-based memory testing using multiple read operations".

Company Profile

1.42.22

Zorian; Yervant - Mountain View CA
Zorian; Yervant - Santa Clara CA
Zorian; Yervant - Santa Clara County CA
Zorian; Yervant - Somerset NJ
Zorian; Yervant - Princeton NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Detection of address errors in memory devices using multi-segment error detection codes Grant 11,023,310 - Grigoryan , et al. June 1, 2	2021-06-01
Method and apparatus for SOC with optimal RSMA Grant 10,789,398 - Martirosyan , et al. September 29, 2	2020-09-29
Finfet-based Memory Testing Using Multiple Read Operations App 20190035484 - Tshagharyan; Grigor ; et al.	2019-01-31
FinFET-based memory testing using multiple read operations Grant 10,192,635 - Tshagharyan , et al. Ja	2019-01-29
FinFET-based memory testing using multiple read operations Grant 10,115,477 - Tshagharyan , et al. October 30, 2	2018-10-30
FinFET-Based Memory Testing Using Multiple Read Operations App 20180130546 - Tshagharyan; Grigor ; et al.	2018-05-10
Method and Apparatus for SOC with Optimal RSMA App 20180129769 - Martirosyan; Suren ; et al.	2018-05-10
Testing electronic memories based on fault and test algorithm periodicity Grant 9,831,000 - Hakhumyan , et al. November 28, 2	2017-11-28
Periodic signal measurement using statistical sampling Grant 9,541,591 - Darbinyan , et al. January 10, 2	2017-01-10
Generation of memory structural model based on memory layout Grant 9,514,258 - Amirkhanyan , et al. December 6, 2	2016-12-06
Memory hard macro partition optimization for testing embedded memories Grant 9,336,342 - Zorian , et al. May 10, 2	2016-05-10
Periodic Signal Measurement Using Statistical Sampling App 20160041212 - Darbinyan; Karen ; et al.	2016-02-11
Determining a desirable number of segments for a multi-segment single error correcting coding scheme Grant 9,053,050 - Grigoryan , et al. June 9, 2	2015-06-09
Testing Electronic Memories Based On Fault And Test Algorithm Periodicity App 20140380107 - Hakhumyan; Aram ; et al.	2014-12-25
Detecting random telegraph noise induced failures in an electronic memory Grant 8,850,277 - Amirkhanyan , et al. September 30, 2	2014-09-30
Generation of Memory Structural Model Based on Memory Layout App 20130346056 - Amirkhanyan; Karen ; et al.	2013-12-26
Determining A Desirable Number Of Segments For A Multi-Segment Single Error Correcting Coding Scheme App 20130145119 - Grigoryan; Hayk ; et al.	2013-06-06
Memory Hard Macro Partition Optimization For Testing Embedded Memories App 20130080847 - Zorian; Yervant ; et al.	2013-03-28
Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer Grant 8,359,553 - Aleksanyan , et al. January 22, 2	2013-01-22
Detecting Random Telegraph Noise Induced Failures In An Electronic Memory App 20130019132 - AMIRKHANYAN; Karen ; et al.	2013-01-17
Testing Electronic Memories Based On Fault And Test Algorithm Periodicity App 20130019130 - HAKHUMYAN; Aram ; et al.	2013-01-17
Architecture, system and method for compressing repair data in an integrated circuit (IC) design Grant 8,295,108 - Darbinyan , et al. October 23, 2	2012-10-23
Methods and apparatuses for external voltage test methodology of input-output circuits Grant 8,225,156 - Tabatabaei , et al. July 17, 2	2012-07-17
Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers Grant 8,112,730 - Aleksanyan , et al. February 7, 2	2012-02-07
Architecture, System And Method For Compressing Repair Data In An Integrated Circuit (IC) Design App 20110119531 - Darbinyan; Karen ; et al.	2011-05-19
Architecture, system and method for compressing repair data in an integrated circuit (IC) design Grant 7,898,882 - Darbinyan , et al. March 1, 2	2011-03-01
Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer Grant 7,890,900 - Aleksanyan , et al. February 15, 2	2011-02-15
Methods and apparatuses for external test methodology and initialization of input-output circuits Grant 7,856,581 - Tabatabaei , et al. December 21, 2	2010-12-21
Methods and apparatuses for external voltage test of input-output circuits Grant 7,853,847 - Tabatabaei , et al. December 14, 2	2010-12-14
System and method for repairing a memory Grant 7,788,551 - Behera , et al. August 31, 2	2010-08-31
Memory modeling using an intermediate level structural description Grant 7,768,840 - Aleksanyan , et al. August 3, 2	2010-08-03
System and method for verifying IP integrity in system-on-chip (SOC) design Grant 7,673,264 - Darbinyan , et al. March 2, 2	2010-03-02
Various Methods And Apparatuses For Effective Yield Enhancement Of Good Chip Dies Having Memories Per Wafer App 20100050135 - Aleksanyan; Karen ; et al.	2010-02-25
Methods and apparatuses for external delay test of input-output circuits Grant 7,590,902 - Tabatabaei , et al. September 15, 2	2009-09-15
Various Methods And Apparatuses For Memory Modeling Using A Structural Primitive Verification For Memory Compilers App 20090106716 - Aleksanyan; Karen ; et al.	2009-04-23
Input-output device testing Grant 7,519,888 - Tabatabaei , et al. April 14, 2	2009-04-14
System and Method for Repairing a Memory App 20080301507 - Behera; Niranjan ; et al.	2008-12-04
Methods and apparatuses that reduce the size of a repair data container for repairable memories Grant 7,415,640 - Zorian , et al. August 19, 2	2008-08-19
System and method for repairing a memory Grant 7,415,641 - Behera , et al. August 19, 2	2008-08-19
Architecture, System and Method for Compressing Repair Data in an Integrated Circuit (IC) Design App 20080008015 - Darbinyan; Karen ; et al.	2008-01-10
Method and apparatus for a command based bist for testing memories Grant 7,290,186 - Zorian , et al. October 30, 2	2007-10-30
Apparatus and method to generate a repair signature Grant 7,237,154 - Zorian June 26, 2	2007-06-26
Input-output device testing App 20070079200 - Tabatabaei; Sassan ; et al.	2007-04-05
Apparatus, method, and system having a pin to activate the self-test and repair instructions Grant 7,149,924 - Zorian , et al. December 12, 2	2006-12-12
Apparatus, method, and system to allocate redundant components with subsets of the redundant components Grant 7,149,921 - Zorian , et al. December 12, 2	2006-12-12
Apparatus, method, and system to allocate redundant components Grant 7,127,647 - Zorian , et al. October 24, 2	2006-10-24
Built-in-self-test And Self-repair Methods And Devices For Computer Memories Comprising A Reconfiguration Memory Device App 20020019957 - HIGGINS, FRANK P. ; et al.	2002-02-14
Built-in self-test controlled by a token network and method Grant 6,237,123 - Kim , et al. May 22, 2	2001-05-22
Optimized built-in self-test method and apparatus for random access memories Grant 6,205,564 - Kim , et al. March 20, 2	2001-03-20
Built-in self-test in a plurality of stages controlled by a token passing network and method Grant 5,978,947 - Kim , et al. November 2, 1	1999-11-02
Method for built-in self-testing of ring-address FIFOs Grant 5,513,318 - van de Goor , et al. April 30, 1	1996-04-30
Method and apparatus for detecting retention faults in memories Grant 5,381,419 - Zorian January 10, 1	1995-01-10
Built-in self-test technique for content-addressable memories Grant 5,107,501 - Zorian April 21, 1	1992-04-21
Built-in self-test technique for read-only memories Grant 5,091,908 - Zorian February 25, 1	1992-02-25

Company Registrations

SEC

0001249257

ZORIAN YERVANT

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