| Patent | Date |
|---|
Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
Grant 10,892,281 - Zhang January 12, 2 | 2021-01-12 |
Method For Manufacturing A Transistor Having A Sharp Junction By Forming Raised Source-drain Regions Before Forming Gate Regions
App 20200119049 - ZHANG; John Hongguang | 2020-04-16 |
Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
Grant 10,615,177 - Zhang | 2020-04-07 |
Transistor with self-aligned source and drain contacts and method of making same
Grant 10,312,261 - Zhang | 2019-06-04 |
High density resistive random access memory (RRAM)
Grant 10,211,257 - Liu , et al. Feb | 2019-02-19 |
Method For Manufacturing A Transistor Having A Sharp Junction By Forming Raised Source-drain Regions Before Forming Gate Regions And Corresponding Transistor Produced By Said Method
App 20180350839 - Zhang; John Hongguang | 2018-12-06 |
Self-aligned bottom up gate contact and top down source-drain contact structure in the premetallization dielectric or interlevel dielectric layer of an integrated circuit
Grant 10,121,874 - Zhang November 6, 2 | 2018-11-06 |
Vertical junction FinFET device and method for manufacture
Grant 10,103,252 - Liu , et al. October 16, 2 | 2018-10-16 |
Via, trench or contact structure in the metallization, prematallization dielectric or interlevel dielectric layers of an integrated circuit
Grant 10,074,606 - Zhang September 11, 2 | 2018-09-11 |
Transistor With Self-aligned Source And Drain Contacts And Method Of Making Same
App 20180166469 - Zhang; John Hongguang | 2018-06-14 |
High Density Resistive Random Access Memory (rram)
App 20180102395 - Liu; Qing ; et al. | 2018-04-12 |
Transistor with self-aligned source and drain contacts and method of making same
Grant 9,922,993 - Zhang March 20, 2 | 2018-03-20 |
High density resistive random access memory (RRAM)
Grant 9,865,653 - Liu , et al. January 9, 2 | 2018-01-09 |
Size-controllable opening and method of making same
Grant 9,818,930 - Zhang November 14, 2 | 2017-11-14 |
Trench structure for high performance interconnection lines of different resistivity and method of making same
Grant 9,786,551 - Zhang , et al. October 10, 2 | 2017-10-10 |
Method For Manufacturing A Transistor Having A Sharp Junction By Forming Raised Source-drain Regions Before Forming Gate Regions And Corresponding Transistor Produced By Said Method
App 20170250198 - Zhang; John Hongguang | 2017-08-31 |
Self-aligned Bottom Up Gate Contact And Top Down Source-drain Contact Structure In The Premetallization Dielectric Or Interlevel Dielectric Layer Of An Integrated Circuit
App 20170222018 - Zhang; John Hongguang | 2017-08-03 |
Via, Trench Or Contact Structure In The Metallization, Prematallization Dielectric Or Interlevel Dielectric Layers Of An Integrated Circuit
App 20170194244 - Zhang; John Hongguang | 2017-07-06 |
Method for manufacturing a transistor having a sharp junction by forming raised source-drain regions before forming gate regions and corresponding transistor produced by said method
Grant 9,685,456 - Zhang June 20, 2 | 2017-06-20 |
Self-aligned bottom up gate contact and top down source-drain contact structure in the premetallization dielectric or interlevel dielectric layer of an integrated circuit
Grant 9,679,847 - Zhang June 13, 2 | 2017-06-13 |
Via, trench or contact structure in the metallization, premetallization dielectric or interlevel dielectric layers of an integrated circuit
Grant 9,640,483 - Zhang May 2, 2 | 2017-05-02 |
Vertical Junction Finfet Device And Method For Manufacture
App 20170077270 - Liu; Qing ; et al. | 2017-03-16 |
Method For Manufacturing A Transistor Having A Sharp Junction By Forming Raised Source-drain Regions Before Forming Gate Regions And Corresponding Transistor Produced By Said Method
App 20170069661 - Zhang; John Hongguang | 2017-03-09 |
Transistor With Self-aligned Source And Drain Contacts And Method Of Making Same
App 20170047349 - Zhang; John Hongguang | 2017-02-16 |
High density resistive random access memory (RRAM)
Grant 9,570,512 - Liu , et al. February 14, 2 | 2017-02-14 |
High Density Resistive Random Access Memory (rram)
App 20170033284 - Liu; Qing ; et al. | 2017-02-02 |
Backside source-drain contact for integrated circuit transistor devices and method of making same
Grant 9,543,397 - Kleemeier , et al. January 10, 2 | 2017-01-10 |
Vertical junction FinFET device and method for manufacture
Grant 9,543,304 - Liu , et al. January 10, 2 | 2017-01-10 |
Self-aligned Bottom Up Gate Contact And Top Down Source-drain Contact Structure In The Premetallization Dielectric Or Interlevel Dielectric Layer Of An Integrated Circuit
App 20160365309 - Zhang; John Hongguang | 2016-12-15 |
Via, Trench Or Contact Structure In The Metallization, Premetallization Dielectric Or Interlevel Dielectric Layers Of An Integrated Circuit
App 20160351500 - Zhang; John Hongguang | 2016-12-01 |
Transistor with self-aligned source and drain contacts and method of making same
Grant 9,496,283 - Zhang November 15, 2 | 2016-11-15 |
Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor
Grant 9,490,355 - Morin , et al. November 8, 2 | 2016-11-08 |
High density resistive random access memory (RRAM)
Grant 9,484,535 - Liu , et al. November 1, 2 | 2016-11-01 |
High Density Resistive Random Access Memory (rram)
App 20160307964 - Liu; Qing ; et al. | 2016-10-20 |
High Density Resistive Random Access Memory (rram)
App 20160308128 - Liu; Qing ; et al. | 2016-10-20 |
Junctionless Finfet Device And Method For Manufacture
App 20160300857 - Liu; Qing ; et al. | 2016-10-13 |
Vertical Junction Finfet Device And Method For Manufacture
App 20160293602 - Liu; Qing ; et al. | 2016-10-06 |
Silicon Carbide Static Induction Transistor And Process For Making A Silicon Carbide Static Induction Transistor
App 20160133736 - Morin; Pierre ; et al. | 2016-05-12 |
High density resistive random access memory (RRAM)
Grant 9,305,974 - Liu , et al. April 5, 2 | 2016-04-05 |
Size-controllable Opening And Method Of Making Same
App 20160064647 - Zhang; John Hongguang | 2016-03-03 |
Backside Source-drain Contact For Integrated Circuit Transistor Devices And Method Of Making Same
App 20160056249 - Kleemeier; Walter ; et al. | 2016-02-25 |
Method for making a photonic integrated circuit having a plurality of lenses
Grant 9,244,236 - Zhang January 26, 2 | 2016-01-26 |
Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor
Grant 9,224,845 - Zhang , et al. December 29, 2 | 2015-12-29 |
Backside Source-drain Contact For Integrated Circuit Transistor Devices And Method Of Making Same
App 20150357477 - Zhang; John Hongguang ; et al. | 2015-12-10 |
Backside source-drain contact for integrated circuit transistor devices and method of making same
Grant 9,209,305 - Zhang , et al. December 8, 2 | 2015-12-08 |
Method For Making A Photonic Integrated Circuit Having A Plurality Of Lenses
App 20150323739 - Zhang; John Hongguang | 2015-11-12 |
Trench Structure For High Performance Interconnection Lines Of Different Resistivity And Method Of Making Same
App 20150311113 - Zhang; John Hongguang ; et al. | 2015-10-29 |
Photonic integrated circuit having a plurality of lenses
Grant 9,116,319 - Zhang August 25, 2 | 2015-08-25 |
System for relieving stress and improving heat management in a 3D chip stack
Grant 8,653,671 - Zhang February 18, 2 | 2014-02-18 |
System for relieving stress and improving heat management in a 3D chip stack having an array of inter-stack connections
Grant 8,564,137 - Zhang October 22, 2 | 2013-10-22 |
Copper interconnect structure having a graphene cap
Grant 8,476,765 - Zhang , et al. July 2, 2 | 2013-07-02 |
Photonic Integrated Circuit Having A Plurality Of Lenses
App 20120155797 - Zhang; John Hongguang | 2012-06-21 |
Copper Interconnect Structure Having A Graphene Cap
App 20120139114 - Zhang; John Hongguang ; et al. | 2012-06-07 |
System And Method For Relieving Stress And Improving Heat Management In A 3d Chip Stack Having An Array Of Inter-stack Connections
App 20120112357 - Zhang; John Hongguang | 2012-05-10 |
System And Method For Relieving Stress And Improving Heat Management In A 3d Chip Stack
App 20120112356 - Zhang; John Hongguang | 2012-05-10 |
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