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name:-0.017203092575073
name:-0.013699054718018
name:-0.0013108253479004
Yoo; Jae Yoon Patent Filings

Yoo; Jae Yoon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Yoo; Jae Yoon.The latest application filed is for "grid gain calculation circuit, image sensing device and operation method of the same".

Company Profile
1.16.21
  • Yoo; Jae Yoon - Gyeonggi-do KR
  • Yoo; Jae Yoon - Seongnam-si KR
  • Yoo; Jae-Yoon - Seoul KR
  • Yoo; Jae-Yoon - Fishkill NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Grid gain calculation circuit, image sensing device and operation method of the same
Grant 11,451,752 - Yoo September 20, 2
2022-09-20
Grid Gain Calculation Circuit, Image Sensing Device And Operation Method Of The Same
App 20210360206 - YOO; Jae Yoon
2021-11-18
Method for processing image signal, image signal processor, and image sensor chip
Grant 11,159,722 - An , et al. October 26, 2
2021-10-26
Method For Processing Image Signal, Image Signal Processor, And Image Sensor Chip
App 20200228709 - An; Jae Ho ;   et al.
2020-07-16
Method of forming an at least penta-sided-channel type of FinFET transistor
Grant 7,723,193 - Rhee , et al. May 25, 2
2010-05-25
Method of manufacturing field effect transistors using sacrificial blocking layers
Grant 7,618,868 - Yoo , et al. November 17, 2
2009-11-17
Shallow Trench Isolation Structures For Semiconductor Devices Including Doped Oxide Film Liners And Methods Of Manufacturing The Same
App 20090020845 - Shin; Dong-suk ;   et al.
2009-01-22
Transistors for semiconductor device and methods of fabricating the same
Grant 7,439,596 - Yoo , et al. October 21, 2
2008-10-21
At least penta-sided-channel type of finfet transistor
App 20080242010 - Rhee; Hwa-Sung ;   et al.
2008-10-02
At least penta-sided-channel type of FinFET transistor
Grant 7,385,247 - Rhee , et al. June 10, 2
2008-06-10
Structure And Method To Improve Short Channel Effects In Metal Oxide Semiconductor Field Effect Transistors
App 20080121985 - Chen; Xiangdong ;   et al.
2008-05-29
MOS transistor with elevated source/drain structure
Grant 7,368,792 - Lee , et al. May 6, 2
2008-05-06
Method of Manufacturing Semiconductor Integrated Circuit Device, and Semiconductor Integrated Circuit Device Manufactured by the Method
App 20070257318 - Yoo; Jae Yoon ;   et al.
2007-11-08
Method of fabricating MOS transistor using total gate silicidation process
Grant 7,101,776 - Yoo , et al. September 5, 2
2006-09-05
Isolation method for semiconductor device
App 20060183296 - Yoo; Jae-yoon ;   et al.
2006-08-17
Bipolar device and method of manufacturing the same including pre-treatment using germane gas
Grant 7,084,041 - Rhee , et al. August 1, 2
2006-08-01
MOS transistor with elevated source/drain structure
App 20060163558 - Lee; Seung-hwan ;   et al.
2006-07-27
Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process
Grant 7,033,895 - Lee , et al. April 25, 2
2006-04-25
Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device
Grant 6,987,310 - Lee , et al. January 17, 2
2006-01-17
Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device
App 20050274981 - Lee, Ho ;   et al.
2005-12-15
Transistors for semiconductor device and methods of fabricating the same
App 20050170620 - Yoo, Jae-Yoon ;   et al.
2005-08-04
At least penta-sided-channel type of FinFET transistor
App 20050156202 - Rhee, Hwa-Sung ;   et al.
2005-07-21
Method of forming gate oxide layer in semiconductor devices
Grant 6,878,575 - Yoo , et al. April 12, 2
2005-04-12
Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device
App 20050023646 - Lee, Ho ;   et al.
2005-02-03
Method of fabricating MOS transistor using total gate silicidation process
App 20050009265 - Yoo, Jae-Yoon ;   et al.
2005-01-13
Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon
Grant 6,835,621 - Yoo , et al. December 28, 2
2004-12-28
MOS transistor with elevated source/drain structure and method of fabricating the same
App 20040227164 - Lee, Seung-hwan ;   et al.
2004-11-18
Bipolar device and method of manufacturing the same including pre-treatment using germane gas
App 20040192001 - Rhee, Hwa-sung ;   et al.
2004-09-30
Method of forming gate oxide layer in semiconductor devices
App 20040110325 - Yoo, Jae-Yoon ;   et al.
2004-06-10
Method of fabricating non-volatile memory device having a structure of silicon-oxide-nitride-oxide-silicon
App 20040009642 - Yoo, Jae-yoon ;   et al.
2004-01-15
Methods of forming a gate insulating layer in an integrated circuit device in which the gate insulating layer is nitrified and then annealed to cure defects caused by the nitridation process
App 20040005748 - Hyun, Sang-Jin ;   et al.
2004-01-08
Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer
Grant 6,624,496 - Ku , et al. September 23, 2
2003-09-23
Isolation method for semiconductor device
App 20020197823 - Yoo, Jae-yoon ;   et al.
2002-12-26
Method of fabricating a trench isolation structure having sidewall oxide layers with different thicknesses
Grant 6,486,039 - Yoo , et al. November 26, 2
2002-11-26
Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer
App 20020090795 - Ahn, Dong-Ho ;   et al.
2002-07-11
Method of fabricating a trench isolation structure having sidewall oxide layers with different thicknesses
App 20020086495 - Yoo, Jae-yoon ;   et al.
2002-07-04
Method of forming T-shaped isolation layer, method of forming elevated salicide source/drain region using the same, and semiconductor device having T-shaped isolation layer
Grant 6,383,877 - Ahn , et al. May 7, 2
2002-05-07

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