| Patent | Date |
|---|
Optical Waveguide Connecting Device
App 20210389520 - Vashishtha; Vinay ; et al. | 2021-12-16 |
Correlated electron switch structures and applications
Grant 10,937,831 - Shifren , et al. March 2, 2 | 2021-03-02 |
Methods and processes for forming devices from correlated electron material (CEM)
Grant 10,707,415 - Shifren , et al. | 2020-07-07 |
Optical waveguide connecting device
Grant 10,641,953 - Vashishtha , et al. | 2020-05-05 |
Optical Waveguide Connecting Device
App 20200132929 - Vashishtha; Vinay ; et al. | 2020-04-30 |
Controlling Dopant Concentration In Correlated Electron Materials
App 20200052201 - Shifren; Lucian ; et al. | 2020-02-13 |
Correlated Electron Switch Structures And Applications
App 20200043982 - Shifren; Lucian ; et al. | 2020-02-06 |
Controlling dopant concentration in correlated electron materials
Grant 10,454,026 - Shifren , et al. Oc | 2019-10-22 |
Correlated electron switch structures and applications
Grant 10,446,609 - Shifren , et al. Oc | 2019-10-15 |
Methods And Processes For Forming Devices From Correlated Electron Material (cem)
App 20190173008 - Shifren; Lucian ; et al. | 2019-06-06 |
Integrated circuit manufacture using direct write lithography
Grant 10,303,840 - Yeric | 2019-05-28 |
Correlated Electron Switch Structures And Applications
App 20180269395 - Shifren; Lucian ; et al. | 2018-09-20 |
Integrated circuit device comprising environment-hardened die and less-environment-hardened die
Grant 10,036,774 - Yeric , et al. July 31, 2 | 2018-07-31 |
System and method for perforating redundant metal in self-aligned multiple patterning
Grant 10,002,222 - Cline , et al. June 19, 2 | 2018-06-19 |
Controlling Dopant Concentration In Correlated Electron Materials
App 20180159028 - Shifren; Lucian ; et al. | 2018-06-07 |
Correlated electron switch structures and applications
Grant 9,978,942 - Shifren , et al. May 22, 2 | 2018-05-22 |
Using inter-tier vias in integrated circuits
Grant 9,929,149 - Sinha , et al. March 27, 2 | 2018-03-27 |
Contact resistance mitigation
Grant 9,875,332 - Yeric January 23, 2 | 2018-01-23 |
System and Method for Perforating Redundant Metal in Self-Aligned Multiple Patterning
App 20180018420 - Cline; Brian Tracy ; et al. | 2018-01-18 |
Using Inter-Tier Vias in Integrated Circuits
App 20170365600 - Sinha; Saurabh Pijuskumar ; et al. | 2017-12-21 |
Integrated Circuit Manufacture Using Direct Write Lithography
App 20170228493 - YERIC; Gregory Munson | 2017-08-10 |
Integrated circuit manufacture using direct write lithography
Grant 9,672,316 - Yeric June 6, 2 | 2017-06-06 |
Contact Resistance Mitigation
App 20170076032 - Yeric; Gregory Munson | 2017-03-16 |
Integrated Circuit Device Comprising Environment-hardened Die And Less-environment-hardened Die
App 20160161550 - YERIC; Gregory Munson ; et al. | 2016-06-09 |
Integrated Circuit Manufacture Using Direct Write Lithography
App 20150026650 - YERIC; Gregory Munson | 2015-01-22 |
Structural feature formation within an integrated circuit
Grant 8,812,997 - Yeric August 19, 2 | 2014-08-19 |
Operating parameter monitoring circuit and method
Grant 8,330,478 - Myers , et al. December 11, 2 | 2012-12-11 |
Operating parameter monitor for an integrated circuit
Grant 8,154,353 - Yeric April 10, 2 | 2012-04-10 |
Structural feature formation within an integrated circuit
App 20110225555 - Yeric; Gregory Munson | 2011-09-15 |
Operating parameter monitor for an integrated circuit
App 20110102091 - Yeric; Gregory Munson | 2011-05-05 |
Operating parameter monitoring circuit and method
App 20110101998 - Myers; James Edward ; et al. | 2011-05-05 |
Structural feature formation within an integrated circuit
App 20100200996 - Yeric; Gregory Munson | 2010-08-12 |
Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region
Grant 7,745,275 - Yeric , et al. June 29, 2 | 2010-06-29 |
Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region
App 20100059825 - Yeric; Gregory Munson ; et al. | 2010-03-11 |
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