name:-0.021567106246948
name:-0.014636993408203
name:-0.0024769306182861
YEN; DANIEL Patent Filings

YEN; DANIEL

Patent Applications and Registrations

Patent applications and USPTO patent grants for YEN; DANIEL.The latest application filed is for "microdevice platform recapitulating hypoxic tissue microenvironments".

Company Profile
2.15.16
  • YEN; DANIEL - LOS ANGELES CA
  • Yen; Daniel - Singapore SG
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
Microdevice Platform Recapitulating Hypoxic Tissue Microenvironments
App 20210040433 - SHEN; KEYUE ;   et al.
2021-02-11
Microdevice platform recapitulating hypoxic tissue microenvironments
Grant 10,829,730 - Shen , et al. November 10, 2
2020-11-10
Microdevice Platform Recapitulating Hypoxic Tissue Microenvironments
App 20180291330 - SHEN; KEYUE ;   et al.
2018-10-11
Adjustable 3D capacitor
Grant 7,067,869 - Cheng , et al. June 27, 2
2006-06-27
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing
App 20050101083 - Ang, Chew Hoe ;   et al.
2005-05-12
Method to pattern small features by using a re-flowable hard mask
App 20050089777 - Ang, Chew-Hoe ;   et al.
2005-04-28
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing
Grant 6,841,441 - Ang , et al. January 11, 2
2005-01-11
Formation of small gates beyond lithographic limits
App 20040266155 - Ang, Chew Hoe ;   et al.
2004-12-30
Method to pattern small features by using a re-flowable hard mask
Grant 6,828,082 - Ang , et al. December 7, 2
2004-12-07
Method for forming a via in a damascene process
Grant 6,803,305 - Yen , et al. October 12, 2
2004-10-12
Adjustable 3D capacitor
App 20040147087 - Cheng, Wei Hua ;   et al.
2004-07-29
Method to produce dual gates (one metal and one poly or metal silicide) for CMOS devices using sputtered metal deposition, metallic ion implantation, or silicon implantation, and laser annealing
App 20040132271 - Ang, Chew Hoe ;   et al.
2004-07-08
Method for forming a high aspect ratio via
App 20040077174 - Yen, Daniel ;   et al.
2004-04-22
Method of self-aligning a damascene gate structure to isolation regions
Grant 6,713,335 - Yen , et al. March 30, 2
2004-03-30
Method Of Self-aligning A Damascene Gate Structure To Isolation Regions
App 20040038466 - Yen, Daniel ;   et al.
2004-02-26
Adjustable 3D capacitor
Grant 6,689,643 - Cheng , et al. February 10, 2
2004-02-10
Method for reducing gouging during via formation
Grant 6,686,279 - Yen , et al. February 3, 2
2004-02-03
Method to fabricate a single gate with dual work-functions
Grant 6,664,153 - Ang , et al. December 16, 2
2003-12-16
Adjustable 3D capacitor
App 20030201476 - Cheng, Wei Hua ;   et al.
2003-10-30
Method for forming a via in a damascene process
App 20030194856 - Yen, Daniel ;   et al.
2003-10-16
Method of fabricating variable length vertical transistors
Grant 6,632,712 - Ang , et al. October 14, 2
2003-10-14
Method for making three-dimensional metal-insulator-metal capacitors for dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM)
Grant 6,630,380 - Cheng , et al. October 7, 2
2003-10-07
Method for reducing gouging during via formation
App 20030186542 - Yen, Daniel ;   et al.
2003-10-02
Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask
Grant 6,610,604 - Ang , et al. August 26, 2
2003-08-26
Forming dual gate oxide thickness on vertical transistors by ion implantation
Grant 6,610,575 - Ang , et al. August 26, 2
2003-08-26
Method to fabricate a single gate with dual work-functions
App 20030153139 - Ang, Chew Hoe ;   et al.
2003-08-14
Method to pattern small features by using a re-flowable hard mask
App 20030152871 - Ang, Chew-Hoe ;   et al.
2003-08-14
Method Of Forming Small Transistor Gates By Using Self-aligned Reverse Spacer As A Hard Mask
App 20030148617 - Ang, Chew-Hoe ;   et al.
2003-08-07
Darc layer for MIM process integration
Grant 6,576,526 - Kai , et al. June 10, 2
2003-06-10
Darc layer for MIM process integration
App 20030008467 - Kai, Shao ;   et al.
2003-01-09
Method to form high k dielectric and silicide to reduce poly depletion by using a sacrificial metal between oxide and gate
Grant 6,429,109 - Zheng , et al. August 6, 2
2002-08-06

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