loadpatents
name:-0.052067995071411
name:-0.030340909957886
name:-0.0033090114593506
Wu; Shien-Yang Patent Filings

Wu; Shien-Yang

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wu; Shien-Yang.The latest application filed is for "semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same".

Company Profile
4.42.48
  • Wu; Shien-Yang - Jhudong Town TW
  • Wu; Shien-Yang - Hsin-Chu County TW
  • Wu; Shien-Yang - Hsin-Chu TW
  • Wu; Shien-Yang - Hsinchu TW
  • Wu, Shien-Yang - Hsinchu City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Electrical fuse structure and method of formation
Grant 11,410,925 - Wu , et al. August 9, 2
2022-08-09
Semiconductor Devices Having Gate Dielectric Layers of Varying Thicknesses and Methods of Forming the Same
App 20220238519 - Lin; Ta-Chun ;   et al.
2022-07-28
Electrical fuse structure and method of formation
Grant 11,309,244 - Wu , et al. April 19, 2
2022-04-19
Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same
Grant 11,302,692 - Lin , et al. April 12, 2
2022-04-12
Gate-all-around (gaa) Method And Devices
App 20210384311 - Wu; Shien-Yang ;   et al.
2021-12-09
Gate-all-around (GAA) method and devices
Grant 11,101,359 - Wu , et al. August 24, 2
2021-08-24
Semiconductor Devices Having Gate Dielectric Layers of Varying Thicknesses and Methods of Forming the Same
App 20210225839 - Lin; Ta-Chun ;   et al.
2021-07-22
Gate-All-Around (GAA) Method and Devices
App 20200168715 - Wu; Shien-Yang ;   et al.
2020-05-28
Electrical Fuse Structure and Method of Formation
App 20200098687 - Wu; Shien-Yang ;   et al.
2020-03-26
Method and system of generating layout
Grant 10,521,537 - Wu , et al. Dec
2019-12-31
Anti-fuse cell structure including reading and programming devices with different gate dielectric thickness
Grant 10,347,646 - Liaw , et al. July 9, 2
2019-07-09
Anti-fuse cell structure including reading and programming devices with different gate dielectric thickness
Grant 10,014,066 - Liaw , et al. July 3, 2
2018-07-03
Method And System Of Generating Layout
App 20180150581 - Wu; Shien-Yang ;   et al.
2018-05-31
Electrical Fuse Structure and Method of Formation
App 20180130741 - Wu; Shien-Yang ;   et al.
2018-05-10
Method and system of generating a layout including a fuse layout pattern
Grant 9,892,221 - Wu , et al. February 13, 2
2018-02-13
Fin-like field effect transistor (FinFET) based, metal-semiconductor alloy fuse device and method of manufacturing same
Grant 9,881,837 - Liang , et al. January 30, 2
2018-01-30
Electrical fuse structure and method of formation
Grant 9,865,536 - Wu , et al. January 9, 2
2018-01-09
Electrical Fuse Structure and Method of Formation
App 20170345758 - Wu; Shien-Yang ;   et al.
2017-11-30
Anti-Fuse Cell Structure Including Reading and Programming Devices with Different Gate Dielectric Thickness
App 20170316835 - Liaw; Jhon Jhy ;   et al.
2017-11-02
Bipolar junction transistor formed on fin structures
Grant 9,780,003 - Hu , et al. October 3, 2
2017-10-03
High efficiency FinFET diode
Grant 9,755,075 - Fan , et al. September 5, 2
2017-09-05
Electrical fuse structure and method of formation
Grant 9,741,658 - Wu , et al. August 22, 2
2017-08-22
Anti-fuse Cell Structure Including Reading And Programming Devices With Different Gate Dielectric Thickness
App 20170154686 - Liaw; Jhon Jhy ;   et al.
2017-06-01
Bipolar Junction Transistor Formed on Fin Structures
App 20160358822 - Hu; Chia-Hsin ;   et al.
2016-12-08
Bipolar junction transistor formed on fin structures
Grant 9,419,087 - Hu , et al. August 16, 2
2016-08-16
High Efficiency Finfet Diode
App 20160204259 - Fan; Hsueh-Shih ;   et al.
2016-07-14
High efficiency FinFET diode
Grant 9,293,378 - Fan , et al. March 22, 2
2016-03-22
High Efficiency FinFET Diode
App 20160005660 - Fan; Hsueh-Shih ;   et al.
2016-01-07
E-fuse structure design in electrical programmable redundancy for embedded memory circuit
Grant 9,099,467 - Thei , et al. August 4, 2
2015-08-04
High efficiency FinFET diode
Grant 9,093,566 - Fan , et al. July 28, 2
2015-07-28
Fin-Like Field Effect Transistor (FINFET) Based, Metal-Semiconductor Alloy Fuse Device And Method Of Manufacturing Same
App 20150179524 - Liang; Min-Chang ;   et al.
2015-06-25
Bipolar Junction Transistor Formed on Fin Structures
App 20150123246 - Hu; Chia-Hsin ;   et al.
2015-05-07
Method And System Of Generating Layout
App 20150067620 - WU; Shien-Yang ;   et al.
2015-03-05
Fin-like field effect transistor (FinFET) based, metal-semiconductor alloy fuse device and method of manufacturing same
Grant 8,969,999 - Liang , et al. March 3, 2
2015-03-03
Electrical Fuse Structure and Method of Formation
App 20140319651 - Wu; Shien-Yang ;   et al.
2014-10-30
A New E-fuse Structure Design in Electrical Programmable Redundancy for Embedded Memory Circuit
App 20140218100 - Thei; Kong-Beng ;   et al.
2014-08-07
Electrical Fuse Structure and Method of Formation
App 20140203396 - Wu; Shien-Yang ;   et al.
2014-07-24
High Efficiency Finfet Diode
App 20140183641 - Fan; Hsueh-Shih ;   et al.
2014-07-03
Electrical fuse structure and method of formation
Grant 8,686,536 - Wu , et al. April 1, 2
2014-04-01
E-fuse structure design in electrical programmable redundancy for embedded memory circuit
Grant 8,629,050 - Thei , et al. January 14, 2
2014-01-14
Fin-like Field Effect Transistor (finfet) Based, Metal-semiconductor Alloy Fuse Device And Method Of Manufacturing Same
App 20130105895 - Liang; Minchang ;   et al.
2013-05-02
E-fuse Structure Design in Electrical Programmable Redundancy for Embedded Memory Circuit
App 20120196434 - Thei; Kong-Beng ;   et al.
2012-08-02
Fuse structure
Grant 8,174,091 - Thei , et al. May 8, 2
2012-05-08
Variable width offset spacers for mixed signal and system on chip devices
Grant 7,952,142 - Wu May 31, 2
2011-05-31
Electrical Fuse Structure and Method of Formation
App 20110101493 - Wu; Shien-Yang ;   et al.
2011-05-05
Process for fabricating a strained channel MOSFET device
Grant 7,898,028 - Chang , et al. March 1, 2
2011-03-01
Diode junction poly fuse
Grant 7,892,895 - Wu , et al. February 22, 2
2011-02-22
Integrated Circuits Having Fuses And Systems Thereof
App 20100213569 - WU; Shien-Yang ;   et al.
2010-08-26
High accuracy and universal on-chip switch matrix testline
Grant 7,782,073 - Lo , et al. August 24, 2
2010-08-24
Spacer layer etch method providing enhanced microelectronic device performance
Grant 7,678,655 - Su , et al. March 16, 2
2010-03-16
Fuse Structure
App 20090273055 - Thei; Kong-Beng ;   et al.
2009-11-05
Variable Width Offset Spacers For Mixed Signal And System On Chip Devices
App 20090039445 - WU; Shien-Yang
2009-02-12
Variable width offset spacers for mixed signal and system on chip devices
Grant 7,456,066 - Wu November 25, 2
2008-11-25
Network based integrated circuit testline generator
App 20080244475 - Lo; Tseng Chin ;   et al.
2008-10-02
High accuracy and universal on-chip switch matrix testline
App 20080238453 - Lo; Tseng Chin ;   et al.
2008-10-02
Variable width offset spacers for mixed signal and system on chip devices
App 20080122011 - Wu; Shien-Yang
2008-05-29
Electrically programmable polysilicon fuse with multiple level resistance and programming
Grant 7,332,791 - Wu February 19, 2
2008-02-19
Spacer layer etch method providing enhanced microelectronic device performance
App 20080026518 - Su; Hung Der ;   et al.
2008-01-31
System And Method For Improving Mask Tape-out Process
App 20080022254 - Luo; T. C. ;   et al.
2008-01-24
Process for Fabricating a Strained Channel MOSFET Device
App 20070290277 - Chang; Sun-Jay ;   et al.
2007-12-20
Process for fabricating a strained channel MOSFET device
Grant 7,279,430 - Chang , et al. October 9, 2
2007-10-09
Integrated circuit structure and method of fabrication
Grant 7,271,431 - Lin , et al. September 18, 2
2007-09-18
Low power fuse structure and method of making the same
Grant 7,109,564 - Wu , et al. September 19, 2
2006-09-19
Microelectronic device with depth adjustable sill
Grant 7,078,723 - Lin , et al. July 18, 2
2006-07-18
Process for fabricating a strained channel MOSFET device
App 20060040503 - Chang; Sun-Jay ;   et al.
2006-02-23
Electrically programmable polysilicon fuse with multiple level resistance and programming
App 20060006494 - Wu; Shien-Yang
2006-01-12
Integrated circuit structure and method of fabrication
App 20050287779 - Lin, Chuan-Yi ;   et al.
2005-12-29
New fuse structure
App 20050285222 - Thei, Kong-Beng ;   et al.
2005-12-29
Diode junction poly fuse
App 20050277232 - Wu, Shien-Yang ;   et al.
2005-12-15
Programming method for electrical fuse cell and circuit thereof
Grant 6,970,394 - Wu , et al. November 29, 2
2005-11-29
Programming Method For Electrical Fuse Cell And Circuit Thereof
App 20050237841 - Wu, Shien-Yang ;   et al.
2005-10-27
Diode junction poly fuse
Grant 6,956,277 - Wu , et al. October 18, 2
2005-10-18
Microelectronic device with depth adjustable sill and method of fabrication thereof
App 20050224786 - Lin, Chuan Yi ;   et al.
2005-10-13
Low power fuse structure and method for making the same
App 20050218475 - Wu, Shien-Yang ;   et al.
2005-10-06
Diode Junction Poly Fuse
App 20050212080 - Wu, Shien-Yang ;   et al.
2005-09-29
Spacer approach for CMOS devices
App 20050208726 - Chang, Sun-Jay ;   et al.
2005-09-22
Electrically programmable polysilicon fuse with multiple level resistance and programming
App 20050087836 - Wu, Shien-Yang
2005-04-28
Method for measuring capacitance-voltage curves for transistors
Grant 6,885,214 - Su , et al. April 26, 2
2005-04-26
Method For Measuring Capacitance-voltage Curves For Transistors
App 20050083075 - Su, Hung-Der ;   et al.
2005-04-21
System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process
Grant 6,828,198 - Su , et al. December 7, 2
2004-12-07
Electrical Fuse Element Test Structure And Method
App 20040224431 - Wu, Shien-Yang
2004-11-11
Electrical fuse element test structure and method
Grant 6,806,107 - Wu October 19, 2
2004-10-19
System-on-chip (SOC) solutions with multiple devices by multiple poly gate trimming process
App 20040185623 - Su, Hung-Der ;   et al.
2004-09-23
Low programming voltage anti-fuse structure
Grant 6,580,145 - Wu , et al. June 17, 2
2003-06-17
Low programming voltage anti-fuse structure
App 20020094611 - Wu, Shien-Yang ;   et al.
2002-07-18
Electrical overlay/spacing monitor method using a ladder resistor
Grant 6,323,097 - Wu , et al. November 27, 2
2001-11-27

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