WU; Han-Wei
Patent Applications and Registrations
Patent applications and USPTO patent grants for WU; Han-Wei.The latest application filed is for "method of manufacturing semiconductor devices".
- WU; Han-Wei - Tainan City TW
- Wu; Han-Wei - Tainan TW
| Patent | Date |
|---|---|
| Method Of Manufacturing Semiconductor Devices App 20220262624 - CHEN; Jin-Dah ; et al. | 2022-08-18 |
| Memory Structure And Method Of Forming The Same App 20220223622 - Chien; Shih-Hsuan ; et al. | 2022-07-14 |
| Loading effect reduction through multiple coat-etch processes Grant 11,387,105 - Chen , et al. July 12, 2 | 2022-07-12 |
| Gate Formation with Varying Work Function Layers App 20220157973 - Chen; Jin-Dah ; et al. | 2022-05-19 |
| Gate formation with varying work function layers Grant 11,239,345 - Chen , et al. February 1, 2 | 2022-02-01 |
| Thin-film Non-uniform Stress Evaluation App 20210066139 - HO; Wei-De ; et al. | 2021-03-04 |
| Semiconductor component and fabricating method thereof Grant 10,872,889 - Chen , et al. December 22, 2 | 2020-12-22 |
| Loading Effect Reduction Through Multiple Coat-Etch Processes App 20200388497 - Chen; Jin-Dah ; et al. | 2020-12-10 |
| Loading effect reduction through multiple coat-etch processes Grant 10,755,936 - Chen , et al. A | 2020-08-25 |
| Gate Formation with Varying Work Function Layers App 20200251578 - Kind Code | 2020-08-06 |
| Gate formation with varying work function layers Grant 10,644,134 - Chen , et al. | 2020-05-05 |
| Lithography system having invisible pellicle over mask Grant 10,488,766 - Chen , et al. Nov | 2019-11-26 |
| Loading Effect Reduction Through Multiple Coat-etch Processes App 20190252193 - Chen; Jin-Dah ; et al. | 2019-08-15 |
| Lithography System Having Invisible Pellicle Over Mask App 20190146362 - CHEN; Chiu-Hsiang ; et al. | 2019-05-16 |
| Loading effect reduction through multiple coat-etch processes Grant 10,276,392 - Chen , et al. | 2019-04-30 |
| Gate Formation With Varying Work Function Layers App 20180350955 - Chen; Jin-Dah ; et al. | 2018-12-06 |
| Method of pulling-back sidewall metal layer Grant 10,115,796 - Chen , et al. October 30, 2 | 2018-10-30 |
| Semiconductor Component And Fabricating Method Thereof App 20180138172 - CHEN; Ting-Yeh ; et al. | 2018-05-17 |
| Loading Effect Reduction Through Multiple Coat-etch Processes App 20170309718 - Chen; Jin-Dah ; et al. | 2017-10-26 |
| Loading effect reduction through multiple coat-etch processes Grant 9,711,604 - Chen , et al. July 18, 2 | 2017-07-18 |
| Method of Pulling-Back Sidewall Metal Layer App 20170200798 - Chen; Jin-Dah ; et al. | 2017-07-13 |
| Loading Effect Reduction Through Multiple Coat-etch Processes App 20170194443 - Chen; Jin-Dah ; et al. | 2017-07-06 |
| Method of making a FinFET device Grant 9,443,768 - Shieh , et al. September 13, 2 | 2016-09-13 |
| Method of Making a FinFET Device App 20150249039 - Shieh; Ming-Feng ; et al. | 2015-09-03 |
| Method Of Making a FinFET Device App 20150147867 - Shieh; Ming-Feng ; et al. | 2015-05-28 |
| Method of making a FinFET device Grant 9,034,723 - Shieh , et al. May 19, 2 | 2015-05-19 |
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