Wise; Rick L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wise; Rick L..The latest application filed is for "high mobility transistors".

Company Profile

2.31.38

Wise; Rick L. - Fairview TX
Wise, Rick L. - Plano TX
Wise; Rick L. - Sherman TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High Mobility Transistors App 20210225711 - Mehrotra; Manoj ; et al.	2021-07-22
High mobility transistors Grant 10,978,353 - Mehrotra , et al. April 13, 2	2021-04-13
High Mobility Transistors App 20190103321 - Mehrotra; Manoj ; et al.	2019-04-04
High mobility transistors Grant 10,163,725 - Mehrotra , et al. Dec	2018-12-25
Ultrashallow emitter formation using ALD and high temperature short time annealing Grant 10,026,815 - Wise , et al. July 17, 2	2018-07-17
Temperature compensated bulk acoustic wave resonator with a high coupling coefficient Grant 9,929,714 - Jacobsen , et al. March 27, 2	2018-03-27
High mobility transistors Grant 9,805,986 - Niimi , et al. October 31, 2	2017-10-31
High Mobility Transistors App 20170033018 - Mehrotra; Manoj ; et al.	2017-02-02
High mobility transistors Grant 9,496,262 - Mehrotra , et al. November 15, 2	2016-11-15
High Mobility Transistors App 20160225673 - Niimi; Hiroaki ; et al.	2016-08-04
Layer transfer of silicon onto III-nitride material for heterogenous integration Grant 9,396,948 - Tipirneni , et al. July 19, 2	2016-07-19
High Mobility Transistors App 20160204198 - Niimi; Hiroaki ; et al.	2016-07-14
High mobility transistors Grant 9,324,717 - Niimi , et al. April 26, 2	2016-04-26
Temperature Compensated Bulk Acoustic Wave Resonator With A High Coupling Coefficient App 20150295556 - Jacobsen; Stuart M. ; et al.	2015-10-15
Mechanically Robust Silicon Substrate Having Group Iiia-n Epitaxial Layer Thereon App 20150243494 - HAYDEN; MICHAEL LOUIS ; et al.	2015-08-27
High Mobility Transistors App 20150187773 - Niimi; Hiroaki ; et al.	2015-07-02
High Mobility Transistors App 20150187770 - Mehrotra; Manoj ; et al.	2015-07-02
Method To Improve Slip Resistance Of Silicon Wafers App 20150187597 - SUCHER; Bradley David ; et al.	2015-07-02
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET sidewall channels Grant 9,053,966 - Xiong , et al. June 9, 2	2015-06-09
Czochralski Substrates Having Reduced Oxygen Donors App 20150118861 - SUCHER; BRADLEY DAVID ; et al.	2015-04-30
Integrated Circuits With Aligned (100) Nmos And (110) Pmos Finfet Sidewall Channels App 20150014789 - Xiong; Weize W. ; et al.	2015-01-15
Ultrashallow Emitter Formation Using ALD and High Temperature Short Time Annealing App 20140339678 - WISE; Rick L. ; et al.	2014-11-20
Layer Transfer Of Silicon Onto Iii-nitride Material For Heterogenous Integration App 20140329370 - TIPIRNENI; Naveen ; et al.	2014-11-06
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels Grant 8,872,220 - Xiong , et al. October 28, 2	2014-10-28
Reduction of STI corner defects during SPE in semiconductor device fabrication using DSB substrate and hot technology Grant 8,846,487 - Pinto , et al. September 30, 2	2014-09-30
Ultrashallow emitter formation using ALD and high temperature short time annealing Grant 8,828,835 - Wise , et al. September 9, 2	2014-09-09
Accelerated furnace ramp rates for reduced slip Grant 8,759,198 - Sucher , et al. June 24, 2	2014-06-24
Accelerated Furnace Ramp Rates For Reduced Slip App 20140045321 - SUCHER; Bradley David ; et al.	2014-02-13
Integrated Circuits With Aligned (100) Nmos And (110) Pmos Finfet Sidewall Channels App 20140035057 - Xiong; Weize W. ; et al.	2014-02-06
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels Grant 8,410,519 - Xiong , et al. April 2, 2	2013-04-02
Extended Area Cover Plate For Integrated Infrared Sensor App 20130062720 - Wise; Rick L. ; et al.	2013-03-14
Reduction Of Sti Corner Defects During Spe In Semiconductor Device Fabrication Using Dsb Substrate And Hot Technology App 20130029471 - Pinto; Angelo ; et al.	2013-01-31
Integrated Circuits With Aligned (100) Nmos And (110) Pmos Finfet Sidewall Channels App 20120175710 - Xiong; Weize ; et al.	2012-07-12
Method for forming integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels Grant 8,138,035 - Xiong , et al. March 20, 2	2012-03-20
Method For Forming Integrated Circuits With Aligned (100) Nmos And (110) Pmos Finfet Sidewall Channels App 20110151651 - Xiong; Weize ; et al.	2011-06-23
Ultrashallow Emitter Formation Using ALD and High Temperature Short Time Annealing App 20110057289 - Wise; Rick L. ; et al.	2011-03-10
Method of making (100) NMOS and (110) PMOS sidewall surface on the same fin orientation for multiple gate MOSFET with DSB substrate Grant 7,897,994 - Xiong , et al. March 1, 2	2011-03-01
Reduction Of Sti Corner Defects During Spe In Semicondcutor Device Fabrication Using Dsb Substrate And Hot Technology App 20100304547 - Pinto; Angelo ; et al.	2010-12-02
Semiconductor device made by the method of producing hybrid orientnation (100) strained silicon with (110) silicon Grant 7,767,510 - Wise , et al. August 3, 2	2010-08-03
Method To Reduce Residual Sti Corner Defects Generated During Spe In The Fabrication Of Nano-scale Cmos Transistors Using Dsb Substrate And Hot Technology App 20090057816 - Pinto; Angelo ; et al.	2009-03-05
Method Of Making (100) Nmos And (110) Pmos Sidewall Surface On The Same Fin Orientation For Multiple Gate Mosfet With Dsb Substrate App 20080308847 - XIONG; Weize ; et al.	2008-12-18
Semiconductor Device Made by the Method of Producing Hybrid Orientnation (100) Strained Silicon with (110) Silicon App 20080303027 - Wise; Rick L. ; et al.	2008-12-11
Trench isolation structure having an implanted buffer layer Grant 7,443,007 - Wise , et al. October 28, 2	2008-10-28
Trench Isolation Structure and a Method of Manufacture Therefor App 20080185675 - Wise; Rick L. ; et al.	2008-08-07
Semiconductor Device Manufactured Using Passivation of Crystal Domain Interfaces in Hybrid Orientation Technology App 20080128821 - Pinto; Angelo ; et al.	2008-06-05
Trench isolation structure and a method of manufacture therefor Grant 7,371,658 - Wise , et al. May 13, 2	2008-05-13
Method of Manufacture for a Trench Isolation Structure Having an Implanted Buffer Layer App 20070085164 - Wise; Rick L. ; et al.	2007-04-19
Method of manufacture for a trench isolation structure having an implanted buffer layer Grant 7,160,782 - Wise , et al. January 9, 2	2007-01-09
Trench isolation structure having an implanted buffer layer and a method of manufacture therefor App 20050280115 - Wise, Rick L. ; et al.	2005-12-22
Trench isolation structure and a method of manufacture therefor App 20050282353 - Wise, Rick L. ; et al.	2005-12-22
Capacitor and memory structure and method App 20040228068 - Banerjee, Aditi ; et al.	2004-11-18
Capacitor and memory structure and method Grant 6,699,745 - Banerjee , et al. March 2, 2	2004-03-02
Process for monitoring the thickness of layers in a microelectronic device Grant 6,605,482 - Celii , et al. August 12, 2	2003-08-12
Process for reducing dopant loss for semiconductor devices App 20030129804 - Mehrotra, Manoj ; et al.	2003-07-10
Tunnel oxide App 20020063279 - Chen, Men-Chee ; et al.	2002-05-30
Post-in-crown Capacitor And Method Of Manufacture App 20020057548 - CRENSHAW, DARIUS L. ; et al.	2002-05-16
Process for monitoring the thickness of layers in a microelectronic device App 20020055197 - Celii, Francis G. ; et al.	2002-05-09
Integrated circuit isolation Grant 6,326,281 - Violette , et al. December 4, 2	2001-12-04
Rapid thermal annealing of doped polycrystalline silicon structures formed in a single-wafer cluster tool Grant 6,204,198 - Banerjee , et al. March 20, 2	2001-03-20
Method of and apparatus for purifying reduced pressure process chambers Grant 6,135,460 - Wise , et al. October 24, 2	2000-10-24
Corrugated post capacitor and method of fabricating using selective silicon deposition Grant 5,907,774 - Wise May 25, 1	1999-05-25
Method of forming thin epitaxial layers using multistep growth for autodoping control Grant 4,859,626 - Wise August 22, 1	1989-08-22

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