loadpatents
name:-0.038316011428833
name:-0.036854028701782
name:-0.001568078994751
Wilder; Tad J. Patent Filings

Wilder; Tad J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wilder; Tad J..The latest application filed is for "integrated circuit chip reliability qualification using a sample-specific expected fail rate".

Company Profile
1.33.32
  • Wilder; Tad J. - South Hero VT
  • Wilder; Tad J. - Essex Junction VT
  • Wilder; Tad J. - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Integrated circuit chip reliability qualification using a sample-specific expected fail rate
Grant 10,539,611 - Bickford , et al. Ja
2020-01-21
Methodology to prevent metal lines from current pulse damage
Grant 10,216,870 - Bickford , et al. Feb
2019-02-26
Critical path delay prediction
Grant 10,169,500 - Charlebois , et al. J
2019-01-01
Chip performance monitoring system and method
Grant 10,006,964 - Charlebois , et al. June 26, 2
2018-06-26
Burn-in power performance optimization
Grant 9,940,430 - Bickford , et al. April 10, 2
2018-04-10
Integrated Circuit Chip Reliability Qualification Using A Sample-specific Expected Fail Rate
App 20180052201 - Bickford; Jeanne P. ;   et al.
2018-02-22
Integrated circuit chip reliability qualification using a sample-specific expected fail rate
Grant 9,891,275 - Bickford , et al. February 13, 2
2018-02-13
On-chip usable life depletion meter and associated method
Grant 9,791,502 - Bickford , et al. October 17, 2
2017-10-17
Resistance Measurement-dependent Integrated Circuit Chip Reliability Estimation
App 20170212165 - Bickford; Jeanne P. ;   et al.
2017-07-27
Methodology To Prevent Metal Lines From Current Pulse Damage
App 20170199949 - BICKFORD; JEANNE P. S. ;   et al.
2017-07-13
Burn-in Power Performance Optimization
App 20170161426 - Bickford; Jeanne P. ;   et al.
2017-06-08
Integrated circuit chip reliability using reliability-optimized failure mechanism targeting
Grant 9,639,645 - Bickford , et al. May 2, 2
2017-05-02
System and method for identifying operating temperatures and modifying of integrated circuits
Grant 9,625,325 - Bickford , et al. April 18, 2
2017-04-18
Integrated Circuit Chip Reliability Qualification Using A Sample-specific Expected Fail Rate
App 20160377674 - Bickford; Jeanne P. ;   et al.
2016-12-29
Integrated Circuit Chip Reliability Using Reliability-optimized Failure Mechanism Targeting
App 20160371413 - Bickford; Jeanne P. ;   et al.
2016-12-22
Reliability-optimized selective voltage binning
Grant 9,489,482 - Bickford , et al. November 8, 2
2016-11-08
On-chip Usable Life Depletion Meter And Associated Method
App 20160320214 - Bickford; Jeanne P. ;   et al.
2016-11-03
System And Method For Identifying Operating Temperatures And Modifying Of Integrated Circuits
App 20160240479 - Bickford; Jeanne P. ;   et al.
2016-08-18
Systems And Methods To Prevent Incorporation Of A Used Integrated Circuit Chip Into A Product
App 20160238653 - Bickford; Jeanne P. ;   et al.
2016-08-18
Chip Performance Monitoring System And Method
App 20160231379 - Charlebois; Margaret R. ;   et al.
2016-08-11
Chip performance monitoring system and method
Grant 9,383,766 - Charlebois , et al. July 5, 2
2016-07-05
Flexible performance screen ring oscillator within a scan chain
Grant 9,188,643 - Charlebois , et al. November 17, 2
2015-11-17
Adaptive power control using timing canonicals
Grant 9,157,956 - Bickford , et al. October 13, 2
2015-10-13
Performance screen ring oscillator formed from paired scan chains
Grant 9,128,151 - Charlebois , et al. September 8, 2
2015-09-08
Performance screen ring oscillator formed from multi-dimensional pairings of scan chains
Grant 9,097,765 - Charlebois , et al. August 4, 2
2015-08-04
Chip Performance Monitoring System And Method
App 20140195196 - Charlebois; Margaret R. ;   et al.
2014-07-10
Ring oscillator
Grant 8,754,696 - Charlebois , et al. June 17, 2
2014-06-17
Flexible Performance Screen Ring Oscillator Within A Scan Chain
App 20140132290 - Charlebois; Margaret R. ;   et al.
2014-05-15
Adaptive Power Control Using Timing Canonicals
App 20140074422 - Bickford; Jeanne P. ;   et al.
2014-03-13
Ring Oscillator
App 20140028365 - Charlebois; Margaret R. ;   et al.
2014-01-30
Circuit design using design variable function slope sensitivity
Grant 8,464,199 - Charlebois , et al. June 11, 2
2013-06-11
Method and apparatus for increased effectiveness of delay and transition fault testing
Grant 8,381,050 - Gillis , et al. February 19, 2
2013-02-19
Critical Path Delay Prediction
App 20130041608 - Charlebois; Margaret R. ;   et al.
2013-02-14
Semiconductor layer forming method and structure
Grant 8,341,588 - Herzl , et al. December 25, 2
2012-12-25
Method and system to optimize semiconductor products for power, performance, noise, and cost through use of variable power supply voltage compression
Grant 8,302,063 - Bickford , et al. October 30, 2
2012-10-30
Method And Device For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes
App 20120167022 - HERZL; Robert D. ;   et al.
2012-06-28
Method for identifying and implementing flexible logic block logic for easy engineering changes
Grant 8,181,148 - Herzl , et al. May 15, 2
2012-05-15
Semiconductor Layer Forming Method And Structure
App 20120083913 - Herzl; Robert D. ;   et al.
2012-04-05
Structure for identifying and implementing flexible logic block logic for easy engineering changes
Grant 8,141,028 - Herzl , et al. March 20, 2
2012-03-20
Chip design and fabrication method optimized for profit
Grant 8,086,988 - Buck , et al. December 27, 2
2011-12-27
Method And System To Optimize Semiconductor Products For Power, Performance, Noise, And Cost Through Use Of Variable Power Supply Voltage Compression
App 20110288829 - BICKFORD; Jeanne P. ;   et al.
2011-11-24
Minimizing impact of design changes for integrated circuit designs
Grant 8,060,845 - Herzl , et al. November 15, 2
2011-11-15
Method And Apparatus For Increased Effectiveness Of Delay And Transistion Fault Testing
App 20110121838 - Gillis; Pamela S. ;   et al.
2011-05-26
Chip Design And Fabrication Method Optimized For Profit
App 20100293512 - Buck; Nathan ;   et al.
2010-11-18
Method for Minimizing Impact of Design Changes For Integrated Circuit Designs
App 20100017773 - Herzl; Robert D. ;   et al.
2010-01-21
Method and Device for Identifying and Implementing Flexible Logic Block Logic for Easy Engineering Changes
App 20090183135 - Herzl; Robert D. ;   et al.
2009-07-16
Design Structure For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes
App 20090183134 - Herzl; Robert D. ;   et al.
2009-07-16
LSSD-compatible edge-triggered shift register latch
Grant 7,543,203 - Ashton , et al. June 2, 2
2009-06-02
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change
App 20090045839 - HERZL; Robert D. ;   et al.
2009-02-19
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change
App 20090045836 - Herzl; Robert D. ;   et al.
2009-02-19
Partial good integrated circuit and method of testing same
Grant 7,478,301 - Farnsworth, III , et al. January 13, 2
2009-01-13
Partial good integrated circuit and method of testing same
Grant 7,434,129 - Farnsworth, III , et al. October 7, 2
2008-10-07
Partial Good Integrated Circuit And Method Of Testing Same
App 20080209289 - Farnsworth; Leonard O. ;   et al.
2008-08-28
Partial Good Integrated Circuit And Method Of Testing Same
App 20080010571 - Farnsworth; Leonard O. III ;   et al.
2008-01-10
Partial good integrated circuit and method of testing same
Grant 7,305,600 - Farnsworth, III , et al. December 4, 2
2007-12-04
Lssd-compatible Edge-triggered Shift Register Latch
App 20050204244 - Ashton, Gerry ;   et al.
2005-09-15
Partial good integrated circuit and method of testing same
App 20050047224 - Farnsworth, Leonard O. III ;   et al.
2005-03-03

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