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name:-0.064023971557617
name:-0.036186933517456
name:-0.02959680557251
WEBER; Cory E. Patent Filings

WEBER; Cory E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for WEBER; Cory E..The latest application filed is for "semiconductor nanowire device having (111)-plane channel sidewalls".

Company Profile
22.28.44
  • WEBER; Cory E. - Hillsboro OR
  • - Hillsboro OR US
  • Weber, Cory E. - Beaverton OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor Nanowire Device Having (111)-plane Channel Sidewalls
App 20220310600 - WEBER; Cory E. ;   et al.
2022-09-29
Semiconductor nanowire device having (111)-plane channel sidewalls
Grant 11,398,478 - Weber , et al. July 26, 2
2022-07-26
Extension Of Nanocomb Transistor Arrangements To Implement Gate All Around
App 20220093474 - Mishra; Varun ;   et al.
2022-03-24
Methods of doping fin structures of non-planar transistor devices
Grant 11,264,453 - Weber , et al. March 1, 2
2022-03-01
Methods of doping fin structures of non-planar transistor devices
Grant 11,222,947 - Weber , et al. January 11, 2
2022-01-11
Source/drain Regions In Integrated Circuit Structures
App 20210384307 - Ma; Sean T. ;   et al.
2021-12-09
Techniques for increasing channel region tensile strain in n-MOS devices
Grant 11,011,620 - Mehandru , et al. May 18, 2
2021-05-18
Vertically stacked devices with self-aligned regions formed by direct self assembly (DSA) processing
Grant 10,991,696 - Lilak , et al. April 27, 2
2021-04-27
Semiconductor Nanowire Device Having (111)-plane Channel Sidewalls
App 20210074703 - WEBER; Cory E. ;   et al.
2021-03-11
Vertical Integration Scheme And Circuit Elements Architecture For Area Scaling Of Semiconductor Devices
App 20210043755 - MEHANDRU; Rishabh ;   et al.
2021-02-11
Nanowire Structures Having Wrap-around Contacts
App 20210036137 - CEA; Stephen M. ;   et al.
2021-02-04
Backside fin recess control with multi-HSI option
Grant 10,910,405 - Lilak , et al. February 2, 2
2021-02-02
Improved Contacts To N-type Transistors With L-valley Channels
App 20200411690 - Crum; Dax M. ;   et al.
2020-12-31
Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices
Grant 10,847,635 - Mehandru , et al. November 24, 2
2020-11-24
Semiconductor device having metallic source and drain regions
Grant 10,847,653 - Giles , et al. November 24, 2
2020-11-24
Nanowire structures having wrap-around contacts
Grant 10,840,366 - Cea , et al. November 17, 2
2020-11-17
Reducing Off-state Leakage In Semiconductor Devices
App 20200279910 - Basu; Dipanjan ;   et al.
2020-09-03
Charge Trap Layer In Back-gated Thin-film Transistors
App 20200220024 - Sharma; Abhishek A. ;   et al.
2020-07-09
Backside Fin Recess Control With Multi-hsi Option
App 20200176482 - LILAK; Aaron D. ;   et al.
2020-06-04
Transistor With Wide Bandgap Channel And Narrow Bandgap Source/drain
App 20200144374 - MA; Sean T. ;   et al.
2020-05-07
Backside fin recess control with multi-hsi option
Grant 10,600,810 - Lilak , et al.
2020-03-24
Nanowire Structures Having Wrap-around Contacts
App 20200035818A1 -
2020-01-30
Tunneling Contacts For A Transistor
App 20200013861 - Sharma; Abhishek A. ;   et al.
2020-01-09
Methods for doping a sub-fin region of a semiconductor structure by backside reveal and associated devices
Grant 10,497,781 - Lilak , et al. De
2019-12-03
Nanowire structures having wrap-around contacts
Grant 10,483,385 - Cea , et al. Nov
2019-11-19
Direct Self Assembly (dsa) Processing Of Vertically Stacked Devices With Self-aligned Regions
App 20190341384 - Lilak; Aaron D. ;   et al.
2019-11-07
Hybrid trigate and nanowire CMOS device architecture
Grant 10,411,090 - Weber , et al. Sept
2019-09-10
Methods Of Doping Fin Structures Of Non-planar Transistor Devices
App 20190267448 - Weber; Cory E. ;   et al.
2019-08-29
Vertical Integration Scheme And Circuit Elements Architecture For Area Scaling Of Semiconductor Devices
App 20190252525 - MEHANDRU; Rishabh ;   et al.
2019-08-15
Techniques For Increasing Channel Region Tensile Strain In N-mos Devices
App 20190207015 - MEHANDRU; RISHABH ;   et al.
2019-07-04
Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices
Grant 10,304,946 - Mehandru , et al.
2019-05-28
Backside Fin Recess Control With Multi-hsi Option
App 20190027503 - LILAK; Aaron D. ;   et al.
2019-01-24
Enhanced dislocation stress transistor
Grant 10,084,087 - Weber , et al. September 25, 2
2018-09-25
Methods Of Doping Fin Structures Of Non-planar Transistor Devices
App 20180254320 - Weber; Cory E. ;   et al.
2018-09-06
Methods For Doping A Sub-fin Region Of A Semiconductor Structure By Backside Reveal And Associated Devices
App 20180248005 - LILAK; Aaron D. ;   et al.
2018-08-30
Resistance Reduction Under Transistor Spacers
App 20180240874 - WEBER; CORY E. ;   et al.
2018-08-23
Hybrid Trigate And Nanowire Cmos Device Architecture
App 20180212023 - WEBER; Cory E. ;   et al.
2018-07-26
Vertical Integration Scheme And Circuit Elements Architecture For Area Scaling Of Semiconductor Devices
App 20180204932 - MEHANDRU; Rishabh ;   et al.
2018-07-19
Resistance Reduction In Transistors Having Epitaxially Grown Source/drain Regions
App 20180151732 - MEHANDRU; RISHABH ;   et al.
2018-05-31
Enhanced Dislocation Stress Transistor
App 20170222052 - Weber; Cory E. ;   et al.
2017-08-03
Enhanced dislocation stress transistor
Grant 9,660,078 - Weber , et al. May 23, 2
2017-05-23
Semiconductor Device Having Metallic Source And Drain Regions
App 20170125591 - GILES; Martin D. ;   et al.
2017-05-04
Semiconductor device having metallic source and drain regions
Grant 9,583,487 - Giles , et al. February 28, 2
2017-02-28
Enhanced Dislocation Stress Transistor
App 20160079423 - Weber; Cory E. ;   et al.
2016-03-17
Enhanced dislocation stress transistor
Grant 9,231,076 - Weber , et al. January 5, 2
2016-01-05
Enhanced Dislocation Stress Transistor
App 20150155384 - Weber; Cory E. ;   et al.
2015-06-04
Nanowire Structures Having Wrap-around Contacts
App 20140209855 - Cea; Stephen M. ;   et al.
2014-07-31
Semiconductor Device Having Metallic Source And Drain Regions
App 20140035059 - Giles; Martin D. ;   et al.
2014-02-06
Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation
App 20110147804 - Mehandru; Rishabh ;   et al.
2011-06-23
Epitaxial silicon germanium for reduced contact resistance in field-effect transistors
Grant 7,851,291 - Shifren , et al. December 14, 2
2010-12-14
Epitaxial silicon germanium for reduced contact resistance in field-effect transistors
App 20090230480 - Shifren; Lucian ;   et al.
2009-09-17
Epitaxial silicon germanium for reduced contact resistance in field-effect transistors
Grant 7,566,605 - Shifren , et al. July 28, 2
2009-07-28
Carbon Controlled Fixed Charge Process
App 20090011581 - Weber; Cory E. ;   et al.
2009-01-08
Epitaxial silicon germanium for reduced contact resistance in field-effect transistors
App 20070231983 - Shifren; Lucian ;   et al.
2007-10-04
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
Grant 7,226,824 - Weber , et al. June 5, 2
2007-06-05
Indium-boron dual halo MOSFET
Grant 7,226,843 - Weber , et al. June 5, 2
2007-06-05
Carbon controlled fixed charge process
App 20070077739 - Weber; Cory E. ;   et al.
2007-04-05
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
Grant 7,187,057 - Weber , et al. March 6, 2
2007-03-06
High concentration indium fluorine retrograde wells
Grant 7,129,533 - Weber , et al. October 31, 2
2006-10-31
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
App 20050017309 - Weber, Cory E. ;   et al.
2005-01-27
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
App 20050014351 - Weber, Cory E. ;   et al.
2005-01-20
High concentration indium fluorine retrograde wells
Grant 6,838,329 - Weber , et al. January 4, 2
2005-01-04
Nitrogen controlled growth of dislocation loop in stress enhanced transistor
Grant 6,800,887 - Weber , et al. October 5, 2
2004-10-05
High concentration indium fluorine retrograde wells
App 20040188767 - Weber, Cory E. ;   et al.
2004-09-30
High concentration indium fluorine retrograde wells
App 20040192055 - Weber, Cory E. ;   et al.
2004-09-30
Nitrogen Controlled Growth Of Dislocation Loop In Stress Enhanced Transistor
App 20040191975 - Weber, Cory E. ;   et al.
2004-09-30
Indium-boron dual halo MOSFET
App 20040061187 - Weber, Cory E. ;   et al.
2004-04-01
Reduced leakage trench isolation
App 20010019851 - Connolly, Kevin M. ;   et al.
2001-09-06

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