Wang; Ling-Sung

Patent Applications and Registrations

Patent applications and USPTO patent grants for Wang; Ling-Sung.The latest application filed is for "circuit structure with gate configuration".

Company Profile

7.91.88

Wang; Ling-Sung - Tainan TW
WANG; Ling-Sung - Hsinchu TW
Wang; Ling-Sung - Tainan City TW
Wang; Ling-Sung - Hsin-Chu TW
Wang; Ling-Sung - Hsinchu City TW
Wang; Ling-Sung - Hsin-Chu City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device Grant 11,443,093 - Chen , et al. September 13, 2	2022-09-13
Method Of Forming Semiconductor Device Including Trimmed-gates App 20210305261 - CHEN; Yu-Jen ; et al.	2021-09-30
Circuit Structure with Gate Configuration App 20210305386 - Hsiao; Ru-Shang ; et al.	2021-09-30
Semiconductor device including trimmed-gates Grant 11,037,935 - Chen , et al. June 15, 2	2021-06-15
P-Type FinFET as an Radio-Frequency Device and Method Forming Same App 20210159326 - Hsiao; Ru-Shang ; et al.	2021-05-27
Semiconductor Device App 20200203167 - CHEN; Yu-Jen ; et al.	2020-06-25
Semiconductor Device Including Trimmed-gates App 20190341389 - CHEN; Yu-Jen ; et al.	2019-11-07
Semiconductor device, corresponding mask and method for generating layout of same Grant 10,417,369 - Chen , et al. Sept	2019-09-17
Semiconductor device including trimmed-gates and method for generating layout of same Grant 10,373,962 - Chen , et al.	2019-08-06
Gate-end Structure Engineering For Semiconductor Applications App 20190019732 - HUNG; CHAN-YU ; et al.	2019-01-17
Gate-end structure engineering for semiconductor applications Grant 10,181,425 - Hung , et al. Ja	2019-01-15
Source/drain recess volume trim for improved device performance and layout dependence Grant 10,158,004 - Chen , et al. Dec	2018-12-18
Semiconductor Device, Corresponding Mask And Method For Generating Layout Of Same App 20180341736 - CHEN; Yu-Jen ; et al.	2018-11-29
Semiconductor Device Including Trimmed-gates And Method For Generating Layout Of Same App 20180342523 - CHEN; Yu-Jen ; et al.	2018-11-29
Semiconductor device and manufacturing method thereof Grant 10,090,392 - Chen , et al. October 2, 2	2018-10-02
Salicide Formation Using A Cap Layer App 20180261461 - Lin; Mei-Hsuan ; et al.	2018-09-13
Maranagoni dry with low spin speed for charging release Grant 10,043,653 - Chen , et al. August 7, 2	2018-08-07
Sandwich EPI channel for device enhancement Grant 10,008,501 - Hsiao , et al. June 26, 2	2018-06-26
Salicide formation using a cap layer Grant 9,978,604 - Lin , et al. May 22, 2	2018-05-22
Structure and method for semiconductor device Grant 9,893,150 - Chiang , et al. February 13, 2	2018-02-13
Voids in interconnect structures and methods for forming the same Grant 9,837,348 - Huang , et al. December 5, 2	2017-12-05
Surface profile for semiconductor region Grant 9,831,314 - Chen , et al. November 28, 2	2017-11-28
Stress tuning for reducing wafer warpage Grant 9,818,704 - Wang , et al. November 14, 2	2017-11-14
Source/drain Recess Volume Trim For Improved Device Performance And Layout Dependence App 20170317186 - Chen; Chao-Hsuing ; et al.	2017-11-02
V-shaped SiGe recess volume trim for improved device performance and layout dependence Grant 9,735,252 - Chen , et al. August 15, 2	2017-08-15
Methods and apparatus for doped SiGe source/drain stressor deposition Grant 9,722,082 - Chen , et al. August 1, 2	2017-08-01
Device boost by quasi-FinFET Grant 9,634,122 - Hsiao , et al. April 25, 2	2017-04-25
Stress Tuning for Reducing Wafer Warpage App 20170047297 - Wang; Yung-Yao ; et al.	2017-02-16
Dual vertical channel Grant 9,564,487 - Hsiao , et al. February 7, 2	2017-02-07
Device having sloped gate profile and method of manufacture Grant 9,543,399 - Hsiao , et al. January 10, 2	2017-01-10
Sandwich Epi Channel For Device Enhancement App 20170005095 - Hsiao; Ru-Shang ; et al.	2017-01-05
Stress tuning for reducing wafer warpage Grant 9,484,303 - Wang , et al. November 1, 2	2016-11-01
Sandwich epi channel for device enhancement Grant 9,466,670 - Hsiao , et al. October 11, 2	2016-10-11
V-shaped Sige Recess Volume Trim For Improved Device Performance And Layout Dependence App 20160254366 - Chen; Chao-Hsuing ; et al.	2016-09-01
Methods and Apparatus for Doped SiGe Source/Drain Stressor Deposition App 20160240673 - Chen; Chao-Hsuing ; et al.	2016-08-18
V-shaped SiGe recess volume trim for improved device performance and layout dependence Grant 9,385,215 - Chen , et al. July 5, 2	2016-07-05
Structure and Method for Semiconductor Device App 20160155806 - Chiang; Chen-Chieh ; et al.	2016-06-02
Salicide formation using a cap layer Grant 9,343,318 - Lin , et al. May 17, 2	2016-05-17
Methods and apparatus for doped SiGe source/drain stressor deposition Grant 9,324,836 - Chen , et al. April 26, 2	2016-04-26
Shallow trench isolation structure Grant 9,318,371 - Hsiao , et al. April 19, 2	2016-04-19
Reliability assessment of capacitor device Grant 9,310,425 - Jiun-Jie , et al. April 12, 2	2016-04-12
Salicide Formation Using A Cap Layer App 20160093497 - LIN; Mei-Hsuan ; et al.	2016-03-31
Semiconductor device having V-shaped region Grant 9,269,812 - Chen , et al. February 23, 2	2016-02-23
Structure and method for semiconductor device Grant 9,246,002 - Hsiao , et al. January 26, 2	2016-01-26
Three-direction alignment mark Grant 9,217,917 - Hsiao , et al. December 22, 2	2015-12-22
N/P MOS FinFET performance enhancement by specific orientation surface Grant 9,209,304 - Hsiao , et al. December 8, 2	2015-12-08
MOS devices having non-uniform stressor doping Grant 9,209,270 - Lin , et al. December 8, 2	2015-12-08
Methods and Apparatus for Doped SiGe Source/Drain Stressor Deposition App 20150349090 - Chen; Chao-Hsuing ; et al.	2015-12-03
Surface Profile For Semiconductor Region App 20150340447 - Chen; Chao-Hsuing ; et al.	2015-11-26
SiGe SRAM butted contact resistance improvement Grant 9,196,545 - Chen , et al. November 24, 2	2015-11-24
Voids in Interconnect Structures and Methods for Forming the Same App 20150333003 - Huang; Jiun-Jie ; et al.	2015-11-19
Device Having Sloped Gate Profile and Method of Manufacture App 20150287798 - Hsiao; Ru-Shang ; et al.	2015-10-08
Methods and apparatus for doped SiGe source/drain stressor deposition Grant 9,142,642 - Chen , et al. September 22, 2	2015-09-22
Structure and Method for Semiconductor Device App 20150263168 - Hsiao; Ru-Shang ; et al.	2015-09-17
Device Boost By Quasi-finfet App 20150263136 - Hsiao; Ru-Shang ; et al.	2015-09-17
Sandwich Epi Channel For Device Enhancement App 20150263092 - Hsiao; Ru-Shang ; et al.	2015-09-17
Three-Direction Alignment Mark App 20150241768 - Hsiao; Ru-Shang ; et al.	2015-08-27
Shallow Trench Isolation Structure App 20150243653 - Hsiao; Ru-Shang ; et al.	2015-08-27
Dual Vertical Channel App 20150236094 - Hsiao; Ru-Shang ; et al.	2015-08-20
N/p Mos Finfet Performance Enhancement By Specific Orientation Surface App 20150228794 - Hsiao; Ru-Shang ; et al.	2015-08-13
Voids in interconnect structures and methods for forming the same Grant 9,105,634 - Huang , et al. August 11, 2	2015-08-11
Surface profile for semiconductor region Grant 9,099,421 - Chen , et al. August 4, 2	2015-08-04
Semiconductor Device And Manufacturing Method Thereof App 20150206945 - CHEN; I-CHIH ; et al.	2015-07-23
Semiconductor devices with self-heating structures, methods of manufacture thereof, and testing methods Grant 9,076,751 - Ko , et al. July 7, 2	2015-07-07
Metal-oxide-metal capacitor apparatus with a via-hole region Grant 9,064,841 - Huang , et al. June 23, 2	2015-06-23
MOS Devices Having Non-Uniform Stressor Doping App 20150171189 - Lin; Mei-Hsuan ; et al.	2015-06-18
SRAM cells with dummy insertions Grant 9,053,974 - Chen , et al. June 9, 2	2015-06-09
Semiconductor Device Having V-shaped Region App 20150137182 - Chen; Chao-Hsuing ; et al.	2015-05-21
Semiconductor structure having stressor Grant 9,024,391 - Lin , et al. May 5, 2	2015-05-05
MOS devices having non-uniform stressor doping Grant 8,994,097 - Lin , et al. March 31, 2	2015-03-31
Semiconductor Structure Having Stressor App 20150041857 - LIN; Mei-Hsuan ; et al.	2015-02-12
Semiconductor device having v-shaped region Grant 8,940,594 - Chen , et al. January 27, 2	2015-01-27
System and method of monitoring and controlling atomic layer deposition of tungsten Grant 8,900,886 - Chen , et al. December 2, 2	2014-12-02
SiGe SRAM BUTTED CONTACT RESISTANCE IMPROVEMENT App 20140295630 - Chen; Chao-Hsuing ; et al.	2014-10-02
Integrated circuit having a stressor and method of forming the same Grant 8,846,492 - Lin , et al. September 30, 2	2014-09-30
Stress Tuning for Reducing Wafer Warpage App 20140264931 - Wang; Yung-Yao ; et al.	2014-09-18
V-shaped Sige Recess Volume Trim For Improved Device Performance And Layout Dependence App 20140264440 - Chen; Chao-Hsuing ; et al.	2014-09-18
Semiconductor structure having etch stop layer Grant 8,836,088 - Lin , et al. September 16, 2	2014-09-16
Optical proximity correction for active region design layout Grant 8,775,982 - Lin , et al. July 8, 2	2014-07-08
SiGe SRAM butted contact resistance improvement Grant 8,766,256 - Chen , et al. July 1, 2	2014-07-01
Method of manufacturing a semiconductor device Grant 8,765,545 - Lin , et al. July 1, 2	2014-07-01
Semiconductor Device Having V-shaped Region App 20140175556 - Chen; Chao-Hsuing ; et al.	2014-06-26
Surface Profile For Semiconductor Region App 20140117512 - Chen; Chao-Hsuing ; et al.	2014-05-01
Maranagoni Dry with Low Spin Speed for Charging Release App 20140053869 - Chen; Wei-Cheng ; et al.	2014-02-27
SRAM Cells with Dummy Insertions App 20140054716 - Chen; Chao-Hsuing ; et al.	2014-02-27
Nitrogen passivation of source and drain recesses Grant 8,659,089 - Ko , et al. February 25, 2	2014-02-25
Voids in Interconnect Structures and Methods for Forming the Same App 20140001597 - Huang; Jiun-Jie ; et al.	2014-01-02
SiGe SRAM BUTTED CONTACT RESISTANCE IMPROVEMENT App 20130328127 - Chen; Chao-Hsuing ; et al.	2013-12-12
System And Method Of Monitoring And Controlling Atomic Layer Deposition Of Tungsten App 20130323859 - CHEN; Kun-Ei ; et al.	2013-12-05
Method for forming semiconductor device Grant 8,586,486 - Chen , et al. November 19, 2	2013-11-19
Semiconductor Structure Having Etch Stop Layer App 20130299987 - LIN; Mei-Hsuan ; et al.	2013-11-14
Optical Proximity Correction For Active Region Design Layout App 20130285194 - Lin; Mei-Hsuan ; et al.	2013-10-31
Metal-oxide-metal capacitor structure Grant 8,558,350 - Huang , et al. October 15, 2	2013-10-15
Method Of Manufacturing A Semiconductor Device App 20130267069 - Lin; Mei-Hsuan ; et al.	2013-10-10
Rapid Thermal Anneal System And Process App 20130240502 - CHEN; Ren-Yi ; et al.	2013-09-19
MOS Devices Having Non-Uniform Stressor Doping App 20130234217 - Lin; Mei-Hsuan ; et al.	2013-09-12
Optical proximity correction for active region design layout Grant 8,533,639 - Lin , et al. September 10, 2	2013-09-10
Method and system for modifying doped region design layout during mask preparation to tune device performance Grant 8,527,915 - Lin , et al. September 3, 2	2013-09-03
Semiconductor structure and method of manufacturing Grant 8,513,143 - Lin , et al. August 20, 2	2013-08-20
Methods and Apparatus for Doped SiGe Source/Drain Stressor Deposition App 20130207166 - Chen; Chao-Hsuing ; et al.	2013-08-15
Salicide Formation Using A Cap Layer App 20130200442 - LIN; Mei-Hsuan ; et al.	2013-08-08
Enhanced wafer test line structure Grant 8,476,629 - Huang , et al. July 2, 2	2013-07-02
Method of manufacturing a semiconductor device Grant 8,470,660 - Lin , et al. June 25, 2	2013-06-25
Method For Forming Semiconductor Device App 20130157467 - CHEN; Jen-Yi ; et al.	2013-06-20
Reducing metal pits through optical proximity correction Grant 8,468,474 - Huang , et al. June 18, 2	2013-06-18
Method And System For Modifying Doped Region Design Layout During Mask Preparation To Tune Device Performance App 20130111419 - Lin; Mei-Hsuan ; et al.	2013-05-02
Metal-Oxide-Metal Capacitor Structure App 20130093047 - Huang; Jiun-Jie ; et al.	2013-04-18
Metal-Oxide-Metal Capacitor Apparatus App 20130087885 - Huang; Jiun-Jie ; et al.	2013-04-11
Nitrogen Passivation Of Source And Drain Recesses App 20130087857 - Ko; Jia-Yang ; et al.	2013-04-11
Enhanced Wafer Test Line Structure App 20130075725 - Huang; Jiun-Jie ; et al.	2013-03-28
Method of Manufacturing a Semiconductor Device App 20130071995 - Lin; Mei-Hsuan ; et al.	2013-03-21
Optical Proximity Correction For Active Region Design Layout App 20130069162 - Lin; Mei-Hsuan ; et al.	2013-03-21
Semiconductor Devices with Self-heating Structures, Methods of Manufacture Thereof, and Testing Methods App 20130049781 - Ko; Jia Yang ; et al.	2013-02-28
Semiconductor Structure And Method Of Manufacturing App 20130043590 - LIN; Mei-Hsuan ; et al.	2013-02-21
Integrated Circuit Having A Stressor And Method Of Forming The Same App 20130020717 - LIN; Mei-Hsuan ; et al.	2013-01-24
Reducing Metal Pits Through Optical Proximity Correction App 20130024833 - Huang; Jiun-Jie ; et al.	2013-01-24
Reliability Assessment Of Capacitor Device App 20130002263 - Jiun-Jie; Huang ; et al.	2013-01-03
Reducing metal pits through optical proximity correction Grant 8,341,562 - Huang , et al. December 25, 2	2012-12-25
Polysilicon Gate With Nitrogen Doped High-k Dielectric And Silicon Dioxide App 20120313186 - HUANG; Ching-Chien ; et al.	2012-12-13
Constant and reducible hole bottom CD in variable post-CMP thickness and after-development-inspection CD Grant 8,207,532 - Kao , et al. June 26, 2	2012-06-26
Positive-intrinsic-negative (PIN) diode semiconductor devices and fabrication methods thereof Grant 7,473,986 - Ang , et al. January 6, 2	2009-01-06
Semiconductor Devices And Fabrication Methods Thereof App 20080073755 - Ang; Kern-Huat ; et al.	2008-03-27
Retrograde trench isolation structures Grant 7,339,253 - Tsai , et al. March 4, 2	2008-03-04
Process for providing ESD protection by using contact etch module Grant 7,078,283 - Wang July 18, 2	2006-07-18
Damascene MIM capacitor structure with self-aligned oxidation fabrication process App 20060148192 - Chou; You-Hua ; et al.	2006-07-06
Retrograde trench isolation structures App 20060033179 - Tsai; Chao-Tzung ; et al.	2006-02-16
Approach to prevent undercut of oxide layer below gate spacer through nitridation Grant 6,916,718 - Chen , et al. July 12, 2	2005-07-12
Constant and reducible hole bottom CD in variable post-CMP thickness and after-development-inspection CD App 20050059251 - Kao, Chi-An ; et al.	2005-03-17
Approach to prevent spacer undercut by low temperature nitridation App 20040005750 - Chen, Ying-Lin ; et al.	2004-01-08
Approach to prevent spacer undercut by low temperature nitridation Grant 6,610,571 - Chen , et al. August 26, 2	2003-08-26
Shallow trench isolation (STI) module to improve contact etch process window Grant 6,500,728 - Wang December 31, 2	2002-12-31
Process flow to reduce spacer undercut phenomena Grant 6,448,167 - Wang , et al. September 10, 2	2002-09-10
Fabrication method of a device isolation structure Grant 6,258,694 - Wang , et al. July 10, 2	2001-07-10
EPROM cell structure and a method for forming the EPROM cell structure Grant 6,255,164 - Liu , et al. July 3, 2	2001-07-03
Multi-level flash memory using triple well process and method of making Grant 6,207,507 - Wang March 27, 2	2001-03-27
Method of fabricating a flash memory Grant 6,146,946 - Wang , et al. November 14, 2	2000-11-14
Multi-level flash memory using triple well Grant 6,091,101 - Wang July 18, 2	2000-07-18