Wang; Bonnie I.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Wang; Bonnie I..The latest application filed is for "programmable high-speed i/o interface".
Company Profile
0.81.23
- Wang; Bonnie I. - San Jose CA
- Wang; Bonnie I. - Cupertino CA
- Wang; Bonnie I - Cupertino CA
Patent Activity
| Patent | Date |
|---|---|
| On-die input reference voltage with self-calibrating duty cycle correction Grant 9,711,189 - Wang , et al. July 18, 2 | 2017-07-18 |
| Programmable High-Speed I/O Interface App 20170005661 - Wang; Bonnie I. ; et al. | 2017-01-05 |
| Programmable High-Speed I/O Interface App 20170005662 - Wang; Bonnie I. ; et al. | 2017-01-05 |
| Programmable high-speed I/O interface Grant 9,473,145 - Wang , et al. October 18, 2 | 2016-10-18 |
| Input-output buffer circuit with a gate bias generator Grant 9,385,718 - Liu , et al. July 5, 2 | 2016-07-05 |
| Integrated circuits having input-output circuits with dedicated memory controller circuitry Grant 9,330,218 - Chiu , et al. May 3, 2 | 2016-05-03 |
| Multiple data rate interface architecture Grant 9,166,589 - Pan , et al. October 20, 2 | 2015-10-20 |
| Input-output circuitry for integrated circuits Grant 9,106,230 - Wang , et al. August 11, 2 | 2015-08-11 |
| Adjustable drive strength input-output buffer circuitry Grant 9,099,999 - Wang , et al. August 4, 2 | 2015-08-04 |
| Programmable high-speed voltage-mode differential driver Grant 9,065,399 - Wang , et al. June 23, 2 | 2015-06-23 |
| Programmable High-speed Voltage-mode Differential Driver App 20140368272 - WANG; Bonnie I. ; et al. | 2014-12-18 |
| Programmable High-speed I/o Interface App 20140340125 - Wang; Bonnie I. ; et al. | 2014-11-20 |
| Dynamic termination-impedance control for bidirectional I/O pins Grant 8,854,078 - Wang , et al. October 7, 2 | 2014-10-07 |
| Programmable high-speed I/O interface Grant 8,829,948 - Wang , et al. September 9, 2 | 2014-09-09 |
| Write-leveling implementation in programmable logic devices Grant 8,671,303 - Chong , et al. March 11, 2 | 2014-03-11 |
| Multiple Data Rate Interface Architecture App 20140049287 - Pan; Philip ; et al. | 2014-02-20 |
| Input-output circuit and method of improving input-output signals Grant 8,610,462 - Wang , et al. December 17, 2 | 2013-12-17 |
| Multiple data rate interface architecture Grant 8,575,957 - Pan , et al. November 5, 2 | 2013-11-05 |
| Programmable High-speed I/o Interface App 20130278290 - Wang; Bonnie I. ; et al. | 2013-10-24 |
| Programmable output buffer Grant 8,531,205 - Wang , et al. September 10, 2 | 2013-09-10 |
| Programmable high-speed interface Grant 8,487,665 - Wang , et al. July 16, 2 | 2013-07-16 |
| Techniques for phase adjustment Grant 8,384,460 - Sung , et al. February 26, 2 | 2013-02-26 |
| Multiple Data Rate Interface Architecture App 20120146700 - Pan; Philip ; et al. | 2012-06-14 |
| Write-leveling Implementation In Programmable Logic Devices App 20120106264 - Chong; Yan ; et al. | 2012-05-03 |
| Techniques for phase adjustment Grant 8,149,038 - Sung , et al. April 3, 2 | 2012-04-03 |
| Write-leveling implementation in programmable logic devices Grant 8,122,275 - Chong , et al. February 21, 2 | 2012-02-21 |
| Multiple data rate interface architecture Grant 8,098,082 - Pan , et al. January 17, 2 | 2012-01-17 |
| Programmable High-speed Interface App 20110227606 - Wang; Bonnie I. ; et al. | 2011-09-22 |
| Dynamic termination-impedance control for bidirectional I/O pins Grant 8,022,723 - Wang , et al. September 20, 2 | 2011-09-20 |
| Techniques for on-chip termination Grant 7,973,553 - Wang , et al. July 5, 2 | 2011-07-05 |
| Multiple data rate interface architecture Grant 7,859,304 - Pan , et al. December 28, 2 | 2010-12-28 |
| Self-compensating delay chain for multiple-date-rate interfaces Grant 7,725,755 - Chong , et al. May 25, 2 | 2010-05-25 |
| Programmable High-speed Interface App 20100045349 - Wang; Bonnie I. ; et al. | 2010-02-25 |
| Clock edge de-skew Grant 7,590,879 - Kim , et al. September 15, 2 | 2009-09-15 |
| Differential output with low output skew Grant 7,551,014 - Wang , et al. June 23, 2 | 2009-06-23 |
| Multiple data rate interface architecture Grant 7,477,074 - Pan , et al. January 13, 2 | 2009-01-13 |
| Write-leveling Implementation In Programmable Logic Devices App 20080201597 - Chong; Yan ; et al. | 2008-08-21 |
| Programmable High-speed Interface App 20080186056 - Wang; Bonnie I. ; et al. | 2008-08-07 |
| Voltage, temperature, and process independent programmable phase shift for PLL Grant 7,358,783 - Wang , et al. April 15, 2 | 2008-04-15 |
| DQS postamble filtering Grant 7,324,405 - Charagulla , et al. January 29, 2 | 2008-01-29 |
| Apparatus and methods for providing highly effective and area efficient decoupling capacitance in programmable logic devices Grant 7,309,906 - Tyhach , et al. December 18, 2 | 2007-12-18 |
| Method and apparatus for protecting a circuit during a hot socket condition Grant 7,304,501 - Wang , et al. December 4, 2 | 2007-12-04 |
| Programmable on-chip differential termination impedance Grant 7,205,788 - Wang , et al. April 17, 2 | 2007-04-17 |
| Apparatus and method for controlling a delay chain Grant 7,205,802 - Wang , et al. April 17, 2 | 2007-04-17 |
| Self-compensating delay chain for multiple-date-rate interfaces Grant 7,200,769 - Chong , et al. April 3, 2 | 2007-04-03 |
| Programmable logic integrated circuit devices with low voltage differential signaling capabilities Grant 7,196,556 - Nguyen , et al. March 27, 2 | 2007-03-27 |
| Phase-locked loop circuitry for programmable logic devices Grant 7,190,755 - Sung , et al. March 13, 2 | 2007-03-13 |
| Multiple data rate interface architecture Grant 7,167,023 - Pan , et al. January 23, 2 | 2007-01-23 |
| PCI-compatible programmable logic devices Grant 7,148,722 - Cliff , et al. December 12, 2 | 2006-12-12 |
| Programmable high speed interface App 20060220703 - Wang; Bonnie I. ; et al. | 2006-10-05 |
| Programmable high speed I/O interface Grant 7,116,135 - Wang , et al. October 3, 2 | 2006-10-03 |
| Programmable phase shift circuitry Grant 7,109,765 - Wang , et al. September 19, 2 | 2006-09-19 |
| I/O cell configuration for multiple I/O standards Grant 7,034,570 - McClintock , et al. April 25, 2 | 2006-04-25 |
| Apparatus and method for controlling a delay chain Grant 7,030,675 - Wang , et al. April 18, 2 | 2006-04-18 |
| DQS postamble filtering Grant 7,031,222 - Charagulla , et al. April 18, 2 | 2006-04-18 |
| Programmable current booster for faster edge-rate output in high speed applications Grant 7,026,847 - Wang , et al. April 11, 2 | 2006-04-11 |
| Multiple data rate interface architecture Grant 6,946,872 - Pan , et al. September 20, 2 | 2005-09-20 |
| I/O cell configuration for multiple I/O standards App 20050151564 - McClintock, Cameron ; et al. | 2005-07-14 |
| Programmable AC current booster for faster edge-rate output in high speed applications App 20050140430 - Wang, Bonnie I. ; et al. | 2005-06-30 |
| Programmable high speed I/O interface App 20050134332 - Wang, Bonnie I. ; et al. | 2005-06-23 |
| Programmable on-chip differential termination impedance Grant 6,888,369 - Wang , et al. May 3, 2 | 2005-05-03 |
| Programmable phase shift circuitry Grant 6,836,164 - Wang , et al. December 28, 2 | 2004-12-28 |
| I/O cell configuration for multiple I/O standards Grant 6,836,151 - McClintock , et al. December 28, 2 | 2004-12-28 |
| Programmable high speed I/O interface Grant 6,825,698 - Wang , et al. November 30, 2 | 2004-11-30 |
| Multiple data rate interface architecture Grant 6,806,733 - Pan , et al. October 19, 2 | 2004-10-19 |
| On-chip impedance matching circuit Grant 6,798,237 - Wang , et al. September 28, 2 | 2004-09-28 |
| I/O cell configuration for multiple I/O standards Grant 6,714,050 - McClintock , et al. March 30, 2 | 2004-03-30 |
| Programmable phase shift circuitry Grant 6,667,641 - Wang , et al. December 23, 2 | 2003-12-23 |
| PCI-compatible programmable logic devices Grant 6,646,467 - Cliff , et al. November 11, 2 | 2003-11-11 |
| Voltage, temperature, and process independent programmable phase shift for PLL Grant 6,642,758 - Wang , et al. November 4, 2 | 2003-11-04 |
| Fast locking phase frequency detector Grant 6,617,884 - Wang , et al. September 9, 2 | 2003-09-09 |
| Systems and methods for on-chip impedance termination Grant 6,603,329 - Wang , et al. August 5, 2 | 2003-08-05 |
| Programmable high speed I/O interface App 20030042941 - Wang, Bonnie I. ; et al. | 2003-03-06 |
| Phase-locked loop circuitry for programmable logic devices Grant 6,483,886 - Sung , et al. November 19, 2 | 2002-11-19 |
| Fast locking phase frequency detector App 20020158671 - Wang, Xiaobao ; et al. | 2002-10-31 |
| Fast locking phase frequency detector Grant 6,448,820 - Wang , et al. September 10, 2 | 2002-09-10 |
| Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,437,650 - Sung , et al. August 20, 2 | 2002-08-20 |
| Programmable logic integrated circuit devices with differential signaling capabilities Grant 6,433,579 - Wang , et al. August 13, 2 | 2002-08-13 |
| Fast Locking Phase Frequency Detector App 20020043995 - WANG, XIAOBAO ; et al. | 2002-04-18 |
| I/O cell configuration for multiple I/O standards App 20010035773 - McClintock, Cameron ; et al. | 2001-11-01 |
| Programmable logic array integrated circuit architectures App 20010022519 - Cliff, Richard G. ; et al. | 2001-09-20 |
| Techniques and circuitry for accurately sampling high frequency data signals input to an integrated circuit Grant 6,292,116 - Wang , et al. September 18, 2 | 2001-09-18 |
| High-speed programmable interconnect App 20010020851 - Huang, Joseph ; et al. | 2001-09-13 |
| Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,271,729 - Sung , et al. August 7, 2 | 2001-08-07 |
| I/O cell configuration for multiple I/O standards Grant 6,271,679 - McClintock , et al. August 7, 2 | 2001-08-07 |
| Programmable logic integrated circuit devices with low voltage differential signaling capabilities Grant 6,236,231 - Nguyen , et al. May 22, 2 | 2001-05-22 |
| Phase-locked loop or delay-locked loop circuitry for programmable logic devices App 20010000426 - Sung, Chiakang ; et al. | 2001-04-26 |
| Phase-locked loop or delay-locked loop circuitry for programmable logic devices Grant 6,177,844 - Sung , et al. January 23, 2 | 2001-01-23 |
| Programmable wide-range frequency synthesizer Grant 6,114,915 - Huang , et al. September 5, 2 | 2000-09-05 |
| Logic region resources for programmable logic devices Grant 5,999,015 - Cliff , et al. December 7, 1 | 1999-12-07 |
| Programmable logic array integrated circuit architectures Grant 5,963,049 - Cliff , et al. October 5, 1 | 1999-10-05 |
| Method and apparatus for securing programming data of programmable logic device Grant 5,915,017 - Sung , et al. June 22, 1 | 1999-06-22 |
| Programmable logic array integrated circuit devices with interleaved logic array blocks Grant 5,909,126 - Cliff , et al. June 1, 1 | 1999-06-01 |
| Method and apparatus for securing programming data of a programmable logic device Grant 5,768,372 - Sung , et al. June 16, 1 | 1998-06-16 |
| Means and apparatus to minimize the effects of silicon processing defects in programmable logic devices Grant 5,592,102 - Lane , et al. January 7, 1 | 1997-01-07 |
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