Vega; Reinaldo A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vega; Reinaldo A..The latest application filed is for "self aligned replacement metal source/drain finfet".

Company Profile

22.91.87

Vega; Reinaldo A. - Mahopac NY
Vega; Reinaldo A. - Wappingers Falls NY
Vega; Reinaldo A - Wappingers Falls NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Nanosheet field effect transistors with partial inside spacers Grant 11,342,446 - Guillorn , et al. May 24, 2	2022-05-24
Vertical fin field effect transistor with air gap spacers Grant 11,024,709 - Mallela , et al. June 1, 2	2021-06-01
Vertical FET devices with multiple channel lengths Grant 10,957,603 - Mallela , et al. March 23, 2	2021-03-23
Self Aligned Replacement Metal Source/drain Finfet App 20210028287 - Alptekin; Emre ; et al.	2021-01-28
Self aligned replacement metal source/drain finFET Grant 10,818,759 - Alptekin , et al. October 27, 2	2020-10-27
Vertical Fin Field Effect Transistor With Air Gap Spacers App 20200212174 - Mallela; Hari V. ; et al.	2020-07-02
Vertical fin field effect transistor with air gap spacers Grant 10,644,104 - Mallela , et al.	2020-05-05
Nanosheet Field Effect Transistors With Partial Inside Spacers App 20200098893 - Guillorn; Michael A. ; et al.	2020-03-26
Nanosheet field effect transistors with partial inside spacers Grant 10,559,670 - Guillorn , et al. Feb	2020-02-11
Self Aligned Replacement Metal Source/drain Finfet App 20190326406 - Alptekin; Emre ; et al.	2019-10-24
Vertical Fet Devices With Multiple Channel Lengths App 20190295897 - Mallela; Hari V. ; et al.	2019-09-26
Vertical FET devices with multiple channel lengths Grant 10,424,515 - Mallela , et al. Sept	2019-09-24
Self aligned replacement metal source/drain finFET Grant 10,418,450 - Alptekin , et al. Sept	2019-09-17
Multiple-threshold Nanosheet Transistors App 20190252495 - Bao; Ruqiang ; et al.	2019-08-15
Patterned sidewall smoothing using a pre-smoothed inverted tone pattern Grant 10,381,463 - Lai , et al. A	2019-08-13
Multiple-threshold nanosheet transistors Grant 10,340,340 - Bao , et al.	2019-07-02
Vertical FETS with variable bottom spacer recess Grant 10,283,416 - Mallela , et al.	2019-05-07
Tag with tunable retro-reflectors Grant 10,282,646 - Colgan , et al.	2019-05-07
Nanosheet MOSFET with partial release and source/drain epitaxy Grant 10,249,739 - Guillorn , et al.	2019-04-02
Semiconductor fin isolation by a well trapping fin portion Grant 10,242,980 - Utomo , et al.	2019-03-26
Vertical fin field effect transistor with air gap spacers Grant 10,243,041 - Mallela , et al.	2019-03-26
Tunnel transistors with abrupt junctions Grant 10,236,344 - Alptekin , et al.	2019-03-19
Vertical Fin Field Effect Transistor With Air Gap Spacers App 20190027557 - Mallela; Hari V. ; et al.	2019-01-24
Structure and method to prevent EPI short between trenches in FinFET eDRAM Grant 10,177,154 - Aquilino , et al. J	2019-01-08
Forming MOSFET structures with work function modification Grant 10,170,477 - Bao , et al. J	2019-01-01
Vertical fin field effect transistor with air gap spacers Grant 10,170,543 - Mallela , et al. J	2019-01-01
Nanosheet field effect transistors with partial inside spacers Grant 10,170,584 - Guillorn , et al. J	2019-01-01
Vertical field effect transistors with protective fin liner during bottom spacer recess etch Grant 10,164,119 - Mallela , et al. Dec	2018-12-25
Forming MOSFET structures with work function modification Grant 10,147,725 - Bao , et al. De	2018-12-04
Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess ETCH Grant 10,109,535 - Mallela , et al. October 23, 2	2018-10-23
Method of fabricating tunnel transistors with abrupt junctions Grant 10,103,226 - Vega , et al. October 16, 2	2018-10-16
Partial spacer for increasing self aligned contact process margins Grant 10,083,865 - Alptekin , et al. September 25, 2	2018-09-25
Nanosheet Mosfet With Partial Release And Source/drain Epitaxy App 20180254329 - Guillorn; Michael A. ; et al.	2018-09-06
Patterned sidewall smoothing using a pre-smoothed inverted tone pattern Grant 10,068,991 - Lai , et al. September 4, 2	2018-09-04
Patterned Sidewall Smoothing Using A Pre-smoothed Inverted Tone Pattern App 20180240892 - Lai; Kafai ; et al.	2018-08-23
Patterned Sidewall Smoothing Using A Pre-smoothed Inverted Tone Pattern App 20180240894 - LAI; Kafai ; et al.	2018-08-23
Nanosheet Field Effect Transistors With Partial Inside Spacers App 20180219083 - Guillorn; Michael A. ; et al.	2018-08-02
Nanosheet Field Effect Transistors With Partial Inside Spacers App 20180219082 - Guillorn; Michael A. ; et al.	2018-08-02
Channel replacement and bimodal doping scheme for bulk finFet threshold voltage modulation with reduced performance penalty Grant 10,032,885 - Karve , et al. July 24, 2	2018-07-24
Tag With Tunable Retro-reflectors App 20180204100 - COLGAN; EVAN G. ; et al.	2018-07-19
Vertical Fets With Variable Bottom Spacer Recess App 20180138091 - Mallela; Hari V. ; et al.	2018-05-17
Multiple-threshold Nanosheet Transistors App 20180114833 - Bao; Ruqiang ; et al.	2018-04-26
Partial spacer for increasing self aligned contact process margins Grant 9,929,047 - Alptekin , et al. March 27, 2	2018-03-27
Vertical FETS with variable bottom spacer recess Grant 9,929,058 - Mallela , et al. March 27, 2	2018-03-27
Partial Spacer For Increasing Self Aligned Contact Process Margins App 20180068893 - Alptekin; Emre ; et al.	2018-03-08
Vertical fin field effect transistor with air gap spacers Grant 9,911,804 - Mallela , et al. March 6, 2	2018-03-06
Fin-type field-effect transistors with strained channels Grant 9,905,694 - Utomo , et al. February 27, 2	2018-02-27
Vertical Fin Field Effect Transistor With Air Gap Spacers App 20180053823 - Mallela; Hari V. ; et al.	2018-02-22
Vertical Fin Field Effect Transistor With Air Gap Spacers App 20180053821 - Mallela; Hari V. ; et al.	2018-02-22
Vertical Fin Field Effect Transistor With Air Gap Spacers App 20180053840 - Mallela; Hari V. ; et al.	2018-02-22
Fin-type Field-effect Transistors With Strained Channels App 20180026137 - Utomo; Henry K. ; et al.	2018-01-25
Vertical Fet Devices With Multiple Channel Lengths App 20180005896 - Mallela; Hari V. ; et al.	2018-01-04
Vertical field effect transistor with subway etch replacement metal gate Grant 9,859,421 - Robison , et al. January 2, 2	2018-01-02
Structure And Method To Prevent Epi Short Between Trenches In Finfet Edram App 20170365606 - Aquilino; Michael V. ; et al.	2017-12-21
Structure and method to prevent EPI short between trenches in FINFET eDRAM Grant 9,818,741 - Aquilino , et al. November 14, 2	2017-11-14
Tag with tunable retro-reflectors Grant 9,818,054 - Colgan , et al. November 14, 2	2017-11-14
Vertical FETs with variable bottom spacer recess Grant 9,761,727 - Mallela , et al. September 12, 2	2017-09-12
Vertical Field Effect Transistors With Protective Fin Liner During Bottom Spacer Recess Etch App 20170243974 - Mallela; Hari V. ; et al.	2017-08-24
Dummy gate structure for electrical isolation of a fin DRAM Grant 9,741,722 - Barth, Jr. , et al. August 22, 2	2017-08-22
Channel replacement and bimodal doping scheme for bulk finFET threshold voltage modulation with reduced performance penalty Grant 9,735,275 - Karve , et al. August 15, 2	2017-08-15
Dynamic random access memory cell with self-aligned strap Grant 9,735,162 - Barth, Jr. , et al. August 15, 2	2017-08-15
Vertical Field Effect Transistors With Protective Fin Liner During Bottom Spacer Recess Etch App 20170222021 - Mallela; Hari V. ; et al.	2017-08-03
Vertical Fets With Variable Bottom Spacer Recess App 20170178974 - Mallela; Hari V. ; et al.	2017-06-22
Vertical Fets With Variable Bottom Spacer Recess App 20170178959 - Mallela; Hari V. ; et al.	2017-06-22
Channel Replacement And Bimodal Doping Scheme For Bulk Finfet Threshold Voltage Modulation With Reduced Performance Penalty App 20170179254 - Karve; Gauri ; et al.	2017-06-22
Channel Replacement And Bimodal Doping Scheme For Bulk Finfet Threshold Voltage Modulation With Reduced Performance Penalty App 20170179274 - Karve; Gauri ; et al.	2017-06-22
Fin end spacer for preventing merger of raised active regions Grant 9,679,993 - Alptekin , et al. June 13, 2	2017-06-13
Fin-type field-effect transistors with strained channels Grant 9,680,019 - Utomo , et al. June 13, 2	2017-06-13
Self Aligned Replacement Metal Source/drain Finfet App 20170141197 - Alptekin; Emre ; et al.	2017-05-18
Forming Mosfet Structures With Work Function Modification App 20170133372 - BAO; RUQIANG ; et al.	2017-05-11
Forming Mosfet Structures With Work Function Modification App 20170133272 - BAO; RUQIANG ; et al.	2017-05-11
Semiconductor devices with graphene nanoribbons Grant 9,647,124 - Alptekin , et al. May 9, 2	2017-05-09
Fin end spacer for preventing merger of raised active regions Grant 9,601,380 - Alptekin , et al. March 21, 2	2017-03-21
Vertical field effect transistors having epitaxial fin channel with spacers below gate structure Grant 9,601,491 - Mallela , et al. March 21, 2	2017-03-21
Coaxial carbon nanotube capacitor for eDRAM Grant 9,595,527 - Vega March 14, 2	2017-03-14
Protection of semiconductor-oxide-containing gate dielectric during replacement gate formation Grant 9,577,068 - Costrini , et al. February 21, 2	2017-02-21
Semiconductor Fin Isolation By A Well Trapping Fin Portion App 20170040320 - Utomo; Henry K. ; et al.	2017-02-09
Dummy gate structure for electrical isolation of a fin DRAM Grant 9,564,445 - Barth, Jr. , et al. February 7, 2	2017-02-07
Dynamic random access memory cell with self-aligned strap Grant 9,564,443 - Barth, Jr. , et al. February 7, 2	2017-02-07
Structure And Method To Prevent Epi Short Between Trenches In Finfet Edram App 20170005098 - Aquilino; Michael V. ; et al.	2017-01-05
Forming fins of different semiconductor materials on the same substrate Grant 9,536,900 - Ramachandran , et al. January 3, 2	2017-01-03
Partial Spacer For Increasing Self Aligned Contact Process Margins App 20160379882 - Alptekin; Emre ; et al.	2016-12-29
Method of fabricating vertical field effect transistors with protective fin liner during bottom spacer recess etch Grant 9,530,700 - Mallela , et al. December 27, 2	2016-12-27
Unidirectional spacer in trench silicide Grant 9,514,992 - Alptekin , et al. December 6, 2	2016-12-06
Fin end spacer for preventing merger of raised active regions Grant 9,515,168 - Alptekin , et al. December 6, 2	2016-12-06
Protection Of Semiconductor-oxide-containing Gate Dielectric During Replacement Gate Formation App 20160351687 - Costrini; Gregory ; et al.	2016-12-01
Partial spacer for increasing self aligned contact process margins Grant 9,496,368 - Alptekin , et al. November 15, 2	2016-11-15
Semiconductor fin isolation by a well trapping fin portion Grant 9,496,258 - Utomo , et al. November 15, 2	2016-11-15
Unidirectional Spacer In Trench Silicide App 20160329251 - Alptekin; Emre ; et al.	2016-11-10
Self aligned replacement metal source/drain finFET Grant 9,466,693 - Alptekin , et al. October 11, 2	2016-10-11
Fin End Spacer For Preventing Merger Of Raised Active Regions App 20160284598 - Alptekin; Emre ; et al.	2016-09-29
Vertical FETs with variable bottom spacer recess Grant 9,437,503 - Mallela , et al. September 6, 2	2016-09-06
Protection of semiconductor-oxide-containing gate dielectric during replacement gate formation Grant 9,431,395 - Costrini , et al. August 30, 2	2016-08-30
COAXIAL CARBON NANOTUBE CAPACITOR FOR eDRAM App 20160233219 - Vega; Reinaldo A.	2016-08-11
Multi-composition gate dielectric field effect transistors Grant 9,397,175 - Alptekin , et al. July 19, 2	2016-07-19
Fin end spacer for preventing merger of raised active regions Grant 9,391,175 - Alptekin , et al. July 12, 2	2016-07-12
Semiconductor Devices With Graphene Nanoribbons App 20160190344 - Alptekin; Emre ; et al.	2016-06-30
Partial Spacer For Increasing Self Aligned Contact Process Margins App 20160181392 - Alptekin; Emre ; et al.	2016-06-23
COAXIAL CARBON NANOTUBE CAPACITOR FOR eDRAM App 20160163784 - Vega; Reinaldo A.	2016-06-09
Coaxial carbon nanotube capacitor for eDRAM Grant 9,349,789 - Vega May 24, 2	2016-05-24
Fin end spacer for preventing merger of raised active regions Grant 9,349,836 - Alptekin , et al. May 24, 2	2016-05-24
Dynamic random access memory cell employing trenches located between lengthwise edges of semiconductor fins Grant 9,337,200 - Ho , et al. May 10, 2	2016-05-10
Semiconductor memory device employing a ferromagnetic gate Grant 9,337,334 - Mallela , et al. May 10, 2	2016-05-10
Selective dielectric spacer deposition for exposing sidewalls of a finFET Grant 9,331,166 - Alptekin , et al. May 3, 2	2016-05-03
Semiconductor devices with graphene nanoribbons Grant 9,318,323 - Alptekin , et al. April 19, 2	2016-04-19
Partial Fin On Oxide For Improved Electrical Isolation Of Raised Active Regions App 20160079397 - Cheng; Kangguo ; et al.	2016-03-17
Semiconductor structure having buried conductive elements Grant 9,263,454 - Alptekin , et al. February 16, 2	2016-02-16
Tunnel Transistors With Abrupt Junctions App 20160043175 - Alptekin; Emre ; et al.	2016-02-11
Fin End Spacer For Preventing Merger Of Raised Active Regions App 20160035875 - Alptekin; Emre ; et al.	2016-02-04
Fin End Spacer For Preventing Merger Of Raised Active Regions App 20160035864 - Alptekin; Emre ; et al.	2016-02-04
Fin End Spacer For Preventing Merger Of Raised Active Regions App 20160035876 - Alptekin; Emre ; et al.	2016-02-04
Multi-composition Gate Dielectric Field Effect Transistors App 20160035841 - Alptekin; Emre ; et al.	2016-02-04
Dynamic Random Access Memory Cell With Self-aligned Strap App 20160027788 - Barth, JR.; John E. ; et al.	2016-01-28
Dummy Gate Structure For Electrical Isolation Of A Fin Dram App 20160027789 - Barth, JR.; John E. ; et al.	2016-01-28
Semiconductor structure having buried conductive elements Grant 9,245,892 - Alptekin , et al. January 26, 2	2016-01-26
Protection Of Semiconductor-oxide-containing Gate Dielectric During Replacement Gate Formation App 20160005735 - Costrini; Gregory ; et al.	2016-01-07
Multi-composition gate dielectric field effect transistors Grant 9,231,072 - Alptekin , et al. January 5, 2	2016-01-05
Partial FIN on oxide for improved electrical isolation of raised active regions Grant 9,219,114 - Cheng , et al. December 22, 2	2015-12-22
Semiconductor Structure Having Buried Conductive Elements App 20150364476 - Alptekin; Emre ; et al.	2015-12-17
Forming Fins Of Different Semiconductor Materials On The Same Substrate App 20150340381 - Ramachandran; Ravikumar ; et al.	2015-11-26
Fin field effect transistors having heteroepitaxial channels Grant 9,190,406 - Alptekin , et al. November 17, 2	2015-11-17
Semiconductor Memory Device Employing A Ferromagnetic Gate App 20150303313 - Mallela; Hari V. ; et al.	2015-10-22
Selective Dielectric Spacer Deposition For Exposing Sidewalls Of A Finfet App 20150270365 - Alptekin; Emre ; et al.	2015-09-24
Semiconductor Structure Having Buried Conductive Elements App 20150236024 - Alptekin; Emre ; et al.	2015-08-20
Selective dielectric spacer deposition for exposing sidewalls of a finFET Grant 9,111,962 - Alptekin , et al. August 18, 2	2015-08-18
Multi-composition Gate Dielectric Field Effect Transistors App 20150228748 - Alptekin; Emre ; et al.	2015-08-13
Dynamic Random Access Memory Cell With Self-aligned Strap App 20150206884 - Barth, Jr.; John E. ; et al.	2015-07-23
Fin Field Effect Transistors Having Heteroepitaxial Channels App 20150206876 - Alptekin; Emre ; et al.	2015-07-23
Dummy Gate Structure For Electrical Isolation Of A Fin Dram App 20150206885 - Barth, Jr.; John E. ; et al.	2015-07-23
Fin End Spacer For Preventing Merger Of Raised Active Regions App 20150200291 - Alptekin; Emre ; et al.	2015-07-16
FinFET device formation Grant 9,059,290 - Alptekin , et al. June 16, 2	2015-06-16
Dynamic Random Access Memory Cell Employing Trenches Located Between Lengthwise Edges Of Semiconductor Fins App 20150145010 - Ho; Herbert L. ; et al.	2015-05-28
Semiconductor fin on local oxide Grant 9,035,430 - Vega , et al. May 19, 2	2015-05-19
Method of epitaxially forming contact structures for semiconductor transistors Grant 9,034,755 - Alptekin , et al. May 19, 2	2015-05-19
Semiconductor Devices With Graphene Nanoribbons App 20150108499 - Alptekin; Emre ; et al.	2015-04-23
Semiconductor Fin On Local Oxide App 20150044843 - Aquilino; Michael V. ; et al.	2015-02-12
Semiconductor Fin Isolation By A Well Trapping Fin Portion App 20150021625 - Utomo; Henry K. ; et al.	2015-01-22
Partial FIN On Oxide For Improved Electrical Isolation Of Raised Active Regions App 20150014773 - Cheng; Kangguo ; et al.	2015-01-15
Semiconductor fin isolation by a well trapping fin portion Grant 8,933,528 - Utomo , et al. January 13, 2	2015-01-13
Forming silicon-carbon embedded source/drain junctions with high substitutional carbon level Grant 8,927,375 - Alptekin , et al. January 6, 2	2015-01-06
Semiconductor structures with dual trench regions and methods of manufacturing the semiconductor structures Grant 8,907,405 - Vega , et al. December 9, 2	2014-12-09
Sealed shallow trench isolation region Grant 8,859,388 - Aquilino , et al. October 14, 2	2014-10-14
Finfet Device Formation App 20140284721 - Alptekin; Emre ; et al.	2014-09-25
Semiconductor Fin Isolation By A Well Trapping Fin Portion App 20140252479 - Utomo; Henry K. ; et al.	2014-09-11
FinFET device formation Grant 8,815,693 - Alptekin , et al. August 26, 2	2014-08-26
Finfet Device Formation App 20140203371 - Alptekin; Emre ; et al.	2014-07-24
Trench isolation structure Grant 8,704,310 - Aquilino , et al. April 22, 2	2014-04-22
Forming Silicon-carbon Embedded Source/drain Junctions With High Substitutional Carbon Level App 20140099763 - ALPTEKIN; EMRE ; et al.	2014-04-10
Contact Structures For Semiconductor Transistors App 20140094014 - Alptekin; Emre ; et al.	2014-04-03
Field Effect Transistor Devices With Recessed Gates App 20140061792 - Bu; Huiming ; et al.	2014-03-06
Semiconductor Fin On Local Oxide App 20140061862 - VEGA; Reinaldo A. ; et al.	2014-03-06
Two-step silicide formation Grant 8,647,954 - Alptekin , et al. February 11, 2	2014-02-11
Silicide contacts having different shapes on regions of a semiconductor device Grant 8,643,122 - Alptekin , et al. February 4, 2	2014-02-04
Sealed Shallow Trench Isolation Region App 20140015092 - Aquilino; Michael V. ; et al.	2014-01-16
Two-step silicide formation Grant 8,629,510 - Alptekin , et al. January 14, 2	2014-01-14
Trench isolation structure Grant 8,623,713 - Aquilino , et al. January 7, 2	2014-01-07
Structure and method to enabling a borderless contact to source regions and drain regions of a complementary metal oxide semiconductor (CMOS) transistor Grant 8,614,133 - Vega December 24, 2	2013-12-24
Two-step Silicide Formation App 20130295765 - Alptekin; Emre ; et al.	2013-11-07
Method of Fabricating Tunnel Transistors With Abrupt Junctions App 20130285138 - Vega; Reinaldo A. ; et al.	2013-10-31
Structure And Method To Enabling A Borderless Contact To Source Regions And Drain Regions Of A Complementary Metal Oxide Semiconductor (cmos) Transistor App 20130178035 - Vega; Reinaldo A.	2013-07-11
Two-step Silicide Formation App 20130153974 - Alptekin; Emre ; et al.	2013-06-20
Trench Isolation Structure App 20130146985 - AQUILINO; Michael V. ; et al.	2013-06-13
Silicide Contacts Having Different Shapes On Regions Of A Semiconductor Device App 20130119483 - Alptekin; Emre ; et al.	2013-05-16
Structure and method to enabling a borderless contact to source regions and drain regions of a complementary metal oxide semiconductor (CMOS) transistor Grant 8,421,160 - Vega April 16, 2	2013-04-16
Trench Isolation Structure App 20130069160 - AQUILINO; Michael V. ; et al.	2013-03-21
Semiconductor Structures With Dual Trench Regions And Methods Of Manufacturing The Semiconductor Structures App 20120261771 - VEGA; Reinaldo A. ; et al.	2012-10-18
Structure and Method to Enabling A Borderless Contact To Source Regions and Drain Regions Of A Complementary Metal Oxide Semiconductor (CMOS) Transistor App 20120217588 - Vega; Reinaldo A.	2012-08-30

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