Vardanian; Valery

Patent Applications and Registrations

Patent applications and USPTO patent grants for Vardanian; Valery.The latest application filed is for "testing electronic memories based on fault and test algorithm periodicity".

Company Profile

0.13.11

Vardanian; Valery - Yerevan AM
Vardanian; Valery - Yerevam AM

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Testing electronic memories based on fault and test algorithm periodicity Grant 9,831,000 - Hakhumyan , et al. November 28, 2	2017-11-28
Generation of memory structural model based on memory layout Grant 9,514,258 - Amirkhanyan , et al. December 6, 2	2016-12-06
Determining a desirable number of segments for a multi-segment single error correcting coding scheme Grant 9,053,050 - Grigoryan , et al. June 9, 2	2015-06-09
Testing Electronic Memories Based On Fault And Test Algorithm Periodicity App 20140380107 - Hakhumyan; Aram ; et al.	2014-12-25
Detecting random telegraph noise induced failures in an electronic memory Grant 8,850,277 - Amirkhanyan , et al. September 30, 2	2014-09-30
Generation of Memory Structural Model Based on Memory Layout App 20130346056 - Amirkhanyan; Karen ; et al.	2013-12-26
Determining A Desirable Number Of Segments For A Multi-Segment Single Error Correcting Coding Scheme App 20130145119 - Grigoryan; Hayk ; et al.	2013-06-06
Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer Grant 8,359,553 - Aleksanyan , et al. January 22, 2	2013-01-22
Detecting Random Telegraph Noise Induced Failures In An Electronic Memory App 20130019132 - AMIRKHANYAN; Karen ; et al.	2013-01-17
Testing Electronic Memories Based On Fault And Test Algorithm Periodicity App 20130019130 - HAKHUMYAN; Aram ; et al.	2013-01-17
Various methods and apparatuses for memory modeling using a structural primitive verification for memory compilers Grant 8,112,730 - Aleksanyan , et al. February 7, 2	2012-02-07
Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer Grant 7,890,900 - Aleksanyan , et al. February 15, 2	2011-02-15
Memory modeling using an intermediate level structural description Grant 7,768,840 - Aleksanyan , et al. August 3, 2	2010-08-03
Various Methods And Apparatuses For Effective Yield Enhancement Of Good Chip Dies Having Memories Per Wafer App 20100050135 - Aleksanyan; Karen ; et al.	2010-02-25
Various Methods And Apparatuses For Memory Modeling Using A Structural Primitive Verification For Memory Compilers App 20090106716 - Aleksanyan; Karen ; et al.	2009-04-23
Apparatus, method, and system to allocate redundant components with subsets of the redundant components Grant 7,149,921 - Zorian , et al. December 12, 2	2006-12-12

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