| Patent | Date |
|---|
Branching Filter
App 20220294411 - SATO; Takuya ; et al. | 2022-09-15 |
Three-dimensional Memory Device Containing Plural Metal Oxide Blocking Dielectric Layers And Method Of Making Thereof
App 20220270967 - HOSODA; Naohiro ; et al. | 2022-08-25 |
Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
Grant 11,417,621 - Hosoda , et al. August 16, 2 | 2022-08-16 |
On-pitch drain select level isolation structure for three-dimensional memory device and method of making the same
Grant RE49,165 - Zhang , et al. August 9, 2 | 2022-08-09 |
Three-dimensional memory device with separated source-side lines and method of making the same
Grant 11,393,836 - Tsutsumi , et al. July 19, 2 | 2022-07-19 |
Three-dimensional Memory Device Containing Amorphous And Crystalline Blocking Dielectric Layers
App 20220216145 - TSUTSUMI; Masanori ; et al. | 2022-07-07 |
Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
Grant 11,367,733 - Hosoda , et al. June 21, 2 | 2022-06-21 |
Memory Die With Source Side Of Three-dimensional Memory Array Bonded To Logic Die And Methods Of Making The Same
App 20220181343 - HOSODA; Naohiro ; et al. | 2022-06-09 |
Memory Die With Source Side Of Three-dimensional Memory Array Bonded To Logic Die And Methods Of Making The Same
App 20220181283 - HOSODA; Naohiro ; et al. | 2022-06-09 |
Three-dimensional Memory Device With Separated Source-side Lines And Method Of Making The Same
App 20220157841 - TSUTSUMI; Masanori ; et al. | 2022-05-19 |
Three-dimensional Memory Device With Separated Source-side Lines And Method Of Making The Same
App 20220157842 - TSUTSUMI; Masanori ; et al. | 2022-05-19 |
Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers
Grant 11,289,416 - Tsutsumi , et al. March 29, 2 | 2022-03-29 |
Three-dimensional Memory Device With A Dielectric Isolation Spacer And Methods Of Forming The Same
App 20210351109 - SATO; Jo ; et al. | 2021-11-11 |
Three-dimensional memory device with a dielectric isolation spacer and methods of forming the same
Grant 11,152,284 - Sato , et al. October 19, 2 | 2021-10-19 |
Three-dimensional Memory Device Containing Amorphous And Crystalline Blocking Dielectric Layers
App 20210159167 - TSUTSUMI; Masanori ; et al. | 2021-05-27 |
Semiconductor die stacking using vertical interconnection by through-dielectric via structures and methods for making the same
Grant 10,957,680 - Yada , et al. March 23, 2 | 2021-03-23 |
Three-dimensional memory device containing a carbon-doped source contact layer and methods for making the same
Grant 10,903,222 - Sakakibara , et al. January 26, 2 | 2021-01-26 |
Three-dimensional memory devices containing memory stack structures with laterally separated charge storage elements and method of making thereof
Grant 10,903,232 - Tsutsumi January 26, 2 | 2021-01-26 |
Three-dimensional memory device having a slimmed aluminum oxide blocking dielectric and method of making same
Grant 10,861,869 - Nakamura , et al. December 8, 2 | 2020-12-08 |
Three-dimensional memory device containing channels with laterally pegged dielectric cores
Grant 10,748,925 - Tsutsumi , et al. A | 2020-08-18 |
Three-dimensional memory device with drain-select-level isolation structures and method of making the same
Grant 10,748,927 - Tsutsumi , et al. A | 2020-08-18 |
Three-dimensional Memory Device Containing A Carbon-doped Source Contact Layer And Methods For Making The Same
App 20200251479 - Kind Code | 2020-08-06 |
Three-dimensional Memory Device Containing Channels With Laterally Pegged Dielectric Cores And Methods For Making The Same
App 20200251486 - Kind Code | 2020-08-06 |
Three-dimensional Memory Device With Drain-select-level Isolation Structures And Method Of Making The Same
App 20200251489 - Kind Code | 2020-08-06 |
Semiconductor Die Stacking Using Vertical Interconnection By Through-dielectric Via Structures And Methods For Making The Same
App 20200227397 - YADA; Shinsuke ; et al. | 2020-07-16 |
Three-dimensional memory device containing source contact to bottom of vertical channels and method of making the same
Grant 10,559,582 - Nishikawa , et al. Feb | 2020-02-11 |
Three-dimensional Memory Device Having A Slimmed Aluminum Oxide Blocking Dielectric And Method Of Making Same
App 20200020715 - NAKAMURA; Ryo ; et al. | 2020-01-16 |
Three-dimensional Memory Device Containing Source Contact To Bottom Of Vertical Channels Of And Method Of Making The Same
App 20190371807 - NISHIKAWA; Masatoshi ; et al. | 2019-12-05 |
Three-dimensional memory device with gated contact via structures and method of making thereof
Grant 10,453,798 - Tsutsumi , et al. Oc | 2019-10-22 |
Three-dimensional Memory Devices Containing Memory Stack Structures With Laterally Separated Charge Storage Elements And Method
App 20190252405 - TSUTSUMI; Masanori | 2019-08-15 |
Three-dimensional Memory Device With Gated Contact Via Structures And Method Of Making Thereof
App 20190096808 - TSUTSUMI; Masanori ; et al. | 2019-03-28 |
On-pitch drain select level isolation structure for three-dimensional memory device and method of making the same
Grant 10,236,300 - Zhang , et al. | 2019-03-19 |
On-pitch Drain Select Level Isolation Structure For Three-dimensional Memory Device And Method Of Making The Same
App 20190035803 - ZHANG; Yanli ; et al. | 2019-01-31 |
Three-dimensional memory device with self-aligned multi-level drain select gate electrodes
Grant 10,192,878 - Tsutsumi , et al. Ja | 2019-01-29 |
Three-dimensional Memory Device Containing Support Pillars Underneath A Retro-stepped Dielectric Material And Method Of Making Thereof
App 20180342531 - Susuki; Hiromasa ; et al. | 2018-11-29 |
Three-dimensional memory device containing support pillars underneath a retro-stepped dielectric material and method of making thereof
Grant 10,141,331 - Susuki , et al. Nov | 2018-11-27 |
Three-dimensional memory device having select gate electrode that is thicker than word lines and method of making thereof
Grant 10,083,982 - Shigemura , et al. September 25, 2 | 2018-09-25 |
Three-dimensional memory device with discrete self-aligned charge storage elements and method of making thereof
Grant 9,991,277 - Tsutsumi , et al. June 5, 2 | 2018-06-05 |
Three-dimensional Memory Device With Discrete Self-aligned Charge Storage Elements And Method Of Making Thereof
App 20180151588 - Tsutsumi; Masanori ; et al. | 2018-05-31 |
Three-dimensional Memory Device Having Select Gate Electrode That Is Thicker Than Word Lines And Method Of Making Thereof
App 20180138194 - SHIGEMURA; Keisuke ; et al. | 2018-05-17 |
Multilayer electronic component
Grant 9,871,500 - Tsutsumi , et al. January 16, 2 | 2018-01-16 |
Three-dimensional memory device containing vertically isolated charge storage regions and method of making thereof
Grant 9,812,463 - Sharangpani , et al. November 7, 2 | 2017-11-07 |
Three-dimensional memory device containing annular etch-stop spacer and method of making thereof
Grant 9,780,034 - Tsutsumi , et al. October 3, 2 | 2017-10-03 |
Three-dimensional Memory Device Containing Vertically Isolated Charge Storage Regions And Method Of Making Thereof
App 20170278859 - SHARANGPANI; Rahul ; et al. | 2017-09-28 |
Three-dimensional Memory Device Containing Annular Etch-stop Spacer And Method Of Making Thereof
App 20170271261 - TSUTSUMI; Masanori ; et al. | 2017-09-21 |
Uniform thickness blocking dielectric portions in a three-dimensional memory structure
Grant 9,754,956 - Tsutsumi , et al. September 5, 2 | 2017-09-05 |
Three-dimensional memory device containing an aluminum oxide etch stop layer for backside contact structure and method of making thereof
Grant 9,754,820 - Tsutsumi , et al. September 5, 2 | 2017-09-05 |
Three-dimensional Memory Device Containing An Aluminum Oxide Etch Stop Layer For Backside Contact Structure And Method Of Making Thereof
App 20170221756 - TSUTSUMI; Masanori ; et al. | 2017-08-03 |
Three-dimensional memory device with different thickness insulating layers and method of making thereof
Grant 9,716,105 - Tsutsumi July 25, 2 | 2017-07-25 |
Multi-charge region memory cells for a vertical NAND device
Grant 9,666,594 - Mizuno , et al. May 30, 2 | 2017-05-30 |
Method of suppressing epitaxial growth in support openings and three-dimensional memory device containing non-epitaxial support pillars in the support openings
Grant 9,576,967 - Kimura , et al. February 21, 2 | 2017-02-21 |
Batch contacts for multiple electrically conductive layers
Grant 9,530,787 - Tsutsumi , et al. December 27, 2 | 2016-12-27 |
Multilayer Electronic Component
App 20160352303 - TSUTSUMI; Masanori ; et al. | 2016-12-01 |
Diplexer including two bandpass filters
Grant 9,413,328 - Tsukamoto , et al. August 9, 2 | 2016-08-09 |
Uniform Thickness Blocking Dielectric Portions In A Three-dimensional Memory Structure
App 20160163728 - TSUTSUMI; Masanori ; et al. | 2016-06-09 |
Batch Contacts For Multiple Electrically Conductive Layers
App 20160111438 - TSUTSUMI; Masanori ; et al. | 2016-04-21 |
Bottom Recess Process For An Outer Blocking Dielectric Layer Inside A Memory Opening
App 20160111439 - Tsutsumi; Masanori ; et al. | 2016-04-21 |
Bottom recess process for an outer blocking dielectric layer inside a memory opening
Grant 9,305,937 - Tsutsumi , et al. April 5, 2 | 2016-04-05 |
Method of making a three dimensional NAND device
Grant 9,305,849 - Tsutsumi , et al. April 5, 2 | 2016-04-05 |
Multi-charge Region Memory Cells For A Vertical Nand Device
App 20160071876 - MIZUNO; Genta ; et al. | 2016-03-10 |
Diplexer Including Two Bandpass Filters
App 20150028965 - TSUKAMOTO; Kazuhiro ; et al. | 2015-01-29 |
Method of manufacturing semiconductor device
Grant 7,892,969 - Tsutsumi , et al. February 22, 2 | 2011-02-22 |
Semiconductor integrated circuit device and power source wiring method therefor
Grant 7,786,513 - Tsutsumi August 31, 2 | 2010-08-31 |
Method Of Manufacturing Semiconductor Device
App 20090163029 - TSUTSUMI; Masanori ; et al. | 2009-06-25 |
MOS transistor circuit
Grant 7,456,478 - Tsutsumi November 25, 2 | 2008-11-25 |
Semiconductor Integrated Circuit And Layout Method For The Same
App 20080256380 - Tsutsumi; Masanori ; et al. | 2008-10-16 |
Semiconductor integrated circuit device and power source wiring method therefor
App 20070210405 - Tsutsumi; Masanori | 2007-09-13 |
Decoupling capacitors and semiconductor integrated circuit
Grant 7,227,211 - Tsutsumi , et al. June 5, 2 | 2007-06-05 |
Delay control circuit device, and a semiconductor integrated circuit device and a delay control method using said delay control circuit device
Grant 7,202,725 - Tsutsumi , et al. April 10, 2 | 2007-04-10 |
MOS transistor circuit
App 20060097326 - Tsutsumi; Masanori | 2006-05-11 |
Decoupling capacitors and semiconductor integrated circuit
App 20050122755 - Tsutsumi, Masanori ; et al. | 2005-06-09 |
Standard cell for plural power supplies and related technologies
Grant 6,818,929 - Tsutsumi , et al. November 16, 2 | 2004-11-16 |
Electromagnetic disturbance analysis method and apparatus and semiconductor device manufacturing method using the method
Grant 6,810,340 - Shimazaki , et al. October 26, 2 | 2004-10-26 |
Standard cell for plural power supplies and related technologies
App 20030230769 - Tsutsumi, Masanori ; et al. | 2003-12-18 |
Delay control circuit device, and a semiconductor integrated circuit device and a delay control method using said delay control circuit device
App 20030141915 - Tsutsumi, Masanori ; et al. | 2003-07-31 |
Electromagnetic disturbance analysis method and apparatus and semiconductor device manufacturing method using the method
App 20020147553 - Shimazaki, Kenji ; et al. | 2002-10-10 |
Cover structure for exhaust manifold inlet ducts
Grant 4,924,669 - Tsutsumi May 15, 1 | 1990-05-15 |
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