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name:-0.062533855438232
name:-0.038454055786133
name:-0.0062358379364014
Tseng; Hua-Chou Patent Filings

Tseng; Hua-Chou

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tseng; Hua-Chou.The latest application filed is for "transistor with asymmetric source and drain regions".

Company Profile
5.38.46
  • Tseng; Hua-Chou - Hsinchu TW
  • TSENG; HUA-CHOU - Hsinchu City TW
  • Tseng; Hua-Chou - Hsin-Chu TW
  • TSENG; Hua-Chou - Hsin-Chu City TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Transistor with asymmetric source and drain regions
Grant 11,450,769 - Liao , et al. September 20, 2
2022-09-20
Transistor with Asymmetric Source and Drain Regions
App 20210184036 - LIAO; HSIEN-YUAN ;   et al.
2021-06-17
Transistor with asymmetric source and drain regions
Grant 10,964,814 - Liao , et al. March 30, 2
2021-03-30
Transistor with Asymmetric Source and Drain Regions
App 20190245084 - LIAO; HSIEN-YUAN ;   et al.
2019-08-08
Transistor with asymmetric source and drain regions
Grant 10,276,716 - Liao , et al.
2019-04-30
Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same
Grant 10,243,075 - Tseng , et al.
2019-03-26
Method of forming capacitor structure
Grant 10,102,972 - Hua , et al. October 16, 2
2018-10-16
Metal gate transistor, integrated circuits, systems, and fabrication methods thereof
Grant 10,068,836 - Ho , et al. September 4, 2
2018-09-04
Junction Fet Semiconductor Device With Dummy Mask Structures For Improved Dimension Control And Method For Forming The Same
App 20180053850 - TSENG; Hua-Chou ;   et al.
2018-02-22
Transistor with Asymmetric Source and Drain Regions
App 20170345930 - LIAO; HSIEN-YUAN ;   et al.
2017-11-30
Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same
Grant 9,818,866 - Tseng , et al. November 14, 2
2017-11-14
Metal Gate Transistor, Integrated Circuits, Systems, And Fabrication Methods Thereof
App 20170213780 - HO; Chien-Chih ;   et al.
2017-07-27
Dummy gate for a high voltage transistor device
Grant 9,711,593 - Tseng , et al. July 18, 2
2017-07-18
Metal gate transistor, integrated circuits, systems, and fabrication methods thereof
Grant 9,620,421 - Ho , et al. April 11, 2
2017-04-11
Isolation structure
Grant 9,583,564 - Yu , et al. February 28, 2
2017-02-28
Semiconductor device having a double deep well and method of manufacturing same
Grant 9,431,251 - Tseng , et al. August 30, 2
2016-08-30
Junction Fet Semiconductor Device With Dummy Mask Structures For Improved Dimension Control And Method For Forming The Same
App 20160035888 - TSENG; Hua-Chou ;   et al.
2016-02-04
Junction FET semiconductor device with dummy mask structures for improved dimension control and method for forming the same
Grant 9,196,751 - Tseng , et al. November 24, 2
2015-11-24
Semiconductor Device Having A Double Deep Well And Method Of Manufacturing Same
App 20150162198 - TSENG; Hua-Chou ;   et al.
2015-06-11
Method Of Forming Capacitor Structure
App 20150155096 - HUA; Wei-Chun ;   et al.
2015-06-04
Semiconductor device having a double deep well
Grant 8,987,825 - Tseng , et al. March 24, 2
2015-03-24
Protection structure for metal-oxide-metal capacitor
Grant 8,971,014 - Hua , et al. March 3, 2
2015-03-03
Semiconductor Device Having A Double Deep Well And Method Of Manufacturing Same
App 20140361367 - TSENG; Hua-Chou ;   et al.
2014-12-11
Junction Fet Semiconductor Device With Dummy Mask Structures For Improved Dimension Control And Method For Forming The Same
App 20140264476 - TSENG; Hua-Chou ;   et al.
2014-09-18
Isolation Structure
App 20140264618 - YU; Shu-Jenn ;   et al.
2014-09-18
Forming bipolar transistor through fast EPI-growth on polysilicon
Grant 8,581,347 - Yeh , et al. November 12, 2
2013-11-12
Dummy Gate For A High Voltage Transistor Device
App 20130161739 - TSENG; Hua-Chou ;   et al.
2013-06-27
Hard mask for thin film resistor manufacture
Grant 8,334,187 - Chang , et al. December 18, 2
2012-12-18
Profile design for lateral-vertical bipolar junction transistor
Grant 8,324,713 - Chen , et al. December 4, 2
2012-12-04
Metal Gate Transistor, Integrated Circuits, Systems, And Fabrication Methods Thereof
App 20120119306 - HO; Chien-Chih ;   et al.
2012-05-17
Protection Structure For Metal-oxide-metal Capacitor
App 20120092806 - HUA; Wei-Chun ;   et al.
2012-04-19
Method for reducing capacitance variation between capacitors
Grant 8,133,792 - Liang , et al. March 13, 2
2012-03-13
Structure of capacitor set
Grant 8,114,752 - Liang , et al. February 14, 2
2012-02-14
Forming Bipolar Transistor Through Fast Epi-growth On Polysilicon
App 20120018811 - Yeh; Der-Chyang ;   et al.
2012-01-26
Hard Mask For Thin Film Resistor Manufacture
App 20110318898 - Chang; Li-Wen ;   et al.
2011-12-29
Profile Design for Lateral-Vertical Bipolar Junction Transistor
App 20100213575 - Chen; Shuo-Mao ;   et al.
2010-08-26
Structure Of Capacitor Set
App 20100140741 - Liang; Victor Chiang ;   et al.
2010-06-10
Varactor
Grant 7,705,428 - Hung , et al. April 27, 2
2010-04-27
Method for fabricating a transformer integrated with a semiconductor structure
Grant 7,367,113 - Hung , et al. May 6, 2
2008-05-06
Conductive Shielding Pattern And Semiconductor Structure With Inductor Device
App 20080029854 - Hung; Cheng-Chou ;   et al.
2008-02-07
Method for fabricating a transformer integrated with a semiconductor structure
Grant 7,321,285 - Hung , et al. January 22, 2
2008-01-22
Structure Of Capacitor Set And Method For Reducing Capacitance Variation Between Capacitors
App 20080012092 - Liang; Victor-Chiang ;   et al.
2008-01-17
Varactor
App 20070246801 - Hung; Cheng-Chou ;   et al.
2007-10-25
Method For Fabricating A Transformer Integrated With A Semiconductor Structure
App 20070236320 - Hung; Cheng-Chou ;   et al.
2007-10-11
Method For Fabricating A Transformer Integrated With A Semiconductor Structure
App 20070234554 - Hung; Cheng-Chou ;   et al.
2007-10-11
Heterojunction bipolar transistor
Grant 7,271,428 - Fan , et al. September 18, 2
2007-09-18
Varactor
App 20070210402 - Chen; Yu-Chia ;   et al.
2007-09-13
Capacitor Structure
App 20070181973 - Hung; Cheng-Chou ;   et al.
2007-08-09
Structure and fabrication method of electrostatic discharge protection circuit
Grant 7,253,480 - Chen , et al. August 7, 2
2007-08-07
Method of fabricating inductor and structure formed therefrom
Grant 7,167,072 - Hung , et al. January 23, 2
2007-01-23
Formation method of SiGe HBT
Grant 7,049,240 - Fan , et al. May 23, 2
2006-05-23
Method of fabricating inductor and structure formed therefrom
App 20050212641 - Hung, Chien-Chou ;   et al.
2005-09-29
Fabrication method for heterojunction bipolar transistor
App 20050110044 - Fan, Cheng-Wen ;   et al.
2005-05-26
Formation method of SiGe HBT
App 20050101115 - Fan, Cheng-Wen ;   et al.
2005-05-12
Fabrication method for heterojunction bipolar transistor
Grant 6,881,640 - Fan , et al. April 19, 2
2005-04-19
Fabrication Method For Heterojunction Bipolar Transistor
App 20050051797 - Fan, Cheng-Wen ;   et al.
2005-03-10
Structure and fabrication method of electrostatic discharge protection circuit
App 20050045956 - Chen, Shiao-Shien ;   et al.
2005-03-03
Fabrication method of an electrostatic discharge protection circuit with a low resistant current path
Grant 6,855,611 - Chen , et al. February 15, 2
2005-02-15
Method of manufacturing low-leakage, high-performance device
App 20040005763 - Tseng, Hua-Chou ;   et al.
2004-01-08
Structure and fabrication method of electrostatic discharge protection circuit
App 20030197225 - Chen, Shiao-Shien ;   et al.
2003-10-23
Structure and fabrication method of electrostatic discharge protection circuit
App 20030197242 - Chen, Shiao-Shien ;   et al.
2003-10-23
Structure and fabrication method of electrostatic discharge protection circuit
App 20030197226 - Chen, Shiao-Shien ;   et al.
2003-10-23
Method of measuring thickness of epitaxial layer
Grant 6,521,470 - Lin , et al. February 18, 2
2003-02-18
Method of fabricating a vertical MOS transistor
App 20030008515 - Chen, Tai-Ju ;   et al.
2003-01-09
Method for forming self-aligned local-halo metal-oxide-semiconductor device
Grant 6,489,206 - Chen , et al. December 3, 2
2002-12-03
Front stage process of a fully depleted silicon-on-insulator device and a structure thereof
Grant 6,476,448 - Yeh , et al. November 5, 2
2002-11-05
Method for forming self-aligned local-halo metal-oxide-semiconductor device
App 20020137293 - Chen, Tai-Ju ;   et al.
2002-09-26
Method For Forming Self-aligned Local-halo Metal-oxide-semiconductor Device
App 20020135015 - Chen, Tai-Ju ;   et al.
2002-09-26
Method for reducing the gate induced drain leakage current
App 20020137299 - Tseng, Hua-Chou ;   et al.
2002-09-26
Front stage process of a fully depleted silicon-on-insulator device and a structure thereof
App 20020110988 - Yeh, Wen-Kuan ;   et al.
2002-08-15
Method For Filling Of A Shallow Trench Isolation
App 20020106864 - Chen, Tai-Ju ;   et al.
2002-08-08
Front stage process of a fully depleted silicon-on-insulator device and a structure thereof
App 20020093054 - Yeh, Wen-Kuan ;   et al.
2002-07-18
Method of forming a substrate contact electrode in a SOI wafer
App 20020090763 - Tseng, Hua-Chou
2002-07-11
Method of fabricating a shallow trench isolation structure
App 20020068415 - Tseng, Hua-Chou ;   et al.
2002-06-06
Method of manufacturing low-leakage, high-performance device
App 20020068410 - Tseng, Hua-Chou ;   et al.
2002-06-06
Fabrication of a shallow trench isolation by plasma oxidation
Grant 6,368,941 - Chen , et al. April 9, 2
2002-04-09
Transister With A Buffer Layer And Raised Source/drain Regions
App 20010045608 - TSENG, HUA-CHOU ;   et al.
2001-11-29
Method of fabricating a MOS transistor on a semiconductor wafer
Grant 6,190,982 - Tseng , et al. February 20, 2
2001-02-20
Method for forming gate contact in complementary metal oxide semiconductor
Grant 6,174,776 - Hao , et al. January 16, 2
2001-01-16

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