| Patent | Date |
|---|
Standard-cell layout structure with horn power and smart metal cut
Grant 11,437,321 - Fan , et al. September 6, 2 | 2022-09-06 |
Connection structure for stacked substrates
Grant 11,217,553 - Tseng , et al. January 4, 2 | 2022-01-04 |
Semiconductor Structures and Methods of Forming the Same
App 20210225838 - Fan; Ni-Wan ; et al. | 2021-07-22 |
Semiconductor structures and methods of forming the same
Grant 10,985,160 - Fan , et al. April 20, 2 | 2021-04-20 |
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20210089698 - HSIEH; Shang-Chih ; et al. | 2021-03-25 |
Standard-cell layout structure with horn power and smart metal cut
Grant 10,923,426 - Fan , et al. February 16, 2 | 2021-02-16 |
Integrated circuit designing system
Grant 10,867,100 - Hsieh , et al. December 15, 2 | 2020-12-15 |
System for designing integrated circuit layout and method of making the integrated circuit layout
Grant 10,867,099 - Hsieh , et al. December 15, 2 | 2020-12-15 |
Standard-cell Layout Structure With Horn Power And Smart Metal Cut
App 20200243446 - Fan; Ni-Wan ; et al. | 2020-07-30 |
Standard-cell layout structure with horn power and smart metal cut
Grant 10,672,708 - Fan , et al. | 2020-06-02 |
Integrated Circuits And Manufacturing Methods Thereof
App 20200126986 - KESHAVARZI; Ali ; et al. | 2020-04-23 |
Semiconductor device having engineering change order (ECO) cells and method of using
Grant 10,553,575 - Tien , et al. Fe | 2020-02-04 |
Connection Structure For Stacked Substrates
App 20200027853 - Tseng; Hsiang-Jen ; et al. | 2020-01-23 |
Connecting Techniques For Stacked Substrates
App 20200027854 - Tseng; Hsiang-Jen ; et al. | 2020-01-23 |
Integrated circuits and manufacturing methods thereof
Grant 10,535,655 - Keshavarzi , et al. Ja | 2020-01-14 |
Semiconductor Structures and Methods of Forming the Same
App 20190393219 - Fan; Ni-Wan ; et al. | 2019-12-26 |
Connecting techniques for stacked CMOS devices
Grant 10,497,661 - Tseng , et al. De | 2019-12-03 |
Integrated Circuit Designing System
App 20190332736 - HSIEH; Shang-Chih ; et al. | 2019-10-31 |
Semiconductor structures and methods of forming the same
Grant 10,446,546 - Fan , et al. Oc | 2019-10-15 |
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20190258768 - HSIEH; Shang-Chih ; et al. | 2019-08-22 |
Layout of standard cells for predetermined function in integrated circuits
Grant 10,380,306 - Hsieh , et al. A | 2019-08-13 |
System for designing integrated circuit layout and method of making the integrated circuit layout
Grant 10,289,789 - Hsieh , et al. | 2019-05-14 |
Standard-cell Layout Structure With Horn Power And Smart Metal Cut
App 20180350743 - Fan; Ni-Wan ; et al. | 2018-12-06 |
Electromigration resistant semiconductor device
Grant 10,128,234 - Fan , et al. November 13, 2 | 2018-11-13 |
Electromigration Resistant Semiconductor Device
App 20180145070 - Fan; Ni-Wan ; et al. | 2018-05-24 |
Semiconductor Structures and Methods of Forming the Same
App 20180138171 - Fan; Ni-Wan ; et al. | 2018-05-17 |
Connecting Techniques For Stacked Cmos Devices
App 20180108635 - Tseng; Hsiang-Jen ; et al. | 2018-04-19 |
Semiconductor Device Having Engineering Change Order (eco) Cells And Method Of Using
App 20180076190 - TIEN; Li-Chun ; et al. | 2018-03-15 |
FinFET with an asymmetric source/drain structure and method of making same
Grant 9,882,002 - Tseng , et al. January 30, 2 | 2018-01-30 |
Connecting techniques for stacked CMOS devices
Grant 9,853,008 - Tseng , et al. December 26, 2 | 2017-12-26 |
Standard cell layout, semiconductor device having engineering change order (ECO) cells and method
Grant 9,831,230 - Tien , et al. November 28, 2 | 2017-11-28 |
System For Designing Integrated Circuit Layout And Method Of Making The Integrated Circuit Layout
App 20170255739 - HSIEH; Shang-Chih ; et al. | 2017-09-07 |
Standard-cell Layout Structure With Horn Power And Smart Metal Cut
App 20170154848 - Fan; Ni-Wan ; et al. | 2017-06-01 |
Standard cell having cell height being non-integral multiple of nominal minimum pitch
Grant 9,659,129 - Hsieh , et al. May 23, 2 | 2017-05-23 |
Method and layout of an integrated circuit
Grant 9,653,393 - Chen , et al. May 16, 2 | 2017-05-16 |
Layout Of Standard Cells For Predetermined Function In Integrated Circuits
App 20170068767 - HSIEH; Shang-Chih ; et al. | 2017-03-09 |
Integrated Circuits And Manufacturing Methods Thereof
App 20160372469 - Keshavarzi; Ali ; et al. | 2016-12-22 |
Standard cells for predetermined function having different types of layout
Grant 9,501,600 - Hsieh , et al. November 22, 2 | 2016-11-22 |
Connecting Techniques For Stacked Cmos Devices
App 20160336289 - Tseng; Hsiang-Jen ; et al. | 2016-11-17 |
Contact Structure Of Semiconductor Device
App 20160329405 - Tseng; Hsiang-Jen ; et al. | 2016-11-10 |
Connecting techniques for stacked CMOS devices
Grant 9,443,758 - Tseng , et al. September 13, 2 | 2016-09-13 |
Contact structure of non-planar semiconductor device
Grant 9,397,217 - Tseng , et al. July 19, 2 | 2016-07-19 |
Integrated circuits and manufacturing methods thereof
Grant 9,385,213 - Wu , et al. July 5, 2 | 2016-07-05 |
FinFET with an Asymmetric Source/Drain Structure and Method of Making Same
App 20160118462 - Tseng; Hsiang-Jen ; et al. | 2016-04-28 |
Method and layout of an integrated circuit
Grant 9,323,881 - Tseng , et al. April 26, 2 | 2016-04-26 |
Integrated circuits and manufacturing methods thereof
Grant 9,312,260 - Keshavarzi , et al. April 12, 2 | 2016-04-12 |
Method and layout of an integrated circuit
Grant 9,245,887 - Chiang , et al. January 26, 2 | 2016-01-26 |
FinFET with an asymmetric source/drain structure and method of making same
Grant 9,231,106 - Tseng , et al. January 5, 2 | 2016-01-05 |
Standard cell metal structure directly over polysilicon structure
Grant 9,158,877 - Hsieh , et al. October 13, 2 | 2015-10-13 |
Layout of an integrated circuit
Grant 9,098,668 - Tien , et al. August 4, 2 | 2015-08-04 |
Method and Layout of an Integrated Circuit
App 20150171005 - Chen; Wei-Yu ; et al. | 2015-06-18 |
Connecting Techniques For Stacked Cmos Devices
App 20150162295 - Tseng; Hsiang-Jen ; et al. | 2015-06-11 |
Layout Of An Integrated Circuit
App 20150149976 - Tien; Li-Chun ; et al. | 2015-05-28 |
Standard Cell Layout, Semiconductor Device Having Engineering Change Order (eco) Cells And Method
App 20150048424 - TIEN; Li-Chun ; et al. | 2015-02-19 |
Method And Layout Of An Integrated Circuit
App 20150035070 - Chiang; Ting-Wei ; et al. | 2015-02-05 |
Method And Layout Of An Integrated Circuit
App 20140332971 - TSENG; Hsiang-Jen ; et al. | 2014-11-13 |
Standard Cell Having Cell Height Being Non-integral Multiple Of Nominal Minimum Pitch
App 20140327050 - HSIEH; Shang-Chih ; et al. | 2014-11-06 |
Standard Cell Metal Structure Directly Over Polysilicon Structure
App 20140327081 - HSIEH; Shang-Chih ; et al. | 2014-11-06 |
Standard Cells For Predetermined Function Having Different Types Of Layout
App 20140327471 - HSIEH; Shang-Chih ; et al. | 2014-11-06 |
FinFET with an Asymmetric Source/Drain Structure and Method of Making Same
App 20140252477 - Tseng; Hsiang-Jen ; et al. | 2014-09-11 |
Method and layout of an integrated circuit
Grant 8,819,610 - Tseng , et al. August 26, 2 | 2014-08-26 |
Method And Layout Of An Integrated Circuit
App 20140195997 - TSENG; Hsiang-Jen ; et al. | 2014-07-10 |
Contact Structure Of Semiconductor Device
App 20140183632 - Tseng; Hsiang-Jen ; et al. | 2014-07-03 |
Integrated Circuits And Manufacturing Methods Thereof
App 20130130456 - WU; Chung-Cheng ; et al. | 2013-05-23 |
Integrated circuits and manufacturing methods thereof
Grant 8,362,573 - Wu , et al. January 29, 2 | 2013-01-29 |
Integrated Circuits And Manufacturing Methods Thereof
App 20110291200 - KESHAVARZI; Ali ; et al. | 2011-12-01 |
Integrated Circuits And Manufacturing Methods Thereof
App 20110291197 - WU; Chung-Cheng ; et al. | 2011-12-01 |
| 