loadpatents
name:-0.018615961074829
name:-0.048909902572632
name:-0.00047612190246582
Tripsas; Nicholas H. Patent Filings

Tripsas; Nicholas H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tripsas; Nicholas H..The latest application filed is for "buried silicide local interconnect with sidewall spacers and method for making the same".

Company Profile
0.46.12
  • Tripsas; Nicholas H. - San Jose CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Buried silicide local interconnect with sidewall spacers and method for making the same
Grant 8,368,219 - Halliyal , et al. February 5, 2
2013-02-05
Buried Silicide Local Interconnect With Sidewall Spacers And Method For Making The Same
App 20120038051 - Halliyal; Arvind ;   et al.
2012-02-16
Buried silicide local interconnect with sidewall spacers and method for making the same
Grant 8,049,334 - Halliyal , et al. November 1, 2
2011-11-01
Semiconductor device built on plastic substrate
Grant 8,044,387 - Buynoski , et al. October 25, 2
2011-10-25
Processing a copolymer to form a polymer memory cell
Grant 8,012,673 - Pangrle , et al. September 6, 2
2011-09-06
Stacked organic memory devices and methods of operating and fabricating
Grant 8,003,436 - Tripsas , et al. August 23, 2
2011-08-23
Buried silicide local interconnect with sidewall spacers and method for making the same
Grant 7,786,003 - Halliyal , et al. August 31, 2
2010-08-31
Memory device with a selection element and a control line in a substantially similar layer
Grant 7,696,017 - Tripsas , et al. April 13, 2
2010-04-13
Nitridation of gate oxide by laser processing
Grant 7,670,936 - Halliyal , et al. March 2, 2
2010-03-02
System and method for processing an organic memory cell
Grant 7,632,706 - Yudanov , et al. December 15, 2
2009-12-15
Methods and systems for recovering data in a nonvolatile memory array
Grant 7,561,465 - Hancock , et al. July 14, 2
2009-07-14
Stacked Organic Memory Devices And Methods Of Operating And Fabricating
App 20090081824 - Tripsas; Nicholas H. ;   et al.
2009-03-26
Stacked organic memory devices and methods of operating and fabricating
Grant 7,465,956 - Tripsas , et al. December 16, 2
2008-12-16
Methods and systems for memory devices
App 20080175054 - Hancock; Bryan William ;   et al.
2008-07-24
Memory device with a selection element and a control line in a substantially similar layer
Grant 7,391,064 - Tripsas , et al. June 24, 2
2008-06-24
Preamorphization to minimize void formation
Grant 7,361,586 - Adem , et al. April 22, 2
2008-04-22
Utilization of a Ta-containing cap over copper to facilitate concurrent formation of copper vias and memory element structures
Grant 7,232,765 - Avanzino , et al. June 19, 2
2007-06-19
Protection of active layers of memory cells during processing of other elements
Grant 7,220,642 - Avanzino , et al. May 22, 2
2007-05-22
System and method for processing an organic memory cell
App 20070090343 - Yudanov; Nicolay F. ;   et al.
2007-04-26
Systems and methods for a memory and/or selection element formed within a recess in a metal line
Grant 7,199,416 - Tripsas , et al. April 3, 2
2007-04-03
Preamorphization to minimize void formation
App 20070020919 - Adem; Ercan ;   et al.
2007-01-25
Protection of active layers of memory cells during processing of other elements
App 20060102887 - Avanzino; Steven ;   et al.
2006-05-18
Diode Array Architecture For Addressing Nanoscale Resistive Memory Arrays
App 20060104111 - Tripsas; Nicholas H. ;   et al.
2006-05-18
Diode array architecture for addressing nanoscale resistive memory arrays
Grant 7,035,141 - Tripsas , et al. April 25, 2
2006-04-25
Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
Grant 7,001,807 - Zheng , et al. February 21, 2
2006-02-21
Stacked organic memory devices and methods of operating and fabricating
Grant 6,979,837 - Tripsas , et al. December 27, 2
2005-12-27
Planar polymer memory device
Grant 6,977,389 - Tripsas , et al. December 20, 2
2005-12-20
Implant damage removal by laser thermal annealing
Grant 6,872,643 - Halliyal , et al. March 29, 2
2005-03-29
Stacked organic memory devices and methods of operating and fabricating
Grant 6,870,183 - Tripsas , et al. March 22, 2
2005-03-22
Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
Grant 6,861,307 - Zheng , et al. March 1, 2
2005-03-01
Self assembly of conducting polymer for formation of polymer memory cell
Grant 6,852,586 - Buynoski , et al. February 8, 2
2005-02-08
Planar polymer memory device
App 20040238864 - Tripsas, Nicholas H. ;   et al.
2004-12-02
Stacked organic memory devices and methods of operating and fabricating
App 20040217347 - Tripsas, Nicholas H. ;   et al.
2004-11-04
Use of high-K dielectric material in modified ONO structure for semiconductor devices
Grant 6,803,272 - Halliyal , et al. October 12, 2
2004-10-12
Polymer memory device formed in via opening
Grant 6,787,458 - Tripsas , et al. September 7, 2
2004-09-07
Laser thermal annealing method for high dielectric constant gate oxide films
Grant 6,783,591 - Halliyal , et al. August 31, 2
2004-08-31
Memory device and method of making
Grant 6,753,570 - Tripsas , et al. June 22, 2
2004-06-22
Method(s) facilitating formation of memory cell(s) and patterned conductive
Grant 6,753,247 - Okoroanyanwu , et al. June 22, 2
2004-06-22
Method of forming copper sulfide for memory cell
Grant 6,746,971 - Ngo , et al. June 8, 2
2004-06-08
High density dual bit flash memory cell with non planar structure
Grant 6,735,123 - Tripsas , et al. May 11, 2
2004-05-11
Stacked organic memory devices and methods of operating and fabricating
App 20040084670 - Tripsas, Nicholas H. ;   et al.
2004-05-06
Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
App 20040021172 - Zheng, Wei ;   et al.
2004-02-05
Use of high-k dielectric materials in modified ONO structure for semiconductor devices
Grant 6,674,138 - Halliyal , et al. January 6, 2
2004-01-06
Etch damage repair with thermal annealing
Grant 6,667,243 - Ramsbey , et al. December 23, 2
2003-12-23
Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
Grant 6,639,271 - Zheng , et al. October 28, 2
2003-10-28
Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layer
Grant 6,630,383 - Ibok , et al. October 7, 2
2003-10-07
Memory device and method of making
Grant 6,627,945 - Tripsas , et al. September 30, 2
2003-09-30
Monos device having buried metal silicide bit line
App 20030119314 - Ogura, Jusuke ;   et al.
2003-06-26
Non-volatile memory dielectric as charge pump dielectric
Grant 6,548,855 - Ramsbey , et al. April 15, 2
2003-04-15
Memory cell structure for elimination of oxynitride (ONO) etch residue and polysilicon stringers
Grant 6,455,888 - Early , et al. September 24, 2
2002-09-24
Non-charging critical dimension SEM metrology standard
Grant 6,420,702 - Tripsas , et al. July 16, 2
2002-07-16
Ion source and method for using same
Grant 6,355,933 - Tripsas , et al. March 12, 2
2002-03-12
Semiconductor device having a reduced height floating gate
Grant 6,034,395 - Tripsas , et al. March 7, 2
2000-03-07
Elimination of oxynitride (ONO) etch residue and polysilicon stringers through isolation of floating gates on adjacent bitlines by polysilicon oxidation
Grant 6,030,868 - Early , et al. February 29, 2
2000-02-29
Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices
Grant 6,025,240 - Chan , et al. February 15, 2
2000-02-15
Non-uniform threshold voltage adjustment in flash eproms through gate work function alteration
Grant 5,888,867 - Wang , et al. March 30, 1
1999-03-30
Dopant profile spreading for arsenic source/drain
Grant 5,789,802 - Tripsas August 4, 1
1998-08-04

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