Tay; Lionel Chien Hui

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tay; Lionel Chien Hui.The latest application filed is for "semiconductor device and method of forming wafer level ground plane and power ring".

Company Profile

4.148.113

Tay; Lionel Chien Hui - Singapore SG
- Singapore SG

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor device and method of forming wafer level ground plane and power ring Grant 10,651,139 - Badakere , et al.	2020-05-12
Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumps Grant RE47,923 - Camacho , et al.	2020-03-31
Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP Grant 9,922,955 - Camacho , et al. March 20, 2	2018-03-20
Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die Grant 9,666,540 - Dahilig , et al. May 30, 2	2017-05-30
Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection Grant 9,589,876 - Camacho , et al. March 7, 2	2017-03-07
Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device Grant 9,525,080 - Camacho , et al. December 20, 2	2016-12-20
Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring App 20160293558 - Badakere; Guruprasad G. ; et al.	2016-10-06
Optical semiconductor device having pre-molded leadframe with window and method therefor Grant 9,397,236 - Camacho , et al. July 19, 2	2016-07-19
Semiconductor device and method of forming wafer level ground plane and power ring Grant 9,390,991 - Badakere , et al. July 12, 2	2016-07-12
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof Grant 9,337,161 - Camacho , et al. May 10, 2	2016-05-10
Semiconductor Device and Method of Forming Prefabricated Heat Spreader Frame with Embedded Semiconductor Die App 20160104681 - Dahilig; Frederick R. ; et al.	2016-04-14
Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die Grant 9,257,357 - Dahilig , et al. February 9, 2	2016-02-09
Semiconductor device and method of forming a conductive via-in-via structure Grant 9,252,075 - Tay , et al. February 2, 2	2016-02-02
Semiconductor package system with cut multiple lead pads Grant 9,202,777 - Tay , et al. December 1, 2	2015-12-01
Integrated circuit packaging system with plated leads and method of manufacture thereof Grant 9,142,531 - Camacho , et al. September 22, 2	2015-09-22
Semiconductor device and method of forming wafer level die integration Grant 9,142,514 - Camacho , et al. September 22, 2	2015-09-22
Semiconductor device with bump interconnection Grant 9,129,971 - Camacho , et al. September 8, 2	2015-09-08
Integrated circuit packaging system with bumps and method of manufacture thereof Grant 9,076,737 - Camacho , et al. July 7, 2	2015-07-07
Integrated circuit package system with planar interconnect Grant 9,059,074 - Camacho , et al. June 16, 2	2015-06-16
Integrated circuit package system with array of external interconnects Grant 8,957,515 - Camacho , et al. February 17, 2	2015-02-17
Through hole vias at saw streets including protrusions or recesses for interconnection Grant 8,940,636 - Pagaila , et al. January 27, 2	2015-01-27
Etched recess package on package system Grant 8,941,219 - Camacho , et al. January 27, 2	2015-01-27
Integrated circuit package system with device cavity Grant 8,937,393 - Bathan , et al. January 20, 2	2015-01-20
Semiconductor package and method of forming similar structure for top and bottom bonding pads Grant 8,921,983 - Tay , et al. December 30, 2	2014-12-30
Semiconductor package and method of forming similar structure for top and bottom bonding pads Grant 08921983 -	2014-12-30
Integrated Circuit Package System with Removable Backing Element Having Plated Terminal Leads and Method of Manufacture Thereof App 20140332955 - Camacho; Zigmund R. ; et al.	2014-11-13
Semiconductor device and method of forming PIP with inner known good die interconnected with conductive bumps Grant 8,884,418 - Camacho , et al. November 11, 2	2014-11-11
Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device Grant 8,866,248 - Camacho , et al. October 21, 2	2014-10-21
Semiconductor Device And Method Of Forming Pip With Inner Known Good Die Interconnected With Conductive Bumps App 20140284788 - Camacho; Zigmund R. ; et al.	2014-09-25
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof Grant 8,810,017 - Camacho , et al. August 19, 2	2014-08-19
Integrated circuit packaging system with a leaded package and method of manufacture thereof Grant 8,729,693 - Camacho , et al. May 20, 2	2014-05-20
System and apparatus for wafer level integration of components Grant 8,722,457 - Camacho , et al. May 13, 2	2014-05-13
Integrated circuit packaging system with plated leads and method of manufacture thereof Grant 8,692,377 - Camacho , et al. April 8, 2	2014-04-08
Integrated circuit packaging system with stacked paddle and method of manufacture thereof Grant 8,664,038 - Camacho , et al. March 4, 2	2014-03-04
Integrated circuit package system having perimeter paddle Grant 8,643,157 - Tay , et al. February 4, 2	2014-02-04
Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor App 20140011315 - Camacho; Zigmund R. ; et al.	2014-01-09
Semiconductor Device and Method of Forming a Wafer Level Package with Top and Bottom Solder Bump Interconnection App 20130341789 - Camacho; Zigmund R. ; et al.	2013-12-26
Semiconductor device and method of forming through hole vias in die extension region around periphery of die Grant 8,592,252 - Bathan , et al. November 26, 2	2013-11-26
Optical semiconductor device having pre-molded leadframe with window and method therefor Grant 8,586,422 - Camacho , et al. November 19, 2	2013-11-19
Semiconductor Device and Method of Forming Prefabricated Heat Spreader Frame with Embedded Semiconductor Die App 20130256866 - Dahilig; Frederick R. ; et al.	2013-10-03
Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection Grant 8,546,189 - Camacho , et al. October 1, 2	2013-10-01
Integrated circuit packaging system with cap layer and method of manufacture thereof Grant 8,536,690 - Camacho , et al. September 17, 2	2013-09-17
Semiconductor device and method of forming prefabricated heat spreader frame with embedded semiconductor die Grant 8,518,749 - Dahilig , et al. August 27, 2	2013-08-27
Integrated circuit package system Grant 8,513,801 - Tay , et al. August 20, 2	2013-08-20
Wirebondless wafer level package with plated bumps and interconnects Grant 8,502,376 - Camacho , et al. August 6, 2	2013-08-06
Integrated circuit package system with extended corner leads Grant 8,502,371 - Camacho , et al. August 6, 2	2013-08-06
Packaging system with hollow package and method for the same Grant 8,493,748 - Camacho , et al. July 23, 2	2013-07-23
Integrated circuit package system with external interconnects at high density Grant 8,421,198 - Tay , et al. April 16, 2	2013-04-16
Integrated circuit packaging system with flipchip leadframe and method of manufacture thereof Grant 8,420,447 - Tay , et al. April 16, 2	2013-04-16
Semiconductor device and method of forming through hole vias in die extension region around periphery of die Grant 8,399,991 - Bathan , et al. March 19, 2	2013-03-19
Integrated circuit packaging system with isolated pads and method of manufacture thereof Grant 8,389,332 - Camacho , et al. March 5, 2	2013-03-05
Wire-on-lead package system having leadfingers positioned between paddle extensions and method of manufacture thereof Grant 8,362,601 - Camacho , et al. January 29, 2	2013-01-29
Method and apparatus for a package having multiple stacked die Grant 8,354,742 - Camacho , et al. January 15, 2	2013-01-15
Integrated circuit packaging system with interconnect and method of manufacture thereof Grant 8,344,495 - Camacho , et al. January 1, 2	2013-01-01
Semiconductor Device and Method of Forming a Conductive Via-in-Via Structure App 20120326329 - Tay; Lionel Chien Hui ; et al.	2012-12-27
Semiconductor Device and Method of Forming PIP with Inner Known Good Die Interconnected with Conductive Bumps App 20120326302 - Camacho; Zigmund R. ; et al.	2012-12-27
Semiconductor Device with Optical Sensor and Method of Forming Interconnect Structure on Front and Backside of the Device App 20120286400 - Camacho; Zigmund R. ; et al.	2012-11-15
Fan-in interposer on lead frame for an integrated circuit package on package system Grant 8,304,869 - Camacho , et al. November 6, 2	2012-11-06
Wafer Level Die Integration and Method App 20120276691 - Camacho; Zigmund R. ; et al.	2012-11-01
Integrated Circuit Package System With Removable Backing Element Having Plated Terminal Leads And Method Of Manufacture Thereof App 20120261808 - Camacho; Zigmund Ramirez ; et al.	2012-10-18
Semiconductor device and method of forming PiP with inner known good die interconnected with conductive bumps Grant 8,283,209 - Camacho , et al. October 9, 2	2012-10-09
Semiconductor device and method of forming a conductive via-in-via structure Grant 8,283,250 - Tay , et al. October 9, 2	2012-10-09
Integrated circuit package system with leads separated from a die paddle Grant 8,278,148 - Punzalan , et al. October 2, 2	2012-10-02
Integrated Circuit Packaging System With Plated Leads And Method Of Manufacture Thereof App 20120241966 - Camacho; Zigmund Ramirez ; et al.	2012-09-27
Integrated Circuit Packaging System With Flipchip Leadframe And Method Of Manufacture Thereof App 20120241928 - Tay; Lionel Chien Hui ; et al.	2012-09-27
Integrated circuit package system with integration port Grant 8,273,602 - Bathan , et al. September 25, 2	2012-09-25
Integrated circuit package system with chip on lead Grant 8,269,324 - Trasporto , et al. September 18, 2	2012-09-18
Integrated circuit package system with package integration Grant 8,258,614 - Camacho , et al. September 4, 2	2012-09-04
Semiconductor device and method of forming through hole vias in die extension region around periphery of die Grant 8,252,666 - Bathan , et al. August 28, 2	2012-08-28
Integrated circuit packaging system with a leadframe having radial-segments and method of manufacture thereof Grant 8,252,634 - Camacho , et al. August 28, 2	2012-08-28
Wafer level die integration and method Grant 8,241,954 - Camacho , et al. August 14, 2	2012-08-14
Method for manufacturing semiconductor package system with die support pad Grant 8,216,883 - Camacho , et al. July 10, 2	2012-07-10
Optical Semiconductor Device having Pre-Molded Leadframe with Window and Method Therefor App 20120168806 - Camacho; Zigmund R. ; et al.	2012-07-05
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof Grant 8,212,342 - Camacho , et al. July 3, 2	2012-07-03
Integrated circuit package system with multiple device units and method for manufacturing thereof Grant 8,203,220 - Tay , et al. June 19, 2	2012-06-19
Integrated circuit package in package system with adhesiveless package attach Grant 8,203,214 - Bathan , et al. June 19, 2	2012-06-19
Semiconductor device and method of providing a thermal dissipation path through RDL and conductive via Grant 8,174,098 - Tay , et al. May 8, 2	2012-05-08
Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring App 20120104601 - BADAKERE; Guruprasad G. ; et al.	2012-05-03
Integrated circuit package system with leaded package and method for manufacturing thereof Grant 8,148,208 - Camacho , et al. April 3, 2	2012-04-03
Integrated circuit package system with leadfinger Grant 8,148,825 - Camacho , et al. April 3, 2	2012-04-03
Optical semiconductor device having pre-molded leadframe with window and method therefor Grant 8,138,027 - Camacho , et al. March 20, 2	2012-03-20
Stacked integrated circuit package system with conductive spacer Grant 8,134,227 - Tay , et al. March 13, 2	2012-03-13
Integrated circuit package system with concave terminal Grant 8,134,242 - Camacho , et al. March 13, 2	2012-03-13
Integrated circuit package system with dual connectivity Grant 8,120,150 - Badakere Govindaiah , et al. February 21, 2	2012-02-21
Integrated circuit packaging system with dual row lead-frame having top and bottom terminals and method of manufacture thereof Grant 8,115,287 - Camacho , et al. February 14, 2	2012-02-14
Integrated circuit package system with thin profile Grant 8,115,305 - Camacho , et al. February 14, 2	2012-02-14
Through Hole Vias at Saw Streets Including Protrusions or Recesses for Interconnection App 20120034777 - Pagaila; Reza A. ; et al.	2012-02-09
Integrated circuit packaging system with plated pad and method of manufacture thereof Grant 8,106,502 - Bathan , et al. January 31, 2	2012-01-31
Semiconductor device and method of forming wafer level ground plane and power ring Grant 8,097,943 - Badakere , et al. January 17, 2	2012-01-17
Semiconductor Package and Method of Forming Similar Structure for Top and Bottom Bonding Pads App 20120001326 - Tay; Lionel Chien Hui ; et al.	2012-01-05
Integrated Circuit Packaging System With Increased Connectivity And Method Of Manufacture Thereof App 20110298113 - Dahilig; Frederick Rodriguez ; et al.	2011-12-08
Through hole vias at saw streets including protrusions or recesses for interconnection Grant 8,072,079 - Pagaila , et al. December 6, 2	2011-12-06
Integrated circuit package system with shield and tie bar Grant 8,072,047 - Camacho , et al. December 6, 2	2011-12-06
Integrated Circuit Packaging System With Isolated Pads And Method Of Manufacture Thereof App 20110284999 - Camacho; Zigmund Ramirez ; et al.	2011-11-24
Integrated circuit package system with redistribution layer Grant 8,043,894 - Tay , et al. October 25, 2	2011-10-25
Semiconductor package and method of forming similar structure for top and bottom bonding pads Grant 8,039,302 - Tay , et al. October 18, 2	2011-10-18
Stackable integrated circuit package system with recess Grant 8,035,207 - Camacho , et al. October 11, 2	2011-10-11
Integrated circuit packaging system with increased connectivity and method of manufacture thereof Grant 8,022,539 - Dahilig , et al. September 20, 2	2011-09-20
Semiconductor Device and Method of Forming Package-on-Package Structure Electrically Interconnected Through TSV in WLCSP App 20110215458 - Camacho; Zigmund R. ; et al.	2011-09-08
Wirebondless Wafer Level Package with Plated Bumps and Interconnects App 20110204512 - Camacho; Zigmund R. ; et al.	2011-08-25
Integrated circuit packaging system with isolated pads and method of manufacture thereof Grant 7,998,790 - Camacho , et al. August 16, 2	2011-08-16
Etched Recess Package On Package System App 20110180928 - Camacho; Zigmund Ramirez ; et al.	2011-07-28
Integrated circuit package system with interference-fit feature Grant 7,977,778 - Bathan , et al. July 12, 2	2011-07-12
Integrated circuit package system with dual connectivity Grant 7,977,782 - Camacho , et al. July 12, 2	2011-07-12
Multi-layer package-on-package system Grant 7,977,780 - Tay , et al. July 12, 2	2011-07-12
Mountable integrated circuit package-in-package system Grant 7,977,779 - Camacho , et al. July 12, 2	2011-07-12
Wirebondless wafer level package with plated bumps and interconnects Grant 7,964,450 - Camacho , et al. June 21, 2	2011-06-21
Integrated Circuit Packaging System With Dual Row Lead-frame Having Top And Bottom Terminals And Method Of Manufacture Thereof App 20110140252 - Camacho; Zigmund Ramirez ; et al.	2011-06-16
Integrated Circuit Packaging System With Interconnect And Method Of Manufacture Thereof App 20110140261 - Camacho; Zigmund Ramirez ; et al.	2011-06-16
Semiconductor Device and Method of Forming PIP with Inner Known Good Die Interconnected with Conductive Bumps App 20110140263 - Camacho; Zigmund R. ; et al.	2011-06-16
Integrated Circuit Package System With Removable Backing Element Having Plated Terminal Leads And Method Of Manufacture Thereof App 20110140251 - Camacho; Zigmund Ramirez ; et al.	2011-06-16
Leadframe design for QFN package with top terminal leads Grant 7,960,815 - Camacho , et al. June 14, 2	2011-06-14
Method For Manufacturing Semiconductor Package System With Die Support Pad App 20110129965 - Camacho; Zigmund Ramirez ; et al.	2011-06-02
Semiconductor Device with Bump Interconnection App 20110101524 - Camacho; Zigmund R. ; et al.	2011-05-05
Method for forming an etched recess package on package system Grant 7,932,130 - Camacho , et al. April 26, 2	2011-04-26
Integrated circuit packaging system with exposed terminal interconnects and method of manufacturing thereof Grant 7,919,850 - Trasporto , et al. April 5, 2	2011-04-05
Integrated circuit package system with multiple devices Grant 7,919,848 - Camacho , et al. April 5, 2	2011-04-05
Integrated circuit packaging system with base structure device Grant 7,915,724 - Ha , et al. March 29, 2	2011-03-29
Integrated circuit package system with leadframe array Grant 7,915,716 - Pisigan , et al. March 29, 2	2011-03-29
Integrated Circuit Packaging System With A Leaded Package And Method Of Manufacture Thereof App 20110068458 - Camacho; Zigmund Ramirez ; et al.	2011-03-24
Integrated Circuit Packaging System With Cap Layer And Method Of Manufacture Thereof App 20110068448 - Camacho; Zigmund Ramirez ; et al.	2011-03-24
Integrated circuit package with improved connections Grant 7,911,040 - Tay , et al. March 22, 2	2011-03-22
Semiconductor package system with die support pad Grant 7,911,067 - Camacho , et al. March 22, 2	2011-03-22
Semiconductor Device with Optical Sensor and Method of Forming Interconnect Structure on Front and Backside of the Device App 20110049662 - Camacho; Zigmund R. ; et al.	2011-03-03
Semiconductor Device and Method of Providing a Thermal Dissipation Path Through RDL and Conductive Via App 20110037168 - Tay; Lionel Chien Hui ; et al.	2011-02-17
Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor die Grant 7,888,181 - Camacho , et al. February 15, 2	2011-02-15
Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring App 20110024903 - Badakere; Guruprasad G. ; et al.	2011-02-03
Ball grid array package stacking system Grant 7,871,862 - Chow , et al. January 18, 2	2011-01-18
Ball grid array package system Grant 7,863,732 - Chow , et al. January 4, 2	2011-01-04
Integrated circuit package system with external interconnects within a die platform Grant 7,863,102 - Tay , et al. January 4, 2	2011-01-04
Integrated Circuit Packaging System With Contact Pads And Method Of Manufacture Thereof App 20100320591 - Camacho; Zigmund Ramirez ; et al.	2010-12-23
Integrated Circuit Packaging System With A Leadframe Having Radial-segments And Method Of Manufacture Thereof App 20100320590 - Camacho; Zigmund Ramirez ; et al.	2010-12-23
Integrated Circuit Packaging System With Bumps And Method Of Manufacture Thereof App 20100320589 - Camacho; Zigmund Ramirez ; et al.	2010-12-23
Semiconductor Device and Method of Forming Prefabricated Heat Spreader Frame with Embedded Semiconductor Die App 20100320588 - Dahilig; Frederick R. ; et al.	2010-12-23
Mountable integrated circuit package system with substrate Grant 7,855,444 - Camacho , et al. December 21, 2	2010-12-21
Semiconductor device with optical sensor and method of forming interconnect structure on front and backside of the device Grant 7,851,246 - Camacho , et al. December 14, 2	2010-12-14
Semiconductor Device and Method of Forming Through Hole Vias in Die Extension Region Around Periphery of Die App 20100308467 - Bathan; Henry Descalzo ; et al.	2010-12-09
Semiconductor Device and Method of Forming Through Hole Vias in Die Extension Region Around Periphery of Die App 20100308459 - Bathan; Henry Descalzo ; et al.	2010-12-09
Semiconductor Device and Method of Forming Through Hole Vias in Die Extension Region Around Periphery of Die App 20100311206 - Bathan; Henry Descalzo ; et al.	2010-12-09
Semiconductor device and method of providing a thermal dissipation path through RDL and conductive via Grant 7,842,607 - Tay , et al. November 30, 2	2010-11-30
Semiconductor wafer level interconnect package utilizing conductive ring and pad for separate voltage supplies and method of making the same Grant 7,838,395 - Badakere , et al. November 23, 2	2010-11-23
Integrated Circuit Package System With Leaded Package And Method For Manufacturing Thereof App 20100264525 - Camacho; Zigmund Ramirez ; et al.	2010-10-21
Integrated Circuit Package System With Multiple Device Units And Method For Manufacturing Thereof App 20100244273 - Tay; Lionel Chien Hui ; et al.	2010-09-30
Semiconductor device and method of forming through hole vias in die extension region around periphery of die Grant 7,790,576 - Bathan , et al. September 7, 2	2010-09-07
Mountable integrated circuit package system with exposed external interconnects Grant 7,785,929 - Camacho , et al. August 31, 2	2010-08-31
Integrated circuit package system with leaded package Grant 7,777,354 - Camacho , et al. August 17, 2	2010-08-17
Integrated circuit package system with top and bottom terminals Grant 7,763,493 - Tay , et al. July 27, 2	2010-07-27
Integrated circuit package system with multiple device units Grant 7,759,806 - Tay , et al. July 20, 2	2010-07-20
Multi-chip package system with multiple substrates Grant 7,750,451 - Camacho , et al. July 6, 2	2010-07-06
Integrated Circuit Packaging System With Stacked Paddle And Method Of Manufacture Thereof App 20100140763 - Camacho; Zigmund Ramirez ; et al.	2010-06-10
Integrated Circuit Packaging System With Exposed Terminal Interconnects And Method Of Manufacture Thereof App 20100140789 - Trasporto; Arnel Senosa ; et al.	2010-06-10
Wire-on-lead Package System And Method Of Manufacture Thereof App 20100140764 - Camacho; Zigmund Ramirez ; et al.	2010-06-10
Semiconductor Device and Method of Forming a Conductive Via-in-Via Structure App 20100140751 - Tay; Lionel Chien Hui ; et al.	2010-06-10
Integrated circuit package system with isloated leads Grant 7,732,901 - Camacho , et al. June 8, 2	2010-06-08
Integrated circuit package system with contoured die Grant 7,723,840 - Bathan , et al. May 25, 2	2010-05-25
Integrated Circuit Packaging System With Increased Connectivity And Method Of Manufacture Thereof App 20100123227 - Dahilig; Frederick Rodriguez ; et al.	2010-05-20
Integrated Circuit Packaging System With Plated Pad And Method Of Manufacture Thereof App 20100123229 - Bathan; Henry Descalzo ; et al.	2010-05-20
Integrated Circuit Packaging System Having Bumped Lead And Method Of Manufacture Thereof App 20100123230 - Dahilig; Frederick Rodriguez ; et al.	2010-05-20
Integrated circuit package system with shielding Grant 7,714,419 - Camacho , et al. May 11, 2	2010-05-11
Semiconductor Device and Method of Forming a Wafer Level Package with Bump Interconnection App 20100072618 - Camacho; Zigmund R. ; et al.	2010-03-25
Semiconductor Device and Method of Forming a Wafer Level Package with Top and Bottom Solder Bump Interconnection App 20100072599 - Camacho; Zigmund R. ; et al.	2010-03-25
Semiconductor Package System With Die Support Pad App 20100072589 - Camacho; Zigmund Ramirez ; et al.	2010-03-25
Ball Grid Array Package Stacking System App 20100059873 - Chow; Seng Guan ; et al.	2010-03-11
Integrated Circuit Package System With Redistribution Layer App 20100052131 - Tay; Lionel Chien Hui ; et al.	2010-03-04
Integrated Circuit Package System App 20100038761 - Tay; Lionel Chien Hui ; et al.	2010-02-18
Multi-layer Package-on-package System App 20100025836 - Tay; Lionel Chien Hui ; et al.	2010-02-04
Fan-in Interposer On Lead Frame For An Integrated Circuit Package On Package System App 20100025834 - Camacho; Zigmund Ramirez ; et al.	2010-02-04
A Method For Forming An Etched Recess Package On Package System App 20100025830 - Camacho; Zigmund Ramirez ; et al.	2010-02-04
Integrated Circuit Package System With Concave Terminal App 20100029046 - Camacho; Zigmund Ramirez ; et al.	2010-02-04
Semiconductor Device and Method of Providing a Thermal Dissipation Path Through RDL and Conductive Via App 20100013102 - Tay; Lionel Chien Hui ; et al.	2010-01-21
Integrated Circuit Package System With Chip On Lead App 20100006993 - Trasporto; Arnel Senosa ; et al.	2010-01-14
Mountable Integrated Circuit Package-in-package System App 20090302452 - Camacho; Zigmund Ramirez ; et al.	2009-12-10
Integrated Circuit Packaging System With Isolated Pads And Method Of Manufacture Thereof App 20090302442 - Camacho; Zigmund Ramirez ; et al.	2009-12-10
Semiconductor Package System With Cut Multiple Lead Pads App 20090294935 - Tay; Lionel Chien Hui ; et al.	2009-12-03
Wirebondless Wafer Level Package with Plated Bumps and Interconnects App 20090289356 - Camacho; Zigmund R. ; et al.	2009-11-26
Integrated Circuit Package System With Shield And Tie Bar App 20090289335 - Camacho; Zigmund Ramirez ; et al.	2009-11-26
Integrated Circuit Package System With Non-symmetrical Support Structures App 20090243068 - Kuan; Heap Hoe ; et al.	2009-10-01
Integrated Circuit Package System With Planar Interconnect App 20090243082 - Camacho; Zigmund Ramirez ; et al.	2009-10-01
Mountable Integrated Circuit Package System With Substrate App 20090243067 - Camacho; Zigmund Ramirez ; et al.	2009-10-01
Mountable Integrated Circuit Package System With Exposed External Interconnects App 20090243066 - Camacho; Zigmund Ramirez ; et al.	2009-10-01
Method and Apparatus For a Package Having Multiple Stacked Die App 20090243064 - Camacho; Zigmund R. ; et al.	2009-10-01
Through Hole Vias at Saw Streets Including Protrusions or Recesses for Interconnection App 20090243045 - Pagaila; Reza A. ; et al.	2009-10-01
Integrated Circuit Package System With Redistribution App 20090243069 - Camacho; Zigmund Ramirez ; et al.	2009-10-01
Integrated Circuit Package System With Isolated Leads App 20090236704 - Camacho; Zigmund Ramirez ; et al.	2009-09-24
Ball Grid Array Package System App 20090236733 - Chow; Seng Guan ; et al.	2009-09-24
Integrated Circuit Package System With Integration Port App 20090230517 - Bathan; Henry Descalzo ; et al.	2009-09-17
Optical Semiconductor Device Having Pre-Molded Leadframe with Window and Method Therefor App 20090224386 - Camacho; Zigmund R. ; et al.	2009-09-10
Integrated circuit package system with encapsulation lock Grant 7,582,957 - Tay September 1, 2	2009-09-01
System and Apparatus for Wafer Level Integration of Components App 20090166825 - Camacho; Zigmund R. ; et al.	2009-07-02
Semiconductor Device with Optical Sensor and Method of Forming Interconnect Structure on Front and Backside of the Device App 20090166785 - Camacho; Zigmund R. ; et al.	2009-07-02
Integrated Circuit Package System With Extended Corner Leads App 20090166845 - Camacho; Zigmund Ramirez ; et al.	2009-07-02
Leadframe Design for QFN Package with Top Terminal Leads App 20090166821 - Camacho; Zigmund R. ; et al.	2009-07-02
Integrated Circuit Package With Improved Connections App 20090166885 - Tay; Lionel Chien Hui ; et al.	2009-07-02
Semiconductor Device and Method of Forming Wafer Level Ground Plane and Power Ring App 20090146297 - Badakere; Guruprasad G. ; et al.	2009-06-11
Semiconductor Package and Method of Forming Similar Structure for Top and Bottom Bonding Pads App 20090146282 - Tay; Lionel Chien Hui ; et al.	2009-06-11
Wafer Level Die Integration and Method App 20090140441 - Camacho; Zigmund R. ; et al.	2009-06-04
Semiconductor Device and Method of Forming Through Hole Vias in Die Extension Region Around Periphery of Die App 20090140394 - Bathan; Henry Descalzo ; et al.	2009-06-04
Integrated Circuit Package System With Package Integration App 20090121335 - Camacho; Zigmund Ramirez ; et al.	2009-05-14
Integrated Circuit Package System With Array Of External Interconnects App 20090115040 - Camacho; Zigmund Ramirez ; et al.	2009-05-07
Integrated Circuit Package System With Dual Connectivity App 20090115032 - Camacho; Zigmund Ramirez ; et al.	2009-05-07
Leadframe design for QFN package with top terminal leads Grant 7,517,733 - Camacho , et al. April 14, 2	2009-04-14
Integrated Circuit Packaging System With Base Structure Device App 20090085178 - Ha; Jong-Woo ; et al.	2009-04-02
Integrated Circuit Package System With Leadframe Array App 20090085177 - Pisigan; Jairus Legaspi ; et al.	2009-04-02
Integrated Circuit Package System With Leads Separated From A Die Paddle App 20090072364 - Punzalan; Jeffrey D. ; et al.	2009-03-19
Integrated Circuit Package System With Dual Connectivity App 20090072366 - Badakere Govindaiah; Guruprasad ; et al.	2009-03-19
Integrated Circuit Package System With External Interconnects At High Density App 20090072365 - Tay; Lionel Chien Hui ; et al.	2009-03-19
Integrated Circuit Package System With Multiple Devices App 20090032918 - Camacho; Zigmund Ramirez ; et al.	2009-02-05
Integrated Circuit Package In Package System With Adhesiveless Package Attach App 20090001563 - Bathan; Henry Descalzo ; et al.	2009-01-01
Packaging System With Hollow Package App 20090002961 - Camacho; Zigmund Ramirez ; et al.	2009-01-01
Integrated Circuit Package System With Top And Bottom Terminals App 20090001539 - Tay; Lionel Chien Hui ; et al.	2009-01-01
Integrated Circuit Package System Having Perimeter Paddle App 20080315380 - Tay; Lionel Chien Hui ; et al.	2008-12-25
Integrated Circuit Package System With Different Connection Structures App 20080308933 - Tay; Lionel Chien Hui ; et al.	2008-12-18
Integrated Circuit Package System With Leadfinger App 20080303123 - Camacho; Zigmund Ramirez ; et al.	2008-12-11
Integrated Circuit Package System With Contoured Die App 20080303133 - Bathan; Henry Descalzo ; et al.	2008-12-11
Integrated Circuit Package System With Leaded Package App 20080303122 - Camacho; Zigmund Ramirez ; et al.	2008-12-11
Integrated Circuit Package System With Thin Profile App 20080284002 - Camacho; Zigmund Ramirez ; et al.	2008-11-20
Integrated Circuit Package System With Device Cavity App 20080272479 - Bathan; Henry Descalzo ; et al.	2008-11-06
Integrated Circuit Package System With Interference-fit Feature App 20080273312 - Bathan; Henry Descalzo ; et al.	2008-11-06
Stacked Integrated Circuit Package System With Conductive Spacer App 20080237825 - Tay; Lionel Chien Hui ; et al.	2008-10-02
Leadframe Design for QFN Package with Top Terminal Leads App 20080230876 - CAMACHO; Zigmund R. ; et al.	2008-09-25
Multi-chip Package System With Multiple Substrates App 20080185702 - Camacho; Zigmund Ramirez ; et al.	2008-08-07
Stackable Integrated Circuit Package System With Recess App 20080157321 - Camacho; Zigmund Ramirez ; et al.	2008-07-03
Integrated Circuit Package System With Encapsulation Lock App 20080111218 - Tay; Lionel Chien Hui	2008-05-15