Tan; Jun Pin

Patent Applications and Registrations

Patent applications and USPTO patent grants for Tan; Jun Pin.The latest application filed is for "non-destructive readback and writeback for integrated circuit device".

Company Profile

8.23.16

Tan; Jun Pin - Kuala Lumpur MY
Tan; Jun Pin - Kepong MY
Tan; Jun Pin - Selangor MY
Tan; Jun Pin - Kuala Lampur MY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Configuration or data caching for programmable logic device Grant 11,334,263 - Weber , et al. May 17, 2	2022-05-17
Sector-aligned memory accessible to programmable logic fabric of programmable logic device Grant 11,257,526 - Weber , et al. February 22, 2	2022-02-22
Interface for parallel configuration of programmable devices Grant 11,223,361 - Clark , et al. January 11, 2	2022-01-11
Methods and apparatus for accessing configurable memory during hardware emulation Grant 11,086,788 - Tan August 10, 2	2021-08-10
Non-destructive Readback And Writeback For Integrated Circuit Device App 20210149601 - Ng; Bee Yee ; et al.	2021-05-20
Interface For Parallel Configuration Of Programmable Devices App 20200358444 - Clark; Kevin ; et al.	2020-11-12
Interface for parallel configuration of programmable devices Grant 10,666,265 - Clark , et al.	2020-05-26
Criticality-based error detection Grant 10,528,413 - Tan , et al. J	2020-01-07
High Speed Fpga Boot-up Through Concurrent Multi-frame Configuration Scheme App 20190156873 - Tan; Jun Pin ; et al.	2019-05-23
Interleaving scheme for increasing operating efficiency during high current events on an integrated circuit Grant 10,243,561 - Srinivasan , et al.	2019-03-26
Interleaving Scheme For Increasing Operating Efficiency During High Current Events On An Integrated Circuit App 20190044514 - Srinivasan; Archanna ; et al.	2019-02-07
Sector-Aligned Memory Accessible to Programmable Logic Fabric of Programmable Logic Device App 20190043536 - Weber; Scott J. ; et al.	2019-02-07
Configuration or Data Caching for Programmable Logic Device App 20190042127 - Weber; Scott J. ; et al.	2019-02-07
High speed FPGA boot-up through concurrent multi-frame configuration scheme Grant 10,186,305 - Tan , et al. Ja	2019-01-22
Methods And Apparatus For Accessing Configurable Memory During Hardware Emulation App 20180336935 - Tan; Jun Pin	2018-11-22
Criticality-based Error Detection App 20180285190 - Tan; Jun Pin ; et al.	2018-10-04
Methods And Apparatus For Programmable Integrated Circuit Coprocessor Sector Management App 20180143860 - Dasu; Aravind ; et al.	2018-05-24
Programmable Integrated Circuit With Stacked Memory Die For Storing Configuration Data App 20180143777 - Dasu; Aravind ; et al.	2018-05-24
High Speed Fpga Boot-up Through Concurrent Multi-frame Configuration Scheme App 20170221537 - Tan; Jun Pin ; et al.	2017-08-03
High speed FPGA boot-up through concurrent multi-frame configuration scheme Grant 9,627,019 - Tan , et al. April 18, 2	2017-04-18
High Speed Fpga Boot-up Through Concurrent Multi-frame Configuration Scheme App 20160307612 - Tan; Jun Pin ; et al.	2016-10-20
High speed FPGA boot-up through concurrent multi-frame configuration scheme Grant 9,401,190 - Tan , et al. July 26, 2	2016-07-26
Integrated circuit with state and data retention Grant 9,383,802 - Tan , et al. July 5, 2	2016-07-05
Configuring data registers to program a programmable device with a configuration bit stream without phantom bits Grant 8,941,408 - Tan , et al. January 27, 2	2015-01-27
Configuring Data Registers To Program A Programmable Device With A Configuration Bit Stream Without Phantom Bits App 20140240000 - Tan; Jun Pin ; et al.	2014-08-28
Integrated circuit with improved interconnect routing and associated methods Grant 8,629,689 - Tan , et al. January 14, 2	2014-01-14
Memory error detection circuitry Grant 8,612,814 - Tan , et al. December 17, 2	2013-12-17
Zeroization verification of integrated circuit Grant 8,437,200 - Tan , et al. May 7, 2	2013-05-07
Integrated circuit with configurable test pins Grant 8,327,199 - Dastidar , et al. December 4, 2	2012-12-04
Data encoding scheme to reduce sense current Grant 8,189,362 - Tan , et al. May 29, 2	2012-05-29
Data Encoding Scheme To Reduce Sense Current App 20110292711 - Tan; Jun Pin ; et al.	2011-12-01
Data encoding scheme to reduce sense current Grant 7,978,493 - Tan , et al. July 12, 2	2011-07-12
Dynamic real-time delay characterization and configuration Grant 7,787,314 - Tan , et al. August 31, 2	2010-08-31
Dynamic Real-time Delay Characterization And Configuration App 20100061166 - Tan; Jun Pin ; et al.	2010-03-11
Circuitry for facilitating performance of multiply-accumulate operations in programmable logic devices Grant 7,565,390 - Lui , et al. July 21, 2	2009-07-21

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