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name:-0.033277988433838
name:-0.10517311096191
name:-0.0058929920196533
Su; Chien-Sheng Patent Filings

Su; Chien-Sheng

Patent Applications and Registrations

Patent applications and USPTO patent grants for Su; Chien-Sheng.The latest application filed is for "method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon deposition steps".

Company Profile
8.39.44
  • Su; Chien-Sheng - Saratoga CA
  • Su; Chien-Sheng - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method Of Forming Pairs Of Three-gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps
App 20200411673 - Zhou; Feng ;   et al.
2020-12-31
Non-volatile split gate memory cells with integrated high K metal control gates and method of making same
Grant 10,714,634 - Yang , et al.
2020-07-14
Split-gate flash memory cell with varying insulation gate oxides, and method of forming same
Grant 10,418,451 - Do , et al. Sept
2019-09-17
Non-volatile split game memory cells with integrated high K metal gate logic device and metal-free erase gate, and method of making same
Grant 10,381,359 - Su , et al. A
2019-08-13
Non-volatile Split Gate Memory Cells With Integrated High K Metal Control Gates And Method Of Making Same
App 20190172942 - Yang; Jeng-Wei ;   et al.
2019-06-06
Split-gate flash memory cell with improved scaling using enhanced lateral control gate to floating gate coupling
Grant 10,312,246 - Yang , et al.
2019-06-04
Split gate non-volatile flash memory cell having metal gates
Grant 10,249,631 - Su , et al.
2019-04-02
Method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon deposition steps
Grant 10,217,850 - Zhou , et al. Feb
2019-02-26
Method of forming flash memory with separate wordline and erase gates
Grant 10,141,321 - Chen , et al. Nov
2018-11-27
Split Gate Non-volatile Flash Memory Cell Having Metal Gates
App 20180226420 - SU; CHIEN-SHENG ;   et al.
2018-08-09
Method of integrating FinFET CMOS devices with embedded nonvolatile memory cells
Grant 9,985,042 - Su , et al. May 29, 2
2018-05-29
Split gate non-volatile flash memory cell having metal gates and method of making same
Grant 9,972,630 - Su , et al. May 15, 2
2018-05-15
Method of forming low height split gate memory cells
Grant 9,972,493 - Su , et al. May 15, 2
2018-05-15
Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps
App 20180069104 - Zhou; Feng ;   et al.
2018-03-08
Method Of Forming Low Height Split Gate Memory Cells
App 20180040482 - Su; Chien-Sheng ;   et al.
2018-02-08
Method of making split gate non-volatile memory cell with 3D FinFET structure
Grant 9,887,206 - Su , et al. February 6, 2
2018-02-06
Non-volatile Split Gate Memory Cells With Integrated High K Metal Gate Logic Device And Metal-free Erase Gate, And Method Of Making Same
App 20170373077 - Su; Chien-Sheng ;   et al.
2017-12-28
Method Of Integrating FINFET CMOS Devices With Embedded Nonvolatile Memory Cells
App 20170345840 - Su; Chien-Sheng ;   et al.
2017-11-30
Split gate non-volatile memory cell having a floating gate, word line, erase gate, and method of manufacturing
Grant 9,793,279 - Yang , et al. October 17, 2
2017-10-17
Integration of split gate flash memory array and logic devices
Grant 9,793,280 - Chen , et al. October 17, 2
2017-10-17
Non-volatile split gate memory cells with integrated high K metal gate logic device and metal-free erase gate, and method of making same
Grant 9,793,281 - Su , et al. October 17, 2
2017-10-17
Method of forming self-aligned split-gate memory cell array with metal gates and logic devices
Grant 9,721,958 - Yang , et al. August 1, 2
2017-08-01
Method Of Making Split Gate Non-volatile Memory Cell With 3D FINFET Structure
App 20170179141 - Su; Chien-Sheng ;   et al.
2017-06-22
Method of forming memory array and logic devices
Grant 9,673,208 - Kim , et al. June 6, 2
2017-06-06
Self-aligned source for split-gate non-volatile memory cell
Grant 9,659,946 - Su , et al. May 23, 2
2017-05-23
Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same
App 20170125429 - SU; CHIEN-SHENG ;   et al.
2017-05-04
Method Of Forming Flash Memory With Separate Wordline And Erase Gates
App 20170117285 - Chen; Chun-Ming ;   et al.
2017-04-27
Non-volatile split gate memory cells with integrated high K metal gate, and method of making same
Grant 9,634,019 - Zhou , et al. April 25, 2
2017-04-25
Split gate non-volatile memory cell with 3D finFET structure, and method of making same
Grant 9,634,018 - Su , et al. April 25, 2
2017-04-25
Method of making embedded memory device with silicon-on-insulator substrate
Grant 9,634,020 - Su , et al. April 25, 2
2017-04-25
Method Of Forming Memory Array And Logic Devices
App 20170103991 - KIM; JINHO ;   et al.
2017-04-13
Method Of Making Embedded Memory Device With Silicon-On-Insulator Substrate
App 20170103989 - SU; CHIEN SHENG ;   et al.
2017-04-13
Non-volatile Split Gate Memory Cells With Integrated High K Metal Gate, And Method Of Making Same
App 20170098654 - ZHOU; FENG ;   et al.
2017-04-06
Non-volatile Split Gate Memory Cells With Integrated High K Metal Gate Logic Device And Metal-Free Erase Gate, And Method Of Making Same
App 20170025427 - Su; Chien-Sheng ;   et al.
2017-01-26
Self-Aligned Source For Split-Gate Non-volatile Memory Cell
App 20170025424 - Su; Chien-Sheng ;   et al.
2017-01-26
Split Gate Non-volatile Memory Cell Having A Floating Gate, Word Line, Erase Gate, And Method Of Manufacturing
App 20170012049 - Yang; Jeng-Wei ;   et al.
2017-01-12
Method of forming split-gate memory cell array along with low and high voltage logic devices
Grant 9,496,369 - Wu , et al. November 15, 2
2016-11-15
Formation of self-aligned source for split-gate non-volatile memory cell
Grant 9,484,261 - Su , et al. November 1, 2
2016-11-01
Split Gate Non-volatile Memory Cell With 3D FINFET Structure, And Method Of Making Same
App 20160276357 - Su; Chien-Sheng ;   et al.
2016-09-22
Integration Of Split Gate Flash Memory Array And Logic Devices
App 20160260728 - Chen; Chun-Ming ;   et al.
2016-09-08
Method of making embedded memory device with silicon-on-insulator substrate
Grant 9,431,407 - Su , et al. August 30, 2
2016-08-30
Method Of Forming Split-Gate Memory Cell Array Along With Low And High Voltage Logic Devices
App 20160218195 - Wu; Man-Tang ;   et al.
2016-07-28
Method Of Forming Self-Aligned Split-Gate Memory Cell Array With Metal Gates And Logic Devices
App 20160218110 - YANG; Jeng-Wei ;   et al.
2016-07-28
Split Gate Non-volatile Flash Memory Cell Having Metal Gates And Method Of Making Same
App 20160197088 - Chen; Chun-Ming ;   et al.
2016-07-07
Split gate non-volatile flash memory cell having metal gates and method of making same
Grant 9,379,121 - Chen , et al. June 28, 2
2016-06-28
Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structure
Grant 9,330,922 - Toren , et al. May 3, 2
2016-05-03
Method Of Making Embedded Memory Device With Silicon-On-Insulator Substrate
App 20160086962 - Su; Chien-Sheng ;   et al.
2016-03-24
Double patterning method of forming semiconductor active areas and isolation regions
Grant 9,293,358 - Yang , et al. March 22, 2
2016-03-22
Split gate non-volatile flash memory cell having metal-enhanced gates and method of making same
Grant 9,276,006 - Chen , et al. March 1, 2
2016-03-01
Split-Gate Flash Memory Cell With Improved Scaling Using Enhanced Lateral Control Gate To Floating Gate Coupling
App 20160043095 - Yang; Jeng-Wei ;   et al.
2016-02-11
Method Of Forming Extended Source-Drain MOS Transistors
App 20150270372 - SU; CHIEN-SHENG ;   et al.
2015-09-24
Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making Same
App 20150263040 - Su; Chien-Sheng ;   et al.
2015-09-17
Split gate non-volatile flash memory cell having a silicon-metal floating gate and method of making same
Grant 9,123,822 - Yoo , et al. September 1, 2
2015-09-01
Double Patterning Method Of Forming Semiconductor Active Areas And Isolation Regions
App 20150206788 - Wang; Jeng-Wei ;   et al.
2015-07-23
Non-volatile Memory Cell With Self Aligned Floating And Erase Gates, And Method Of Making Same
App 20150179749 - Chen; Bomy ;   et al.
2015-06-25
Split Gate Non-volatile Flash Memory Cell Having A Silicon-Metal Floating Gate And Method Of Making Same
App 20150035040 - Yoo; Jong-Won ;   et al.
2015-02-05
Formation Of Self-Aligned Source For Split-Gate Non-volatile Memory Cell
App 20150008451 - Su; Chien-Sheng ;   et al.
2015-01-08
Non-volatile memory cell having a high K dielectric and metal gate
Grant 8,883,592 - Kotov , et al. November 11, 2
2014-11-11
Non-volatile Memory Cells With Enhanced Channel Region Effective Width, And Method Of Making Same
App 20140264539 - Do; Nhan ;   et al.
2014-09-18
Method Of Making High-Voltage MOS Transistors With Thin Poly Gate
App 20140273387 - Su; Chien-Sheng ;   et al.
2014-09-18
Method of forming a memory cell by reducing diffusion of dopants under a gate
Grant 8,785,307 - Liu , et al. July 22, 2
2014-07-22
Extended Source-Drain MOS Transistors And Method Of Formation
App 20140084367 - Su; Chien-Sheng ;   et al.
2014-03-27
Method Of Forming A Memory Cell By Reducing Diffusion Of Dopants Under A Gate
App 20140057422 - LIU; XIAN ;   et al.
2014-02-27
Self-Aligned Stack Gate Structure For Use In A Non-volatile Memory Array And A Method Of Forming Such Structure
App 20130234223 - Toren; Willem-Jan ;   et al.
2013-09-12
Non-volatile Memory Cell Having A High K Dielectric And Metal Gate
App 20130032872 - Kotov; Alexander ;   et al.
2013-02-07
Split Gate Non-volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
App 20110127599 - Liu; Xian ;   et al.
2011-06-02
Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturing
Grant 7,927,994 - Liu , et al. April 19, 2
2011-04-19
Split Gate Non-volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
App 20110076816 - Liu; Xian ;   et al.
2011-03-31
Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturing
Grant 7,868,375 - Liu , et al. January 11, 2
2011-01-11
Split Gate Non-Volatile Flash Memory Cell Having a Floating Gate, Control Gate, Select Gate and an Erase Gate with an Overhang Over the Floating Gate, Array and Method of Manufacturing
App 20100054043 - Liu; Xian ;   et al.
2010-03-04
Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of Manufacturing
App 20090039410 - Liu; Xian ;   et al.
2009-02-12
Self aligned method of forming a semiconductor array of non-volatile memory cells
Grant 6,706,592 - Chern , et al. March 16, 2
2004-03-16
Self Aligned Method Of Forming A Semiconductor Array Of Non-volatile Memory Cells
App 20030215999 - Chern, Geeng-Chuan Michael ;   et al.
2003-11-20
Method and apparatus for measuring the threshold voltage of flash EEPROM memory cells being applied a variable control gate bias
Grant 5,966,330 - Tang , et al. October 12, 1
1999-10-12
Method of erasing a flash EEPROM memory
Grant 5,790,460 - Chen , et al. August 4, 1
1998-08-04
Block electrically erasable EEPROM
Grant 4,783,766 - Samachisa , et al. November 8, 1
1988-11-08

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