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name:-0.029394865036011
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Stubbs; Eric T. Patent Filings

Stubbs; Eric T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stubbs; Eric T..The latest application filed is for "per-bit set-up and hold time adjustment for double-data rate synchronous dram".

Company Profile
0.25.22
  • Stubbs; Eric T. - Boise ID
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Actively driven V.sub.REF for input buffer noise immunity
Grant 7,400,544 - Stubbs , et al. July 15, 2
2008-07-15
Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM
Grant 7,274,605 - Stubbs September 25, 2
2007-09-25
Integrated semiconductor memory chip with presence detect data capability
Grant 7,152,143 - Stubbs , et al. December 19, 2
2006-12-19
Per-Bit Set-Up and Hold Time Adjustment for Double-Data Rate Synchronous DRAM
App 20060250862 - Stubbs; Eric T.
2006-11-09
Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM
Grant 7,116,589 - Stubbs October 3, 2
2006-10-03
Variable delay line
Grant 6,959,062 - Stubbs October 25, 2
2005-10-25
Actively driven VREF for input buffer noise immunity
App 20050207227 - Stubbs, Eric T. ;   et al.
2005-09-22
Integrated semiconductor memory chip with presence detect data capability
Grant 6,947,341 - Stubbs , et al. September 20, 2
2005-09-20
Actively driven VREF for input buffer noise immunity
Grant 6,898,144 - Stubbs , et al. May 24, 2
2005-05-24
Integrated semiconductor memory chip with presence detect data capability
App 20050099863 - Stubbs, Eric T. ;   et al.
2005-05-12
Method of preparing to test a capacitor
Grant 6,882,587 - Beigel , et al. April 19, 2
2005-04-19
Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM
App 20050057978 - Stubbs, Eric T.
2005-03-17
System and method for operating a memory array
Grant 6,862,224 - Stubbs March 1, 2
2005-03-01
Per-bit set-up and hold time adjustment for double-data rate synchronous DRAM
Grant 6,838,712 - Stubbs January 4, 2
2005-01-04
Method of preparing to test a capacitor
App 20040240286 - Beigel, Kurt D. ;   et al.
2004-12-02
Method and apparatus for reducing the lock time of a DLL
Grant 6,791,381 - Stubbs , et al. September 14, 2
2004-09-14
Circuit and method for voltage regulation in a semiconductor device
Grant 6,778,452 - Beigel , et al. August 17, 2
2004-08-17
Actively driven VREF for input buffer noise immunity
App 20040120205 - Stubbs, Eric T. ;   et al.
2004-06-24
Circuit and method for voltage regulation in a semiconductor device
App 20040095822 - Beigel, Kurt D. ;   et al.
2004-05-20
Compensation for a delay locked loop
Grant 6,727,739 - Stubbs , et al. April 27, 2
2004-04-27
High speed memory array architecture
App 20040052128 - Stubbs, Eric T.
2004-03-18
Integrated semiconductor memory chip with presence detect data capability
App 20040017723 - Stubbs, Eric T. ;   et al.
2004-01-29
High speed memory architecture
Grant 6,667,911 - Stubbs December 23, 2
2003-12-23
Compensation for a delay locked loop
Grant 6,636,093 - Stubbs , et al. October 21, 2
2003-10-21
Integrated semiconductor memory chip with presence detect data capability
Grant 6,625,692 - Stubbs , et al. September 23, 2
2003-09-23
Method of compensating for a defect within a semiconductor device
Grant 6,600,687 - Beigel , et al. July 29, 2
2003-07-29
Actively driven VREF for input buffer noise immunity
Grant 6,597,619 - Stubbs , et al. July 22, 2
2003-07-22
On-chip testing circuit and method for integrated circuits
Grant 6,581,174 - Stubbs June 17, 2
2003-06-17
Per-bit Set-up And Hold Time Adjustment For Double-data Rate Synchronous Dram
App 20030099135 - Stubbs, Eric T.
2003-05-29
Method for reducing capacitive coupling between conductive lines
Grant 6,570,258 - Ma , et al. May 27, 2
2003-05-27
High speed memory array architecture
App 20030072183 - Stubbs, Eric T.
2003-04-17
Method of compensating for a defect within a semiconductor device
App 20030021171 - Beigel, Kurt D. ;   et al.
2003-01-30
Actively driven V REF for input buffer noise immunity
App 20020093868 - Stubbs, Eric T. ;   et al.
2002-07-18
Compensation for a delay locked loop
App 20020089361 - Stubbs, Eric T. ;   et al.
2002-07-11
Method and apparatus for reducing the lock time of a DLL
App 20020057119 - Stubbs, Eric T. ;   et al.
2002-05-16
Method and apparatus for reducing the lock time of DLL
Grant 6,388,480 - Stubbs , et al. May 14, 2
2002-05-14
On-chip testing circuit and method for integrated circuits
App 20020026606 - Stubbs, Eric T.
2002-02-28
Method of testing a memory array
App 20020018381 - Beigel, Kurt D. ;   et al.
2002-02-14
Margin-range apparatus for a sense amp's voltage-pulling transistor
Grant 6,335,888 - Beigel , et al. January 1, 2
2002-01-01
Method for reducing capacitive coupling between conductive lines
App 20010028112 - Ma, Kin F. ;   et al.
2001-10-11
Margin-range apparatus for a sense amp's voltage-pulling transistor
App 20010009522 - Beigel, Kurt D. ;   et al.
2001-07-26
Method for reducing capactive coupling between conductive lines
Grant 6,259,162 - Ma , et al. July 10, 2
2001-07-10
Method of compensating for a defect within a semiconductor device
App 20010004333 - Beigel, Kurt D. ;   et al.
2001-06-21
Method of stressing a memory device
App 20010002889 - Beigel, Kurt D. ;   et al.
2001-06-07
Method Of Testing A Memory Cell
App 20010002888 - Beigel, Kurt D. ;   et al.
2001-06-07
Method of altering the margin affecting a memory cell
Grant 6,026,040 - Beigel , et al. February 15, 2
2000-02-15
Memory circuit voltage regulator
Grant 5,877,993 - Biegel , et al. March 2, 1
1999-03-02

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