Stark; Donald C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Stark; Donald C..The latest application filed is for "flash memory controller with calibrated data communication".

Company Profile

1.96.74

Stark; Donald C. - Palo Alto CA
Stark; Donald C. - Los Altos CA
Stark; Donald C. - Los Altos Hills CA
Stark; Donald C. - Zushi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Flash memory controller with calibrated data communication Grant 10,310,999 - Zerbe , et al.	2019-06-04
Flash Memory Controller With Calibrated Data Communication App 20180095916 - Zerbe; Jared LeVan ; et al.	2018-04-05
Memory systems with multiple modules supporting simultaneous access responsive to common memory commands Grant 9,824,036 - Perego , et al. November 21, 2	2017-11-21
Memory controller that calibrates a transmit timing offset Grant 9,785,589 - Zerbe , et al. October 10, 2	2017-10-10
Flash Memory Controller With Calibrated Data Communication App 20170031854 - Zerbe; Jared LeVan ; et al.	2017-02-02
Flash memory controller with calibrated data communication Grant 9,405,678 - Zerbe , et al. August 2, 2	2016-08-02
Printed-circuit board supporting memory systems with multiple data-bus configurations Grant 9,257,151 - Perego , et al. February 9, 2	2016-02-09
Flash Memory Controller With Calibrated Data Communication App 20160011973 - Zerbe; Jared LeVan ; et al.	2016-01-14
Memory system with calibrated data communication Grant 9,164,933 - Zerbe , et al. October 20, 2	2015-10-20
Memory Systems with Multiple Modules Supporting Simultaneous Access Responsive to Common Memory Commands App 20150234754 - Perego; Richard E. ; et al.	2015-08-20
Memory System with Calibrated Data Communication App 20150169478 - Zerbe; Jared LeVan ; et al.	2015-06-18
Memory controller with circuitry to set memory device-specific reference voltages Grant 8,948,212 - Zerbe , et al. February 3, 2	2015-02-03
Configurable Width Memory Modules App 20140293671 - Perego; Richard E. ; et al.	2014-10-02
Memory System with Calibrated Data Communication App 20140229667 - Zerbe; Jared LeVan ; et al.	2014-08-14
Memory modules and devices supporting configurable data widths Grant 8,769,234 - Perego , et al. July 1, 2	2014-07-01
Memory system with calibrated data communication Grant 8,630,317 - Zerbe , et al. January 14, 2	2014-01-14
Memory Modules and Devices Supporting Configurable Data Widths App 20130286706 - Perego; Richard E. ; et al.	2013-10-31
Method and apparatus for indicating mask information Grant 8,560,797 - Barth , et al. October 15, 2	2013-10-15
Memory apparatus supporting multiple width configurations Grant 8,412,906 - Perego , et al. April 2, 2	2013-04-02
Microfluidic valve with pressure gain Grant 8,313,712 - Melin , et al. November 20, 2	2012-11-20
Memory device having multiple power modes Grant 8,305,839 - Tsern , et al. November 6, 2	2012-11-06
Method and apparatus for adjusting the performance of a synchronous memory system Grant 8,296,540 - Garlepp , et al. October 23, 2	2012-10-23
Asynchronous pipelined memory access Grant 8,295,107 - Ware , et al. October 23, 2	2012-10-23
Method of controlling a memory device having multiple power modes Grant 8,248,884 - Tsern , et al. August 21, 2	2012-08-21
Memory System with Calibrated Data Communication App 20120204054 - Zerbe; Jared LeVan ; et al.	2012-08-09
Method and Apparatus for Delaying Write Operations App 20120173811 - Barth; Richard M. ; et al.	2012-07-05
Method and Apparatus for Indicating Mask Information App 20120173810 - Barth; Richard M. ; et al.	2012-07-05
Memory controller for controlling write signaling Grant 8,205,056 - Barth , et al. June 19, 2	2012-06-19
Memory Modules and Devices Supporting Configurable Core Organizations App 20120134084 - Perego; Richard E. ; et al.	2012-05-31
Memory Device Having Multiple Power Modes App 20120113738 - Tsern; Ely K. ; et al.	2012-05-10
Memory system with calibrated data communication Grant 8,170,067 - Zerbe , et al. May 1, 2	2012-05-01
Memory Device Having Multiple Power Modes App 20120057424 - Tsern; Ely K. ; et al.	2012-03-08
Asynchronous Pipelined Memory Access App 20120039138 - Ware; Frederick A. ; et al.	2012-02-16
Variable-width memory Grant 8,112,608 - Perego , et al. February 7, 2	2012-02-07
Single-clock, strobeless signaling system Grant 8,102,730 - Stark January 24, 2	2012-01-24
Memory Controller for Controlling Write Signaling App 20120005437 - Barth; Richard M. ; et al.	2012-01-05
Control component for controlling a delay interval within a memory component Grant 8,059,476 - Ware , et al. November 15, 2	2011-11-15
Memory write signaling and methods thereof Grant 8,019,958 - Barth , et al. September 13, 2	2011-09-13
Memory device having multiple power modes Grant 7,986,584 - Tsern , et al. July 26, 2	2011-07-26
Memory Device Having Multiple Power Modes App 20110090755 - Tsern; Ely K. ; et al.	2011-04-21
Control Component For Controlling A Delay Interval Within A Memory Component App 20110055509 - Ware; Frederick A. ; et al.	2011-03-03
Memory Write Signaling and Methods Thereof App 20100332719 - Barth; Richard M. ; et al.	2010-12-30
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 7,830,735 - Ware , et al. November 9, 2	2010-11-09
Microfluidic valve with pressure gain App 20100233037 - Melin; Jessica E. ; et al.	2010-09-16
Interface for a semiconductor memory device and method for controlling the interface Grant 7,793,039 - Barth , et al. September 7, 2	2010-09-07
Variable-width memory App 20100223426 - Perego; Richard E. ; et al.	2010-09-02
Single-clock, Strobeless Signaling System App 20100146321 - STARK; Donald C.	2010-06-10
Memory Device Having a Read Pipeline and a Delay Locked Loop App 20100046314 - Tsern; Ely K. ; et al.	2010-02-25
Single-clock, strobeless signaling system Grant 7,663,966 - Stark February 16, 2	2010-02-16
Memory System with Calibrated Data Communication App 20090327789 - Zerbe; Jared LeVan ; et al.	2009-12-31
Memory device having a read pipeline and a delay locked loop Grant 7,626,880 - Tsern , et al. December 1, 2	2009-12-01
Asynchronous, High-bandwidth Memory Component Using Calibrated Timing Elements App 20090213670 - Ware; Frederick A. ; et al.	2009-08-27
Integrated Circuit Memory Device Having Delayed Write Timing Based on Read Response Time App 20090129178 - Barth; Richard M. ; et al.	2009-05-21
Calibrated data communication system and method Grant 7,535,933 - Zerbe , et al. May 19, 2	2009-05-19
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 7,529,141 - Ware , et al. May 5, 2	2009-05-05
Integrated circuit memory device having delayed write timing based on read response time Grant 7,496,709 - Barth , et al. February 24, 2	2009-02-24
Single-clock, Strobeless Signaling System App 20080267000 - STARK; Donald C.	2008-10-30
Single-clock, strobeless signaling system Grant 7,397,725 - Stark July 8, 2	2008-07-08
Method And Apparatus For Adjusting The Performance Of A Synchronous Memory System App 20080162759 - Garlepp; Bruno Werner ; et al.	2008-07-03
Asynchronous, High-bandwidth Memory Component Using Calibrated Timing Elements App 20080144408 - Ware; Frederick A. ; et al.	2008-06-19
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 7,362,626 - Ware , et al. April 22, 2	2008-04-22
Integrated circuit memory device having delayed write timing based on read response time App 20080091907 - Barth; Richard M. ; et al.	2008-04-17
Integrated circuit memory device having delayed write capability Grant 7,360,050 - Barth , et al. April 15, 2	2008-04-15
Apparatus and method for pipelined memory operations Grant 7,353,357 - Barth , et al. April 1, 2	2008-04-01
Method and apparatus for adjusting the performance of a synchronous memory system Grant 7,337,294 - Garlepp , et al. February 26, 2	2008-02-26
Multiple sweep point testing of circuit devices Grant 7,331,006 - Chang , et al. February 12, 2	2008-02-12
Apparatus and method for pipelined memory operations Grant 7,330,951 - Barth , et al. February 12, 2	2008-02-12
Memory system having delayed write timing Grant 7,330,953 - Barth , et al. February 12, 2	2008-02-12
Integrated circuit memory device having delayed write timing based on read response time Grant 7,330,952 - Barth , et al. February 12, 2	2008-02-12
Power control system for synchronous memory device Grant 7,320,082 - Tsern , et al. January 15, 2	2008-01-15
Memory Device Having a Delay Locked Loop and Multiple Power Modes App 20080002516 - Tsern; Ely K. ; et al.	2008-01-03
Delay locked loop circuitry for clock delay adjustment Grant 7,308,065 - Donnelly , et al. December 11, 2	2007-12-11
Integrated circuit memory device with delayed write command processing Grant 7,287,119 - Barth , et al. October 23, 2	2007-10-23
Integrated Circuit Memory Device Having Delayed Write Timing Based on Read Response Time App 20070242532 - Barth; Richard M. ; et al.	2007-10-18
Memory System Having Delayed Write Timing App 20070198868 - Barth; Richard M. ; et al.	2007-08-23
Integrated Circuit Memory Device with Delayed Write Command Processing App 20070159912 - Barth; Richard M. ; et al.	2007-07-12
Integrated Circuit Memory Device Having Delayed Write Capability App 20070147143 - Barth; Richard M. ; et al.	2007-06-28
Apparatus and Method for Pipelined Memory Operations App 20070140035 - Barth; Richard M. ; et al.	2007-06-21
Method And Apparatus For Adjusting The Performance Of A Synchronous Memory System App 20070083700 - Garlepp; Bruno Werner ; et al.	2007-04-12
Integrated circuit memory device having write latency function Grant 7,197,611 - Barth , et al. March 27, 2	2007-03-27
Method and apparatus for adjusting the performance of a synchronous memory system Grant 7,149,856 - Garlepp , et al. December 12, 2	2006-12-12
Technique for calibrating electronic devices Grant 7,148,699 - Stark December 12, 2	2006-12-12
Delay locked loop circuitry for clock delay adjustment App 20060188051 - Donnelly; Kevin S. ; et al.	2006-08-24
Impedance controlled output driver Grant 7,091,761 - Stark , et al. August 15, 2	2006-08-15
Calibrated data communication system and method App 20060120409 - Zerbe; Jared LeVan ; et al.	2006-06-08
Single-clock, strobeless signaling system App 20060104151 - Stark; Donald C.	2006-05-18
Calibrated data communication system and method Grant 7,042,914 - Zerbe , et al. May 9, 2	2006-05-09
Delay locked loop circuitry for clock delay adjustment Grant 7,039,147 - Donnelly , et al. May 2, 2	2006-05-02
Memory system with channel multiplexing of multiple memory devices Grant 7,039,782 - Garrett, Jr. , et al. May 2, 2	2006-05-02
Apparatus and method for pipelined memory operations App 20060059299 - Barth; Richard M. ; et al.	2006-03-16
Single-clock, strobeless signaling system Grant 6,990,042 - Stark January 24, 2	2006-01-24
System and method for aligning internal transmit and receive clocks Grant 6,987,823 - Stark , et al. January 17, 2	2006-01-17
Single-clock, strobeless signaling system Grant 6,982,922 - Stark January 3, 2	2006-01-03
Multiple sweep point testing of circuit devices Grant 6,975,956 - Chang , et al. December 13, 2	2005-12-13
Multiple sweep point testing of circuit devices App 20050268196 - Chang, Timothy C. ; et al.	2005-12-01
Apparatus and method for pipelined memory operations Grant 6,963,956 - Barth , et al. November 8, 2	2005-11-08
Impedance controlled output driver App 20050237094 - Stark, Donald C. ; et al.	2005-10-27
Asynchronous, high-bandwidth memory component using calibrated timing elements App 20050237851 - Ware, Frederick A. ; et al.	2005-10-27
System and method for aligning internal transmit and receive clocks App 20050220235 - Stark, Donald C. ; et al.	2005-10-06
Integrated circuit with timing adjustment mechanism and method Grant 6,950,956 - Zerbe , et al. September 27, 2	2005-09-27
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 6,934,201 - Ware , et al. August 23, 2	2005-08-23
Memory device having a read pipeline and a delay locked loop App 20050180255 - Tsern, Ely K. ; et al.	2005-08-18
Impedance controlled output driver Grant 6,922,092 - Stark , et al. July 26, 2	2005-07-26
High performance cost optimized memory App 20050160241 - Barth, Richard M. ; et al.	2005-07-21
Memory device supporting a dynamically configurable core organization App 20050157579 - Perego, Richard E. ; et al.	2005-07-21
Single-clock, strobeless signaling system App 20050141335 - Stark, Donald C.	2005-06-30
Memory device supporting a dynamically configurable core organization Grant 6,889,304 - Perego , et al. May 3, 2	2005-05-03
High performance cost optimized memory Grant 6,868,474 - Barth , et al. March 15, 2	2005-03-15
Delay locked loop circuitry for clock delay adjustment App 20040223571 - Donnelly, Kevin S. ; et al.	2004-11-11
Asynchronous, high-bandwidth memory component using calibrated timing elements App 20040213052 - Ware, Frederick A. ; et al.	2004-10-28
Methods for bi-directional signaling Grant 6,801,099 - Stark October 5, 2	2004-10-05
Apparatus and method for pipelined memory operations App 20040193788 - Barth, Richard M. ; et al.	2004-09-30
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 6,788,593 - Ware , et al. September 7, 2	2004-09-07
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 6,788,594 - Ware , et al. September 7, 2	2004-09-07
Method and apparatus for adjusting the performance of a synchronous memory system App 20040168036 - Garlepp, Bruno Werner ; et al.	2004-08-26
Power control system for synchronous memory device App 20040141404 - Tsern, Ely K. ; et al.	2004-07-22
Apparatus and method for maximizing information transfers over limited interconnect resources Grant 6,757,789 - Abhyankar , et al. June 29, 2	2004-06-29
Impedance controlled output driver App 20040119511 - Stark, Donald C. ; et al.	2004-06-24
Integrated circuit with timing adjustment mechanism and method App 20040098634 - Zerbe, Jared LeVan ; et al.	2004-05-20
Methods for bi-directional signaling App 20040085154 - Stark, Donald C.	2004-05-06
Memory system with channel multiplexing of multiple memory devices App 20040081005 - Garrett, Billy Wayne JR. ; et al.	2004-04-29
Calibrated data communication system and method App 20040076192 - Zerbe, Jared LeVan ; et al.	2004-04-22
Apparatus and method for pipelined memory operations Grant 6,718,431 - Barth , et al. April 6, 2	2004-04-06
Multiple sweep point testing of circuit devices App 20040059536 - Chang, Timothy C. ; et al.	2004-03-25
Memory system with channel multiplexing of multiple memory devices Grant 6,708,248 - Garrett, Jr. , et al. March 16, 2	2004-03-16
Power control system for synchronous memory device Grant 6,701,446 - Tsern , et al. March 2, 2	2004-03-02
Memory device supporting a dynamically configurable core organization App 20040019756 - Perego, Richard E. ; et al.	2004-01-29
Single-clock, strobeless signaling system App 20030231537 - Stark, Donald C.	2003-12-18
Charge compensation control circuit and method for use with output driver Grant 6,661,268 - Stark , et al. December 9, 2	2003-12-09
Single-clock, strobeless signaling system Grant 6,646,953 - Stark November 11, 2	2003-11-11
Bus system optimization Grant 6,643,787 - Zerbe , et al. November 4, 2	2003-11-04
Methods and apparatus for bi-directional signaling Grant 6,617,871 - Stark September 9, 2	2003-09-09
Asynchronous, high-bandwidth memory component using calibrated timing elements Grant 6,574,153 - Ware , et al. June 3, 2	2003-06-03
Synchronous memory device having a temperature register Grant 6,553,452 - Garlepp , et al. April 22, 2	2003-04-22
Delay locked loop circuitry for clock delay adjustment Grant 6,539,072 - Donnelly , et al. March 25, 2	2003-03-25
Asynchronous, high-bandwidth memory component using calibrated timing elements App 20030039150 - Ware, Frederick A. ; et al.	2003-02-27
Asynchronous, high-bandwidth memory component using calibrated timing elements App 20030039159 - Ware, Frederick A. ; et al.	2003-02-27
Method and apparatus for adjusting the performance of a synchronous memory system Grant 6,513,103 - Garlepp , et al. January 28, 2	2003-01-28
Methods and apparatus for bi-directional signaling App 20030006796 - Stark, Donald C.	2003-01-09
Apparatus and method for generating a skip signal App 20020194518 - Chang, Kun-Yung Ken ; et al.	2002-12-19
High performance cost optimized memory App 20020178324 - Barth, Richard M. ; et al.	2002-11-28
Asynchronous, High-bandwidth memory component using calibrated timing elements App 20020159303 - Ware, Frederick A. ; et al.	2002-10-31
Apparatus and method for maximizing information transfers over limited interconnect resources App 20020156985 - Abhyankar, Abhijit M. ; et al.	2002-10-24
Apparatus and method for edge based duty cycle conversion Grant 6,448,828 - Stark , et al. September 10, 2	2002-09-10
Apparatus and method for pipelined memory operations App 20020095560 - Barth, Richard M. ; et al.	2002-07-18
Method and apparatus for adjusting the performance of a synchronous memory system App 20020087820 - Garlepp, Bruno Werner ; et al.	2002-07-04
Memory device and system including a low power interface Grant 6,378,018 - Tsern , et al. April 23, 2	2002-04-23
Charge compensation control circuit and method for use with output driver App 20020043997 - Stark, Donald C. ; et al.	2002-04-18
Apparatus and method for pipelined memory operations Grant 6,356,975 - Barth , et al. March 12, 2	2002-03-12
Apparatus and method for edge based duty cycle conversion App 20020017936 - Stark, Donald C. ; et al.	2002-02-14
Apparatus and method for maximizing information transfers over limited interconnect resources Grant 6,347,354 - Abhyankar , et al. February 12, 2	2002-02-12
Power control system for synchronous memory device App 20010047493 - Tsern, Ely K. ; et al.	2001-11-29
Apparatus and method for edge based duty cycle conversion Grant 6,323,706 - Stark , et al. November 27, 2	2001-11-27
Memory and method for sensing sub-groups of memory elements Grant RE37,409 - Barth , et al. October 16, 2	2001-10-16
Power control system for synchronous memory device Grant 6,263,448 - Tsern , et al. July 17, 2	2001-07-17
Apparatus and method for bus timing compensation Grant 6,226,757 - Ware , et al. May 1, 2	2001-05-01
Apparatus and method for device timing compensation Grant 6,226,754 - Ware , et al. May 1, 2	2001-05-01
Impedance controlled output driver Grant 6,163,178 - Stark , et al. December 19, 2	2000-12-19
Apparatus for sharing sense amplifiers between memory banks Grant 6,134,172 - Barth , et al. October 17, 2	2000-10-17
Variable delay element Grant 6,133,773 - Garlepp , et al. October 17, 2	2000-10-17
Delay-locked loop circuitry for clock delay adjustment Grant 6,125,157 - Donnelly , et al. September 26, 2	2000-09-26
Circuit and method for column redundancy for high bandwidth memories Grant 6,122,208 - Stark September 19, 2	2000-09-19
Method and apparatus for sharing sense amplifiers between memory banks Grant 6,075,743 - Barth , et al. June 13, 2	2000-06-13
High performance cost optimized memory with delayed memory writes Grant 6,075,730 - Barth , et al. June 13, 2	2000-06-13
Quadrature phase detector Grant 5,825,209 - Stark , et al. October 20, 1	1998-10-20
Memory and method for sensing sub-groups of memory elements Grant 5,748,554 - Barth , et al. May 5, 1	1998-05-05
Semiconductor memory with bypass circuit Grant 5,479,370 - Furuyama , et al. December 26, 1	1995-12-26