| Patent | Date |
|---|
Fin Field-effect Transistor And Method Of Forming The Same
App 20220293599 - Chiu; Te-Hsin ; et al. | 2022-09-15 |
Power distribution network
Grant 11,444,073 - Sio , et al. September 13, 2 | 2022-09-13 |
Integrated circuit including back side conductive lines for clock signals
Grant 11,437,998 - Sio , et al. September 6, 2 | 2022-09-06 |
Integrated Circuit And Manufacturing Method Of The Same
App 20220254769 - SIO; Kam-Tou ; et al. | 2022-08-11 |
Semiconductor Devices And Methods Of Manufacturing Thereof
App 20220238442 - Sio; Kam-Tou ; et al. | 2022-07-28 |
Integrated Circuit Including Supervia And Method Of Making
App 20220157714 - SIO; Kam-Tou ; et al. | 2022-05-19 |
Integrated Circuit With Mixed Row Heights
App 20220149033 - SIO; Kam-Tou ; et al. | 2022-05-12 |
Semiconductor Structure With Nanosheets
App 20220130822 - CHIU; Te-Hsin ; et al. | 2022-04-28 |
Power Distribution Network
App 20220130817 - SIO; Kam-Tou ; et al. | 2022-04-28 |
Integrated Circuit, System And Method Of Forming Same
App 20220115324 - CHIU; Te-Hsin ; et al. | 2022-04-14 |
Semiconductor Device Including a Layer Between a Source/Drain Region and a Substrate
App 20220108991 - Sio; Kam-Tou ; et al. | 2022-04-07 |
Method Of Making Semiconductor Device Which Includes Fins
App 20220108990 - CHEN; Chih-Liang ; et al. | 2022-04-07 |
Integrated circuit with mixed row heights
Grant 11,282,829 - Sio , et al. March 22, 2 | 2022-03-22 |
Integrated circuit including supervia and method of making
Grant 11,270,936 - Sio , et al. March 8, 2 | 2022-03-08 |
Semiconductor Device And Manufacturing Method Thereof
App 20220068791 - CHIU; Te-Hsin ; et al. | 2022-03-03 |
Semiconductor Devices With Backside Power Distribution Network And Frontside Through Silicon Via
App 20220045011 - Sio; Kam-Tou ; et al. | 2022-02-10 |
Partial buried insulator nano-sheet device
Grant 11,239,244 - Sio , et al. February 1, 2 | 2022-02-01 |
Semiconductor device which includes fins and method of making same
Grant 11,222,899 - Chen , et al. January 11, 2 | 2022-01-11 |
Pin access hybrid cell height design
Grant 11,222,157 - Sio , et al. January 11, 2 | 2022-01-11 |
Integrated Circuit Structure And Method Of Forming The Same
App 20210391328 - SIO; Kam-Tou ; et al. | 2021-12-16 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method
App 20210384351 - CHEN; CHIH-LIANG ; et al. | 2021-12-09 |
Via Rail Solution For High Power Electromigration
App 20210366844 - Sio; Kam-Tou ; et al. | 2021-11-25 |
Hybrid Sheet Layout, Method, System, And Structure
App 20210357565 - FANG; Shang-Wei ; et al. | 2021-11-18 |
Gate Structure For Semiconductor Devices
App 20210351174 - Sio; Kam-Tou ; et al. | 2021-11-11 |
Integrated Circuit Including Back Side Conductive Lines For Clock Signals
App 20210344346 - SIO; Kam-Tou ; et al. | 2021-11-04 |
Semiconductor devices with backside power distribution network and frontside through silicon via
Grant 11,158,580 - Sio , et al. October 26, 2 | 2021-10-26 |
Integrated circuit with mixed row heights
Grant 11,152,348 - Sio , et al. October 19, 2 | 2021-10-19 |
Pin Access Hybrid Cell Height Design
App 20210286927 - SIO; Kam-Tou ; et al. | 2021-09-16 |
Semiconductor device integrating backside power grid and related integrated circuit and fabrication method
Grant 11,121,256 - Chen , et al. September 14, 2 | 2021-09-14 |
Cell Structures And Power Routing For Integrated Circuits
App 20210272605 - PENG; Shih-Wei ; et al. | 2021-09-02 |
Via rail solution for high power electromigration
Grant 11,088,092 - Sio , et al. August 10, 2 | 2021-08-10 |
Method And System Of Manufacturing Conductors And Semiconductor Device Which Includes Conductors
App 20210225831 - SIO; Kam-Tou ; et al. | 2021-07-22 |
Via rail solution for high power electromigration
Grant 11,063,005 - Sio , et al. July 13, 2 | 2021-07-13 |
Integrated Circuit Device With High Mobility And System Of Forming The Integrated Circuit
App 20210210488 - SIO; KAM-TOU ; et al. | 2021-07-08 |
Dummy MOL removal for performance enhancement
Grant 11,043,426 - Yang , et al. June 22, 2 | 2021-06-22 |
High-Density Semiconductor Device
App 20210166947 - Chou; Lei-Chun ; et al. | 2021-06-03 |
Dual power structure with connection pins
Grant 11,024,579 - Peng , et al. June 1, 2 | 2021-06-01 |
Finfet Switch
App 20210159120 - Sio; Kam-Tou ; et al. | 2021-05-27 |
Integrated Circuit Structure And Method For Manufacturing The Same
App 20210143150 - CHANG; WEI-LING ; et al. | 2021-05-13 |
Middle-end-of-line Strap For Standard Cell
App 20210118793 - SHEN; Meng-Hung ; et al. | 2021-04-22 |
Semiconductor Devices With Backside Power Distribution Network And Frontside Through Silicon Via
App 20210118805 - SIO; Kam-Tou ; et al. | 2021-04-22 |
Integrated Circuit Structure And Method Of Forming The Same
App 20210118868 - SIO; Kam-Tou ; et al. | 2021-04-22 |
System for and method of manufacturing an integrated circuit
Grant 10,977,421 - Lin , et al. April 13, 2 | 2021-04-13 |
Method and system of manufacturing conductors and semiconductor device which includes conductors
Grant 10,978,439 - Sio , et al. April 13, 2 | 2021-04-13 |
Integrated circuit device with high mobility and system of forming the integrated circuit
Grant 10,971,493 - Sio , et al. April 6, 2 | 2021-04-06 |
Semiconductor Device Including Source/drain Contact Having Height Below Gate Stack
App 20210082903 - YOUNG; Charles Chew-Yuen ; et al. | 2021-03-18 |
High-density semiconductor device
Grant 10,950,456 - Chou , et al. March 16, 2 | 2021-03-16 |
Advanced Metal Connection With Metal Cut
App 20210066182 - Chen; Chih-Liang ; et al. | 2021-03-04 |
FinFET switch
Grant 10,937,695 - Sio , et al. March 2, 2 | 2021-03-02 |
Metal Rail Conductors For Non-planar Semiconductor Devices
App 20210028311 - Chen; Chih-Liang ; et al. | 2021-01-28 |
Partial Buried Insulator Nano-Sheet Device
App 20200411531 - Sio; Kam-Tou ; et al. | 2020-12-31 |
Middle-end-of-line strap for standard cell
Grant 10,879,173 - Shen , et al. December 29, 2 | 2020-12-29 |
Self aligned via and method for fabricating the same
Grant 10,879,120 - Chen , et al. December 29, 2 | 2020-12-29 |
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,879,229 - Sio , et al. December 29, 2 | 2020-12-29 |
System and method for calculating cell edge leakage
Grant 10,867,115 - Peng , et al. December 15, 2 | 2020-12-15 |
Power strap structure for high performance and low current density
Grant 10,861,790 - Chen , et al. December 8, 2 | 2020-12-08 |
Pin Access Hydrid Cell Height Design
App 20200380193 - SIO; Kam-Tou ; et al. | 2020-12-03 |
Advanced metal connection with metal cut
Grant 10,847,460 - Chen , et al. November 24, 2 | 2020-11-24 |
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20200357793 - SIO; Kam-Tou ; et al. | 2020-11-12 |
Integrated Circuit With Mixed Row Heights
App 20200357786 - SIO; Kam-Tou ; et al. | 2020-11-12 |
Semiconductor device including source/drain contact having height below gate stack
Grant 10,833,061 - Young , et al. November 10, 2 | 2020-11-10 |
Semiconductor Device Which Includes Fins And Method Of Making Same
App 20200335507 - CHEN; Chih-Liang ; et al. | 2020-10-22 |
Metal rail conductors for non-planar semiconductor devices
Grant 10,804,402 - Chen , et al. October 13, 2 | 2020-10-13 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method
App 20200303551 - CHEN; CHIH-LIANG ; et al. | 2020-09-24 |
Dummy MOL removal for performance enhancement
Grant 10,784,168 - Yang , et al. Sept | 2020-09-22 |
Pin access hybrid cell height design
Grant 10,769,342 - Sio , et al. Sep | 2020-09-08 |
Integrated circuit, system for and method of forming an integrated circuit
Grant 10,734,377 - Sio , et al. | 2020-08-04 |
Semiconductor device which includes Fins
Grant 10,714,485 - Chen , et al. | 2020-07-14 |
Semiconductor device integrating backside power grid and related integrated circuit and fabrication method
Grant 10,700,207 - Chen , et al. | 2020-06-30 |
System For And Method Of Manufacturing An Integrated Circuit
App 20200184139 - LIN; Wei-Cheng ; et al. | 2020-06-11 |
Pin Access Hydrid Cell Height Design
App 20200134119 - SIO; Kam-Tou ; et al. | 2020-04-30 |
Integrated Circuit Including Supervia And Method Of Making
App 20200135640 - SIO; Kam-Tou ; et al. | 2020-04-30 |
Finfet Switch
App 20200118875 - Sio; Kam-Tou ; et al. | 2020-04-16 |
Contact Structure, Method, Layout, And System
App 20200105660 - SIO; Kam-Tou ; et al. | 2020-04-02 |
Via Rail Solution For High Power Electromigration
App 20200083182 - Sio; Kam-Tou ; et al. | 2020-03-12 |
System for and method of fabricating an integrated circuit
Grant 10,565,348 - Lin , et al. Feb | 2020-02-18 |
High-Density Semiconductor Device
App 20200043741 - Chou; Lei-Chun ; et al. | 2020-02-06 |
Advanced Metal Connection With Metal Cut
App 20200020625 - Chen; Chih-Liang ; et al. | 2020-01-16 |
System and Method for Calculating Cell Edge Leakage
App 20200019673 - Peng; Shih-Wei ; et al. | 2020-01-16 |
Dummy Mol Removal For Performance Enhancement
App 20200020588 - Yang; Hui-Ting ; et al. | 2020-01-16 |
Structure and formation method of semiconductor device structure
Grant 10,516,047 - Sio , et al. Dec | 2019-12-24 |
Via rail solution for high power electromigration
Grant 10,510,688 - Sio , et al. Dec | 2019-12-17 |
FinFET switch
Grant 10,510,599 - Sio , et al. Dec | 2019-12-17 |
Method And System Of Manufacturing Conductors And Semiconductor Device Which Includes Conductors
App 20190371784 - SIO; Kam-Tou ; et al. | 2019-12-05 |
Advanced metal connection with metal cut
Grant 10,468,349 - Chen , et al. No | 2019-11-05 |
System and method for calculating cell edge leakage
Grant 10,467,374 - Peng , et al. No | 2019-11-05 |
System For And Method Of Fabricating An Integrated Circuit
App 20190325109 - LIN; Wei-Cheng ; et al. | 2019-10-24 |
High-density semiconductor device
Grant 10,446,406 - Chou , et al. Oc | 2019-10-15 |
Method of manufacturing conductors and semiconductor device which includes conductors
Grant 10,388,644 - Sio , et al. A | 2019-08-20 |
Dual Power Structure With Connection Pins
App 20190244901 - Peng; Shih-Wei ; et al. | 2019-08-08 |
System for and method of manufacturing a layout design of an integrated circuit
Grant 10,366,200 - Lin , et al. July 30, 2 | 2019-07-30 |
Metal Rail Conductors For Non-planar Semiconductor Devices
App 20190165178 - CHEN; Chih-Liang ; et al. | 2019-05-30 |
Semiconductor Device Integrating Backside Power Grid And Related Integrated Circuit And Fabrication Method
App 20190164882 - CHEN; CHIH-LIANG ; et al. | 2019-05-30 |
Middle-end-of-line Strap For Standard Cell
App 20190164883 - SHEN; Meng-Hung ; et al. | 2019-05-30 |
Integrated Circuit With Mixed Row Heights
App 20190164949 - SIO; Kam-Tou ; et al. | 2019-05-30 |
Integrated Circuit Device With High Mobility And System Of Forming The Integrated Circuit
App 20190164962 - SIO; KAM-TOU ; et al. | 2019-05-30 |
Dual power structure with connection pins
Grant 10,276,499 - Peng , et al. | 2019-04-30 |
Semiconductor Device Including Source/drain Contact Having Height Below Gate Stack
App 20190123036 - YOUNG; Charles Chew-Yuen ; et al. | 2019-04-25 |
Power Strap Structure For High Performance And Low Current Density
App 20190122987 - Chen; Chih-Liang ; et al. | 2019-04-25 |
Advanced Metal Connection With Metal Cut
App 20190051595 - Chen; Chih-Liang ; et al. | 2019-02-14 |
Middle end-of-line strap for standard cell
Grant 10,204,857 - Shen , et al. Feb | 2019-02-12 |
Dummy Mol Removal For Performance Enhancement
App 20190043759 - Yang; Hui-Ting ; et al. | 2019-02-07 |
Semiconductor Device Which Includes Fins
App 20190019797 - CHEN; Chih-Liang ; et al. | 2019-01-17 |
Semiconductor device including source/drain contact having height below gate stack
Grant 10,177,133 - Young , et al. J | 2019-01-08 |
System and Method for Calculating Cell Edge Leakage
App 20190005181 - Peng; Shih-Wei ; et al. | 2019-01-03 |
Layout modification method and system
Grant 10,169,515 - Sio , et al. J | 2019-01-01 |
Power strap structure for high performance and low current density
Grant 10,170,422 - Chen , et al. J | 2019-01-01 |
Method of adjusting metal line pitch
Grant 10,162,930 - Lin , et al. Dec | 2018-12-25 |
Interconnect metal layout for integrated circuit
Grant 10,157,922 - Lin , et al. Dec | 2018-12-18 |
Via Rail Solution For High Power Electromigration
App 20180358309 - Sio; Kam-Tou ; et al. | 2018-12-13 |
Advanced metal connection with metal cut
Grant 10,109,582 - Chen , et al. October 23, 2 | 2018-10-23 |
Dummy MOL removal for performance enhancement
Grant 10,096,522 - Yang , et al. October 9, 2 | 2018-10-09 |
Method of manufacturing fins and semiconductor device which includes fins
Grant 10,074,657 - Chen , et al. September 11, 2 | 2018-09-11 |
High-density semiconductor device
Grant 10,032,759 - Chen , et al. July 24, 2 | 2018-07-24 |
Power Strap Structure For High Performance And Low Current Density
App 20180174967 - Chen; Chih-Liang ; et al. | 2018-06-21 |
High-Density Semiconductor Device
App 20180151381 - Chou; Lei-Chun ; et al. | 2018-05-31 |
Interconnect Metal Layout For Integrated Circuit
App 20180151567 - LIN; Wei-Cheng ; et al. | 2018-05-31 |
High-Density Semiconductor Device
App 20180151551 - Chen; Chih-Liang ; et al. | 2018-05-31 |
Integrated Circuit, System For And Method Of Forming An Integrated Circuit
App 20180151559 - SIO; Kam-Tou ; et al. | 2018-05-31 |
Method Of Manufacturing Conductors And Semiconductor Device Which Includes Conductors
App 20180151552 - SIO; Kam-Tou ; et al. | 2018-05-31 |
Self Aligned Via and Method for Fabricating the Same
App 20180151432 - Chen; Chih-Liang ; et al. | 2018-05-31 |
Structure And Formation Method Of Semiconductor Device Structure
App 20180151729 - SIO; Kam-Tou ; et al. | 2018-05-31 |
Middle-end-of-line Strap For Standard Cell
App 20180096930 - SHEN; Meng-Hung ; et al. | 2018-04-05 |
Semiconductor device including source/drain contact having height below gate stack
Grant 9,917,050 - Chen , et al. March 13, 2 | 2018-03-13 |
System For And Method Of Manufacturing A Layout Design Of An Integrated Circuit
App 20180068050 - LIN; Wei-Cheng ; et al. | 2018-03-08 |
Power strap structure for high performance and low current density
Grant 9,911,697 - Chen , et al. March 6, 2 | 2018-03-06 |
Method Of Adjusting Metal Line Pitch
App 20180039723 - LIN; WEI-CHENG ; et al. | 2018-02-08 |
Dual Power Structure With Connection Pins
App 20180019207 - Peng; Shih-Wei ; et al. | 2018-01-18 |
Middle end-of-line strap for standard cell
Grant 9,837,353 - Shen , et al. December 5, 2 | 2017-12-05 |
Dummy Mol Removal For Performance Enhancement
App 20170323832 - Yang; Hui-Ting ; et al. | 2017-11-09 |
Power Strap Structure For High Performance And Low Current Density
App 20170317027 - Chen; Chih-Liang ; et al. | 2017-11-02 |
Method Of Manufacturing Fins And Semiconductor Device Which Includes Fins
App 20170317089 - CHEN; Chih-Liang ; et al. | 2017-11-02 |
Advanced Metal Connection With Metal Cut
App 20170301618 - Chen; Chih-Liang ; et al. | 2017-10-19 |
Finfet Switch
App 20170301586 - Sio; Kam-Tou ; et al. | 2017-10-19 |
Dual power structure with connection pins
Grant 9,793,211 - Peng , et al. October 17, 2 | 2017-10-17 |
Middle-end-of-line Strap For Standard Cell
App 20170256484 - SHEN; Meng-Hung ; et al. | 2017-09-07 |
Designed-based interconnect structure in semiconductor structure
Grant 9,754,881 - Chen , et al. September 5, 2 | 2017-09-05 |
High fin cut fabrication process
Grant 9,679,994 - Chou , et al. June 13, 2 | 2017-06-13 |
Layout Modification Method And System
App 20170140086 - SIO; KAM-TOU ; et al. | 2017-05-18 |
Via Rail Solution for High Power Electromigration
App 20170117272 - Sio; Kam-Tou ; et al. | 2017-04-27 |
Dual Power Structure with Connection Pins
App 20170110405 - Peng; Shih-Wei ; et al. | 2017-04-20 |
Structure And Method For Semiconductor Device
App 20170040259 - Chen; Chih-Liang ; et al. | 2017-02-09 |
Method of forming semiconductor device including source/drain contact having height below gate stack
Grant 9,478,636 - Chen , et al. October 25, 2 | 2016-10-25 |
Structure And Method For Semiconductor Device
App 20160268244 - YOUNG; Charles Chew-Yuen ; et al. | 2016-09-15 |
Designed-based Interconnect Structure In Semiconductor Structure
App 20160172297 - CHEN; Chih-Liang ; et al. | 2016-06-16 |
Designed-based interconnect structure in semiconductor structure
Grant 9,281,273 - Chen , et al. March 8, 2 | 2016-03-08 |
Designed-based Interconnect Structure In Semiconductor Structure
App 20160064322 - CHEN; Chih-Liang ; et al. | 2016-03-03 |
Semiconductor Arrangement And Formation Thereof
App 20150349071 - Chen; Chih-Liang ; et al. | 2015-12-03 |
Structure and Method for Semiconductor Device
App 20150332962 - Chen; Chih-Liang ; et al. | 2015-11-19 |
Semiconductor arrangement and formation thereof
Grant 9,184,250 - Chen , et al. November 10, 2 | 2015-11-10 |
Integrated circuit layout having mixed track standard cell
Grant 8,698,205 - Tzeng , et al. April 15, 2 | 2014-04-15 |
Integrated Circuit Layout Having Mixed Track Standard Cell
App 20130313615 - TZENG; Jiann-Tyng ; et al. | 2013-11-28 |
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