loadpatents
name:-0.022224187850952
name:-0.011384963989258
name:-0.00056004524230957
Sim; Sung-min Patent Filings

Sim; Sung-min

Patent Applications and Registrations

Patent applications and USPTO patent grants for Sim; Sung-min.The latest application filed is for "apparatus for testing objects under controlled conditions".

Company Profile
0.11.18
  • Sim; Sung-min - Seongnam-si KR
  • Sim; Sung-Min - Gyeonggi-do KR
  • SIM; Sung Min - Kyungi-do KR
  • Sim; Sung Min - Suwon KR
  • Sim; Sung Min - Suwon-city KR
  • Sim; Sung Min - Kyungki-do KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method of forming metal lines and bumps for semiconductor devices
Grant 7,855,144 - Kim , et al. December 21, 2
2010-12-21
Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package
Grant 7,825,495 - Ryu , et al. November 2, 2
2010-11-02
Interconnection structure of integrated circuit chip
Grant 7,732,319 - Jeong , et al. June 8, 2
2010-06-08
Apparatus for testing objects under controlled conditions
App 20090153171 - Lee; Sang-Sik ;   et al.
2009-06-18
Fabrication method of wafer level chip scale packages
Grant 7,524,763 - Kim , et al. April 28, 2
2009-04-28
Semiconductor Packages And Methods Of Fabricating The Same
App 20090020878 - RYU; Seung-Kwan ;   et al.
2009-01-22
Semiconductor Device And Method Of Manufacturing The Same
App 20080185738 - CHUNG; Jae Sik ;   et al.
2008-08-07
Semiconductor chip structure, method of manufacturing the semiconductor chip structure, semiconductor chip package, and method of manufacturing the semiconductor chip package
App 20080174025 - Ryu; Seung-Kwan ;   et al.
2008-07-24
Method of forming metal lines and bumps for semiconductor devices
App 20080076248 - Kim; Soon-bum ;   et al.
2008-03-27
Interconnection Structure Of Integrated Circuit Chip
App 20080036081 - JEONG; Se-Young ;   et al.
2008-02-14
Wafer level chip scale package having a gap and method for manufacturing the same
Grant 7,312,143 - Park , et al. December 25, 2
2007-12-25
Interconnection structure of integrated circuit chip
Grant 7,307,342 - Jeong , et al. December 11, 2
2007-12-11
Chip stack package
App 20070200216 - Kim; Soon-Bum ;   et al.
2007-08-30
Wafer level chip scale package having a gap and method for manufacturing the same
App 20070176290 - Park; Myeong-Soon ;   et al.
2007-08-02
Wafer Level Chip Scale Package Having Rerouting Layer And Method Of Manufacturing The Same
App 20070164431 - LEE; In Young ;   et al.
2007-07-19
Wafer level chip scale package having a gap and method for manufacturing the same
Grant 7,205,660 - Park , et al. April 17, 2
2007-04-17
Wiring structure of a semiconductor package and method of manufacturing the same, and wafer level package having the wiring structure and method of manufacturing the same
App 20070069320 - Lee; In-Young ;   et al.
2007-03-29
Method for manufacturing wafer level chip stack package
Grant 7,151,009 - Kim , et al. December 19, 2
2006-12-19
Wafer level chip scale package having a gap and method for manufacturing the same
App 20060214293 - Park; Myeong-Soon ;   et al.
2006-09-28
Integrated circuit chip having pass-through vias therein that extend between multiple integrated circuits on the chip
App 20060118972 - Baek; Seung-Duk ;   et al.
2006-06-08
Method of forming bump that may reduce possibility of losing contact pad material
App 20060073704 - Jeong; Se-young ;   et al.
2006-04-06
Interconnection structure of integrated circuit chip
App 20060060970 - Jeong; Se-Young ;   et al.
2006-03-23
Electrode structure of a semiconductor device and method of manufacturing the same
App 20060038291 - Chung; Hyun-soo ;   et al.
2006-02-23
Methods of fabricating integrated circuit chips for multi-chip packaging and wafers and chips formed thereby
App 20060019467 - Lee; In-Young ;   et al.
2006-01-26
Method for manufacturing wafer level chip stack package
App 20050280160 - Kim, Soon-Bum ;   et al.
2005-12-22
Fabrication method of wafer level chip scale packages
App 20050277293 - Kim, Soon-Bum ;   et al.
2005-12-15
Lead-on-chip semiconductor package and method for making the same
Grant 5,933,708 - Sim , et al. August 3, 1
1999-08-03
Method of producing a semiconductor wafer using ultraviolet sensitive tape
Grant 5,840,614 - Sim , et al. November 24, 1
1998-11-24
Method of manufacturing semiconductor chip package
Grant 5,753,532 - Sim May 19, 1
1998-05-19

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