loadpatents
name:-0.014657020568848
name:-0.0074989795684814
name:-0.00050497055053711
Shimoda; Maki Patent Filings

Shimoda; Maki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Shimoda; Maki.The latest application filed is for "biomolecule detecting apparatus and biomolecule detecting method employing the same".

Company Profile
0.7.8
  • Shimoda; Maki - Hino N/A JP
  • Shimoda; Maki - Hachiouji JP
  • Shimoda, Maki - Hachouji JP
  • SHIMODA, MAKI - TOKYO JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatus and method for measuring biological material
Grant 8,383,396 - Kamahori , et al. February 26, 2
2013-02-26
Semiconductor integrated circuit device and a method of manufacturing the same
Grant 7,397,104 - Suzuki , et al. July 8, 2
2008-07-08
Biomolecule detecting apparatus and biomolecule detecting method employing the same
App 20060223170 - Kamahori; Masao ;   et al.
2006-10-05
Apparatus and method for measuring biological material
App 20060016699 - Kamahori; Masao ;   et al.
2006-01-26
Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductor substrate
App 20040214428 - Furukawa, Ryouichi ;   et al.
2004-10-28
Semiconductor integrated circuit device and a method of manufacturing the same
App 20040159883 - Suzuki, Norio ;   et al.
2004-08-19
Method of forming a data-storing capacitive element made in an insulating film on a semiconductor substrate
Grant 6,770,528 - Furukawa , et al. August 3, 2
2004-08-03
Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
Grant 6,720,234 - Suzuki , et al. April 13, 2
2004-04-13
Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
App 20030148587 - Suzuki, Norio ;   et al.
2003-08-07
Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductor substrate
App 20030148600 - Furukawa, Ryouichi ;   et al.
2003-08-07
Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
Grant 6,562,695 - Suzuki , et al. May 13, 2
2003-05-13
Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductor substrate
App 20020098678 - Furukawa, Ryouichi ;   et al.
2002-07-25
Systems And Methods For Two-sided Etch Of A Semiconductor Substrate
App 20010009177 - LUO, LAIZHONG ;   et al.
2001-07-26
Removal method of organic matter and system for the same
Grant 5,747,387 - Koizumi , et al. May 5, 1
1998-05-05

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