Schnabel; Joachim

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schnabel; Joachim.The latest application filed is for "circuit arrangement and method for operating an analog-to-digital converter".

Company Profile

0.15.18

Schnabel; Joachim - Villach AT
Schnabel; Joachim - Munich DE
Schnabel; Joachim - Munchen DE
Schnabel; Joachim - Berlin DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Circuit arrangement and method for operating an analog-to-digital converter Grant 8,872,689 - Mayer , et al. October 28, 2	2014-10-28
Circuit Arrangement And Method For Operating An Analog-to-digital Converter App 20140266841 - Mayer; Alexander ; et al.	2014-09-18
Differental current source for generating DRAM refresh signal Grant 7,180,805 - Schnabel , et al. February 20, 2	2007-02-20
Method and regulating circuit for refreshing dynamic memory cells Grant 7,136,320 - Schnabel , et al. November 14, 2	2006-11-14
Circuit device with clock pulse detection facility Grant 7,068,079 - Schaefer , et al. June 27, 2	2006-06-27
Arrangement of several resistors jointly positioned in a well of a semiconductor device, and a semiconductor device including at least one such arrangement Grant 7,049,930 - Schnabel , et al. May 23, 2	2006-05-23
Method of increasing an internal operating voltage for an integrated circuit, and integrated circuit Grant 6,870,420 - Hausmann , et al. March 22, 2	2005-03-22
Temperature-dependent refresh cycle for DRAM Grant 6,850,448 - Schnabel , et al. February 1, 2	2005-02-01
Scalable driver device and related integrated circuit Grant 6,850,099 - Klehn , et al. February 1, 2	2005-02-01
Signal generator for charge pump in an integrated circuit Grant 6,833,745 - Hausmann , et al. December 21, 2	2004-12-21
Limiter for refresh signal period in DRAM Grant 6,809,980 - Schnabel , et al. October 26, 2	2004-10-26
Method and regulating circuit for refreshing dynamic memory cells App 20040208074 - Schnabel, Joachim ; et al.	2004-10-21
Arrangement of several resistors jointly positioned in a well of a semiconductor device, and a semiconductor device including at least one such arrangement App 20040130433 - Schnabel, Joachim ; et al.	2004-07-08
Circuit device with clock pulse detection facility App 20040124887 - Schaefer, Andre ; et al.	2004-07-01
Control signal generating device for driving a plurality of circuit units Grant 6,737,895 - Schnabel , et al. May 18, 2	2004-05-18
Drive circuit and control method Grant 6,721,214 - Hausmann , et al. April 13, 2	2004-04-13
Signal generator for charge pump in an integrated circuit App 20040051579 - Hausmann, Michael ; et al.	2004-03-18
Programmable voltage pump having a ground option Grant 6,700,426 - Brox , et al. March 2, 2	2004-03-02
Logic signal level converter circuit and memory data output buffer using the same Grant 6,690,605 - Schafer , et al. February 10, 2	2004-02-10
Limiter for refresh signal period in dram App 20040022103 - Schnabel, Joachim ; et al.	2004-02-05
Differental current source for generating dram refresh signal App 20040004867 - Schnabel, Joachim ; et al.	2004-01-08
Method of increasing an internal operating voltage for an integrated circuit, and integrated circuit App 20030230758 - Hausmann, Michael ; et al.	2003-12-18
Temperature-dependent refresh cycle for dram App 20030214858 - Schnabel, Joachim ; et al.	2003-11-20
Drive circuit and control method App 20030198108 - Hausmann, Michael ; et al.	2003-10-23
Circuit configuration for converting logic signal levels App 20030189477 - Schafer, Andre ; et al.	2003-10-09
Programmable voltage pump having a ground option App 20030128066 - Brox, Martin ; et al.	2003-07-10
Scalable driver device and related integrated circuit App 20030062932 - Klehn, Bernd ; et al.	2003-04-03
Activating a control signal App 20030030470 - Schnabel, Joachim ; et al.	2003-02-13
Circuit configuration for switching over a receiver circuit in particular in DRAM memories and DRAM memory having the circuit configuration Grant 6,456,553 - Brass , et al. September 24, 2	2002-09-24
Integrated memory having a voltage regulating circuit App 20020060937 - Fischer, Helmut ; et al.	2002-05-23
Circuit configuration for switching over a receiver circuit in particular in DRAM memories and DRAM memory having the circuit configuration App 20020053944 - Brass, Eckhard ; et al.	2002-05-09
Circuit configuration for deactivating word lines in a memory matrix App 20020027827 - Fischer, Helmut ; et al.	2002-03-07
Method for testing a multiplicity of word lines of a semiconductor memory configuration App 20010048621 - Brass, Eckhard ; et al.	2001-12-06

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