Schanely; Paul M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Schanely; Paul M..The latest application filed is for "chip performance monitoring system and method".

Company Profile

0.20.17

Schanely; Paul M. - Essex Junction VT
Schanely; Paul M. - Essex Juntion VT
Schanely; Paul M. - US
Schanely; Paul M. - Hurley NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Chip performance monitoring system and method Grant 10,006,964 - Charlebois , et al. June 26, 2	2018-06-26
Chip Performance Monitoring System And Method App 20160231379 - Charlebois; Margaret R. ; et al.	2016-08-11
Chip performance monitoring system and method Grant 9,383,766 - Charlebois , et al. July 5, 2	2016-07-05
Flexible performance screen ring oscillator within a scan chain Grant 9,188,643 - Charlebois , et al. November 17, 2	2015-11-17
Performance screen ring oscillator formed from paired scan chains Grant 9,128,151 - Charlebois , et al. September 8, 2	2015-09-08
Performance screen ring oscillator formed from multi-dimensional pairings of scan chains Grant 9,097,765 - Charlebois , et al. August 4, 2	2015-08-04
Chip Performance Monitoring System And Method App 20140195196 - Charlebois; Margaret R. ; et al.	2014-07-10
Ring oscillator Grant 8,754,696 - Charlebois , et al. June 17, 2	2014-06-17
Flexible Performance Screen Ring Oscillator Within A Scan Chain App 20140132290 - Charlebois; Margaret R. ; et al.	2014-05-15
Ring Oscillator App 20140028365 - Charlebois; Margaret R. ; et al.	2014-01-30
Circuit design using design variable function slope sensitivity Grant 8,464,199 - Charlebois , et al. June 11, 2	2013-06-11
Semiconductor layer forming method and structure Grant 8,341,588 - Herzl , et al. December 25, 2	2012-12-25
Method And Device For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes App 20120167022 - HERZL; Robert D. ; et al.	2012-06-28
Method for identifying and implementing flexible logic block logic for easy engineering changes Grant 8,181,148 - Herzl , et al. May 15, 2	2012-05-15
Structure for identifying and implementing flexible logic block logic for easy engineering changes Grant 8,141,028 - Herzl , et al. March 20, 2	2012-03-20
Minimizing impact of design changes for integrated circuit designs Grant 8,060,845 - Herzl , et al. November 15, 2	2011-11-15
Method for Minimizing Impact of Design Changes For Integrated Circuit Designs App 20100017773 - Herzl; Robert D. ; et al.	2010-01-21
Method and Device for Identifying and Implementing Flexible Logic Block Logic for Easy Engineering Changes App 20090183135 - Herzl; Robert D. ; et al.	2009-07-16
Design Structure For Identifying And Implementing Flexible Logic Block Logic For Easy Engineering Changes App 20090183134 - Herzl; Robert D. ; et al.	2009-07-16
Method and apparatus for transmitting data in an integrated circuit Grant 7,536,496 - Harding , et al. May 19, 2	2009-05-19
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change App 20090045839 - HERZL; Robert D. ; et al.	2009-02-19
Asic Logic Library Of Flexible Logic Blocks And Method To Enable Engineering Change App 20090045836 - Herzl; Robert D. ; et al.	2009-02-19
Design Structure for Transmitting Data in an Integrated Circuit App 20080276034 - Harding; W. Riyon ; et al.	2008-11-06
A Method And Apparatus For Transmitting Data In An Integrated Circuit App 20070204094 - Harding; W. Riyon ; et al.	2007-08-30
Method and system for graphics rendering using hardware-event-triggered execution of captured graphics hardware instructions Grant 7,176,927 - Devins , et al. February 13, 2	2007-02-13
A Method And Apparatus For Transferring Data Between Cores In An Integrated Circuit App 20060262779 - Courchesne; Adam J. ; et al.	2006-11-23
Circuit and method for pipelined insertion Grant 7,065,602 - Horton , et al. June 20, 2	2006-06-20
Method and system for graphics rendering using captured graphics hardware instructions Grant 6,952,215 - Devins , et al. October 4, 2	2005-10-04
Circuit And Method For Pipelined Insertion App 20050001280 - Horton, Robert S. ; et al.	2005-01-06
Method and system for graphics rendering using hardware-event-triggered execution of captured graphics hardware instructions Grant 6,762,761 - Devins , et al. July 13, 2	2004-07-13
Method and system for graphics rendering using hardware-event-triggered execution of captured graphics hardware instructions App 20040054834 - Devins, Robert J. ; et al.	2004-03-18
Method And System For Graphics Rendering Using Hardware-event-triggered Execution Of Captured Graphics Hardware Instructions App 20030001849 - DEVINS, ROBERT J. ; et al.	2003-01-02
Decision variable hardware logic and processing methods for graphics display system Grant 5,434,967 - Tannenbaum , et al. July 18, 1	1995-07-18
Context management in a graphics system Grant 5,430,841 - Tannenbaum , et al. July 4, 1	1995-07-04

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