Savignac; Dominique

Patent Applications and Registrations

Patent applications and USPTO patent grants for Savignac; Dominique.The latest application filed is for "memory and method for programming memory cells".

Company Profile

0.35.34

Savignac; Dominique - Ismaning N/A DE
Savignac; Dominique - Ismaining DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory and method for programming memory cells Grant 8,670,277 - Nirschl , et al. March 11, 2	2014-03-11
Chip, multi-chip system in a method for performing a refresh of a memory array Grant 8,547,767 - Ruckerbauer , et al. October 1, 2	2013-10-01
Memory and Method for Programming Memory Cells App 20130028026 - Nirschl; Thomas ; et al.	2013-01-31
Lithographic mask and method of forming a lithographic mask Grant 8,293,431 - Rolff , et al. October 23, 2	2012-10-23
Device with precharge/homogenize circuit Grant 7,948,806 - Savignac , et al. May 24, 2	2011-05-24
Lithographic Mask and Method of Forming a Lithographic Mask App 20100266939 - Rolff; Haiko ; et al.	2010-10-21
Semiconductor memory device and method with a changeable substrate potential Grant 7,808,853 - Berthel , et al. October 5, 2	2010-10-05
Memory dies for flexible use and method for configuring memory dies Grant 7,796,446 - Ruckerbauer , et al. September 14, 2	2010-09-14
Integrated circuit with buried control line structures Grant 7,729,154 - Baumann , et al. June 1, 2	2010-06-01
Integrated circuit, chip stack and data processing system Grant 7,698,470 - Ruckerbauer , et al. April 13, 2	2010-04-13
Memory Dies for Flexible Use and Method for Configuring Memory Dies App 20100074038 - Ruckerbauer; Hermann ; et al.	2010-03-25
Chip, Multi-Chip System in a Method for Performing a Refresh of a Memory Array App 20090268539 - Ruckerbauer; Hermann ; et al.	2009-10-29
Integrated circuit and method of operating such a circuit Grant 7,548,476 - Savignac , et al. June 16, 2	2009-06-16
Device With Precharge/homogenize Circuit App 20090122628 - Savignac; Dominique ; et al.	2009-05-14
Integrated Circuit, Chip Stack and Data Processing System App 20090039915 - Ruckerbauer; Hermann ; et al.	2009-02-12
Integrated circuit chip and integrated device Grant 7,456,505 - Gospodinova , et al. November 25, 2	2008-11-25
Data memory system and method for transferring data into a data memory Grant 7,428,689 - Wallner , et al. September 23, 2	2008-09-23
Integrated Circuit With Buried Control Line Structures App 20080217655 - Baumann; Dirk ; et al.	2008-09-11
Semiconductor Memory Device And Method With A Changeable Substrate Potential App 20080198676 - Berthel; Marcel ; et al.	2008-08-21
Semiconductor memory device including a signal control device and method of operating the same Grant 7,404,136 - Ruckerbauer , et al. July 22, 2	2008-07-22
Semiconductor memory array with serial control/address bus Grant 7,397,684 - Ruckerbauer , et al. July 8, 2	2008-07-08
Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signals Grant 7,334,150 - Ruckerbauer , et al. February 19, 2	2008-02-19
Memory With Alterable Column Selection Time App 20080002515 - Schneider; Helmut ; et al.	2008-01-03
Memory module device App 20070195505 - Savignac; Dominique ; et al.	2007-08-23
Integrated Circuit And Method Of Operating Such A Circuit App 20070153601 - Savignac; Dominique ; et al.	2007-07-05
Data memory system and method for transferring data into a data memory App 20070061671 - Wallner; Paul ; et al.	2007-03-15
Semiconductor memory array with serial control/address bus App 20070058408 - Ruckerbauer; Hermann ; et al.	2007-03-15
Memory device, memory controller and memory system having bidirectional clock lines Grant 7,180,821 - Ruckerbauer , et al. February 20, 2	2007-02-20
Semiconductor Memory Device and Method of Operating the Same App 20070033489 - RUCKERBAUER; Hermann ; et al.	2007-02-08
Semiconductor memory device and method of operating the same App 20070033487 - Ruckerbauer; Hermann ; et al.	2007-02-08
Memory system with two clock lines and a memory device Grant 7,173,877 - Ruckerbauer , et al. February 6, 2	2007-02-06
Integrated circuit chip and integrated device App 20070023898 - Gospodinova; Minka ; et al.	2007-02-01
Method and apparatus for optimizing the functioning of DRAM memory elements Grant 7,072,233 - Brede , et al. July 4, 2	2006-07-04
Memory device, memory controller and method for operating the same App 20060129740 - Ruckerbauer; Hermann ; et al.	2006-06-15
Semiconductor memory module App 20060123265 - Ruckerbauer; Hermann ; et al.	2006-06-08
Integrated memory device and memory module App 20060112230 - Sichert; Christian ; et al.	2006-05-25
Semiconductor memory system and method for the transfer of write and read data signals in a semiconductor memory system Grant 7,050,340 - Ruckerbauer , et al. May 23, 2	2006-05-23
Semiconductor Memory System And Method For The Transfer Of Write And Read Data Signals In A Semiconductor Memory System App 20060104132 - Ruckerbauer; Hermann ; et al.	2006-05-18
Memory system with two clock lines and a memory device App 20060067157 - Ruckerbauer; Hermann ; et al.	2006-03-30
Memory device, memory controller and memory system having bidirectional clock lines App 20060067156 - Ruckerbauer; Hermann ; et al.	2006-03-30
Method and apparatus for optimizing the functioning of DRAM memory elements App 20050002245 - Brede, Ruediger ; et al.	2005-01-06
Integrated semiconductor circuit having transistors that are switched with different frequencies Grant 6,816,432 - Feurle , et al. November 9, 2	2004-11-09
Volatile semiconductor memory and mobile device Grant 6,751,145 - Feurle , et al. June 15, 2	2004-06-15
Method and circuit arrangement for reading out and for storing binary memory cell signals Grant 6,721,219 - Chrysostomides , et al. April 13, 2	2004-04-13
Configuration for identifying contact faults during the testing of integrated circuits Grant 6,693,447 - Savignac , et al. February 17, 2	2004-02-17
Method for reading and storing binary memory cells signals and circuit arrangement Grant 6,654,271 - Pfefferl , et al. November 25, 2	2003-11-25
Volatile semiconductor memory and mobile device App 20030043674 - Feurle, Robert ; et al.	2003-03-06
Dicing configuration for separating a semiconductor component from a semiconductor wafer Grant 6,528,392 - Feurle , et al. March 4, 2	2003-03-04
Method and circuit arrangement for reading out and for storing binary memory cell signals App 20030012061 - Chrysostomides, Athanasia ; et al.	2003-01-16
Method for reading and storing binary memory cell signals and circuit arrangement App 20030007392 - Pfefferl, Karl-Peter ; et al.	2003-01-09
Integrated semiconductor circuit having transistors that are switched with different frequencies App 20020172071 - Feurle, Robert ; et al.	2002-11-21
Method For Fabricating An Integrated Circuit, In Particular An Antifuse App 20020155678 - Brintzinger, Axel ; et al.	2002-10-24
Semiconductor memory configuration with dummy components on continuous diffusion regions Grant 6,441,469 - Chrysostomides , et al. August 27, 2	2002-08-27
Memory configuration with a central connection area App 20020062430 - Brox, Martin ; et al.	2002-05-23
Method for producing circuit structures on a semiconductor substrate and semiconductor configuration with functional circuit structures and dummy circuit structures App 20020061614 - Kling, Sabine ; et al.	2002-05-23
Integrated memory having memory cells and buffer capacitors App 20020036916 - Feurle, Robert ; et al.	2002-03-28
Dicing configuration for separating a semiconductor component from a semiconductor wafer App 20010005617 - Feurle, Robert ; et al.	2001-06-28
Configuration for testing a multiplicity of semiconductor chips App 20010005144 - Feurle, Robert ; et al.	2001-06-28
Circuit apparatus for evaluating the data content of memory cells Grant 6,097,650 - Brede , et al. August 1, 2	2000-08-01
Redundant circuit configuration for an integrated semiconductor memory Grant 5,657,279 - Savignac , et al. August 12, 1	1997-08-12
Column redundance circuit configuration for a memory Grant 5,457,655 - Savignac , et al. October 10, 1	1995-10-10
CMOS input stage Grant 5,444,392 - Sommer , et al. August 22, 1	1995-08-22
Method for data transfer for a semiconductor memory using combined control signals to provide high speed transfer, and semiconductor memory for carrying out the method Grant 5,357,469 - Sommer , et al. October 18, 1	1994-10-18
Integrated semiconductor memory with parallel test capability and redundancy method Grant 5,293,386 - Muhmenthaler , et al. March 8, 1	1994-03-08
Conductor track configuration for very large-scale integrated circuits Grant 5,289,037 - Savignac , et al. February 22, 1	1994-02-22
Integrated circuit for generating a reset signal Grant 5,166,546 - Savignac , et al. November 24, 1	1992-11-24

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