Patent applications and USPTO patent grants for Saigal; Dinesh.The latest application filed is for "internet-based semiconductor manufacturing equipment health and diagnostics monitoring".
Patent | Date |
---|---|
PVD buffer layers for LED fabrication Grant 11,011,676 - Zhu , et al. May 18, 2 | 2021-05-18 |
Internet-based Semiconductor Manufacturing Equipment Health And Diagnostics Monitoring App 20190196461 - SAIGAL; DINESH ;   et al. | 2019-06-27 |
Pvd Buffer Layers For Led Fabrication App 20160293798 - Zhu; Mingwei ;   et al. | 2016-10-06 |
PVD buffer layers for LED fabrication Grant 9,396,933 - Zhu , et al. July 19, 2 | 2016-07-19 |
Pvd Buffer Layers For Led Fabrication App 20130285065 - Zhu; Mingwei ;   et al. | 2013-10-31 |
Pulsed magnetron for sputter deposition App 20050247554 - Saigal, Dinesh ;   et al. | 2005-11-10 |
Pulsed magnetron for sputter deposition App 20040112735 - Saigal, Dinesh ;   et al. | 2004-06-17 |
Adjustable throw reactor App 20030116432 - Schweitzer, Marc O. ;   et al. | 2003-06-26 |
Method for high temperature metal deposition for reducing lateral silicidation Grant 6,579,783 - Saigal , et al. June 17, 2 | 2003-06-17 |
Physical vapor deposition apparatus with deposition and DC target power control Grant 6,454,919 - Sundarrajan , et al. September 24, 2 | 2002-09-24 |
Method of forming solder bumps on a semiconductor wafer Grant 6,426,282 - Saigal , et al. July 30, 2 | 2002-07-30 |
HIgh temperature metal deposition for reducing lateral silicidation App 20020019119 - Saigal, Dinesh ;   et al. | 2002-02-14 |
Method for improved chamber bake-out and cool-down App 20010029888 - Sundarrajan, Arvind ;   et al. | 2001-10-18 |
Method for improved chamber bake-out and cool-down Grant 6,193,811 - Sundarrajan , et al. February 27, 2 | 2001-02-27 |
Method for forming a multilayered aluminum-comprising structure on a substrate Grant 6,177,350 - Sundarrajan , et al. January 23, 2 | 2001-01-23 |
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